Patents by Inventor Mukul Gupta
Mukul Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240079070Abstract: Embodiments herein disclose an OTP low power circuit and methods for providing bias voltages using a single regulator. The circuit includes a Bitcell, a diode drop, a charge pump, a combinational logic controller, a program current sink load, and a read current sink load. The Bitcell includes programmable word lines and read lines, and is configured to operate in either a programmable mode or a read mode. The diode drop is configured to provide a second bias voltage to drive the read lines and the single regulator is configured to provide a first bias voltage to drive the WP in the read mode. The charge pump is configured to provide a third bias voltage to drive the WP in the program mode.Type: ApplicationFiled: November 2, 2022Publication date: March 7, 2024Inventors: Himanshu Saxena, Ankur Gupta, Mukul Agarwal
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Patent number: 11341195Abstract: A datacenter management system uses data collection proxies to collect performance data and configuration data for different physical and virtual entities in the datacenter. A schema is used to represent the different entities, entity relationships, and entity properties in the datacenter. A search engine identifies the intent of a natural language based search query based on the schema and a datacenter dictionary. The search engine then searches the data based on the search query intent. A dictionary manager converts both periodic and aperiodic data into a time series. This allows the search engine to operate as a time machine identifying both performance data and configuration data for any selectable time period.Type: GrantFiled: January 3, 2020Date of Patent: May 24, 2022Assignee: VMWARE, INC.Inventors: Shiv Agarwal, Apurv Gupta, Mukul Gupta, Abhijit Sharma, Rohit Toshniwal
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Patent number: 11133803Abstract: A MOS device of an IC includes pMOS and nMOS transistors. The MOS device further includes a first Mx layer interconnect extending in a first direction and coupling the pMOS and nMOS transistor drains together, and a second Mx layer interconnect extending in the first direction and coupling the pMOS and nMOS transistor drains together. The first and second Mx layer interconnects are parallel. The MOS device further includes a first Mx+1 layer interconnect extending in a second direction orthogonal to the first direction. The first Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The MOS device further includes a second Mx+1 layer interconnect extending in the second direction. The second Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The second Mx+1 layer interconnect is parallel to the first Mx+1 layer interconnect.Type: GrantFiled: May 7, 2020Date of Patent: September 28, 2021Assignee: QUALCOMM IncorporatedInventors: Satyanarayana Sahu, Xiangdong Chen, Venugopal Boynapalli, Hyeokjin Lim, Mickael Malabry, Mukul Gupta
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Patent number: 10965289Abstract: A MOS device of an IC includes pMOS and nMOS transistors. The MOS device further includes a first Mx layer interconnect extending in a first direction and coupling the pMOS and nMOS transistor drains together, and a second Mx layer interconnect extending in the first direction and coupling the pMOS and nMOS transistor drains together. The first and second Mx layer interconnects are parallel. The MOS device further includes a first Mx+1 layer interconnect extending in a second direction orthogonal to the first direction. The first Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The MOS device further includes a second Mx+1 layer interconnect extending in the second direction. The second Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The second Mx+1 layer interconnect is parallel to the first Mx+1 layer interconnect.Type: GrantFiled: February 4, 2019Date of Patent: March 30, 2021Assignee: QUALCOMM IncorporatedInventors: Satyanarayana Sahu, Xiangdong Chen, Venugopal Boynapalli, Hyeokjin Lim, Mickael Malabry, Mukul Gupta
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Publication number: 20210090149Abstract: Examples described herein include an online travel planning method, which may include storing a user travel profile that includes one or more user travel characteristics that relate particularly to a user and receiving from the user over a computer network one or more generalized user travel objectives. In some examples the one or more generalized user travel objectives may include an experiential target or a cultural event. The method may further include identifying and providing to the user over the computer network one or more first particularized travel destinations as a generalized customizable travel plan based upon the one or more generalized user travel objectives and at least one of the one or more user travel characteristics of the user travel profile. The first particularized travel destinations may be based upon and include access to particularized arrangements for travel and accommodation.Type: ApplicationFiled: September 24, 2019Publication date: March 25, 2021Applicant: NextPlan, Inc.Inventor: Mukul Gupta
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Patent number: 10931786Abstract: Techniques are described for enabling a content delivery network (CDN) service of a cloud provider network to place content distributions across points of presence (PoPs) within a common geographic area in a manner that makes efficient use of the resources provided by the PoPs. A Domain Name System (DNS) service obtains log data reflecting requests to access distributions at various PoPs. The DNS service uses the log data to periodically generate characterization data for the distributions (e.g., in terms of requests per second, bytes transferred per second, and cache width usage). The DNS service uses the generated characterization data to assign particular distributions to particular PoPs of each PoP group such that the distributions are distributed across the PoPs according to the characterization data. The DNS service uses the assignments to generate routing data used by the DNS service to resolve DNS queries for particular distributions to particular PoPs of PoP groups.Type: GrantFiled: March 31, 2020Date of Patent: February 23, 2021Assignee: Amazon Technologies, Inc.Inventors: Jorge Peixoto Vasquez, Chaitanya Ashok Solapurkar, Mukul Gupta, Anubhav Gupta, Vineet Ghatge Hemantkumar
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Publication number: 20200266821Abstract: A MOS device of an IC includes pMOS and nMOS transistors. The MOS device further includes a first Mx layer interconnect extending in a first direction and coupling the pMOS and nMOS transistor drains together, and a second Mx layer interconnect extending in the first direction and coupling the pMOS and nMOS transistor drains together. The first and second Mx layer interconnects are parallel. The MOS device further includes a first Mx+1 layer interconnect extending in a second direction orthogonal to the first direction. The first Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The MOS device further includes a second Mx+1 layer interconnect extending in the second direction. The second Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The second Mx+1 layer interconnect is parallel to the first Mx+1 layer interconnect.Type: ApplicationFiled: May 7, 2020Publication date: August 20, 2020Inventors: Satyanarayana SAHU, Xiangdong CHEN, Venugopal BOYNAPALLI, Hyeokjin LIM, Mickael MALABRY, Mukul GUPTA
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Publication number: 20200250243Abstract: A datacenter management system uses data collection proxies to collect performance data and configuration data for different physical and virtual entities in the datacenter. A schema is used to represent the different entities, entity relationships, and entity properties in the datacenter. A search engine identifies the intent of a natural language based search query based on the schema and a datacenter dictionary. The search engine then searches the data based on the search query intent. A dictionary manager converts both periodic and aperiodic data into a time series. This allows the search engine to operate as a time machine identifying both performance data and configuration data for any selectable time period.Type: ApplicationFiled: January 3, 2020Publication date: August 6, 2020Inventors: Shiv AGARWAL, Apurv GUPTA, Mukul GUPTA, Abhijit SHARMA, Rohit TOSHNIWAL
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Patent number: 10593700Abstract: A standard cell CMOS device includes metal oxide semiconductor transistors having gates formed from gate interconnects. The gate interconnects extend in a first direction. The device further includes M1 layer interconnects. The M1 layer interconnects are parallel to the gate interconnects and extend in the first direction only. The device further includes a M0 layer interconnect. The M0 layer interconnect extends directly over a first gate interconnect and extends in a second direction orthogonal to the first direction only. The M0 layer interconnect is below the M1 layer and is isolated from directly connecting to the first gate interconnect. The device further includes a layer interconnect that is different from the M1 layer interconnects and the M0 layer interconnect. The layer interconnect is connected to the M0 layer interconnect and is directly connected to a second gate electrode.Type: GrantFiled: December 27, 2017Date of Patent: March 17, 2020Assignee: Qualcomm IncorporatedInventors: Mukul Gupta, Xiangdong Chen, Ohsang Kwon, Foua Vang, Stanley Seungchul Song, Kern Rim
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Patent number: 10567238Abstract: A computerized visualization system includes a computer system management system that provides modeling of a computer system having physical entities and virtual entities and a computer display screen having rendered thereon an arrangement of active icons corresponding to physical and virtual entities included in the computer system, the icons being arranged in concentric circular rings having arc segments corresponding to physical host computers.Type: GrantFiled: January 8, 2015Date of Patent: February 18, 2020Assignee: VMWARE, INC.Inventors: Sanket Bindle, Rohit Toshniwal, Mukul Gupta, Shiv Agarwal
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Patent number: 10528628Abstract: A datacenter management system uses data collection proxies to collect performance data and configuration data for different physical and virtual entities in the datacenter. A schema is used to represent the different entities, entity relationships, and entity properties in the datacenter. A search engine identifies the intent of a natural language based search query based on the schema and a datacenter dictionary. The search engine then searches the data based on the search query intent. A dictionary manager converts both periodic and aperiodic data into a time series. This allows the search engine to operate as a time machine identifying both performance data and configuration data for any selectable time period.Type: GrantFiled: September 19, 2017Date of Patent: January 7, 2020Assignee: VMware, Inc.Inventors: Shiv Agarwal, Apurv Gupta, Mukul Gupta, Abhijit Sharma, Rohit Toshniwal
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Patent number: 10518585Abstract: Tire comprising a crown reinforcement formed of at least two working crown layers of reinforcing elements, crossed from one layer to the other making with the circumferential direction angles comprised between 10° and 45°. A first layer S of polymer compound is in contact with at least one working crown layer and in contact with the carcass reinforcement, the said first layer S of polymer compound extending axially as far as at least the axial end of the tread and the complex dynamic shear modulus G*, measured at 10% and 60° C. on the return cycle, of the first layer S of polymer compound is greater than 1.35 MPa.Type: GrantFiled: May 27, 2015Date of Patent: December 31, 2019Assignee: COMPAGNIE GENERALE DES ETABLISSEMENTS MICHELINInventors: Hichem Rehab, Mukul Gupta
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Patent number: 10518584Abstract: Tire comprising a crown reinforcement formed of at least two working crown layers of reinforcing elements, crossed from one layer to the other making with the circumferential direction angles comprised between 10° and 45°. A first layer S of polymer compound is in contact with at least one working crown layer and in contact with the carcass reinforcement, the first layer S of polymer compound extending axially as far as at least the axial end of the tread, the first layer S of compound polymer compound is made up of a filled elastomer blend having a macro dispersion coefficient Z greater than or equal to 65 and a maximum tan(?) value, denoted tan(?)max, less than 0.100 and its complex dynamic shear modulus G*, measured at 10% and 60° C. on the return cycle is greater than 1.35 MPa.Type: GrantFiled: May 27, 2015Date of Patent: December 31, 2019Assignee: COMPAGNIE GENERALE DES ETABLISSEMENTS MICHELINInventors: Hichem Rehab, Mukul Gupta, Nathalie Salgues, Jacques Besson
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Publication number: 20190173473Abstract: A MOS device of an IC includes pMOS and nMOS transistors. The MOS device further includes a first Mx layer interconnect extending in a first direction and coupling the pMOS and nMOS transistor drains together, and a second Mx layer interconnect extending in the first direction and coupling the pMOS and nMOS transistor drains together. The first and second Mx layer interconnects are parallel. The MOS device further includes a first Mx+1 layer interconnect extending in a second direction orthogonal to the first direction. The first Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The MOS device further includes a second Mx+1 layer interconnect extending in the second direction. The second Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The second Mx+1 layer interconnect is parallel to the first Mx+1 layer interconnect.Type: ApplicationFiled: February 4, 2019Publication date: June 6, 2019Inventors: Satyanarayana SAHU, Xiangdong CHEN, Venugopal BOYNAPALLI, Hyeokjin LIM, Mickael MALABRY, Mukul GUPTA
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Patent number: 10236886Abstract: A MOS device of an IC includes pMOS and nMOS transistors. The MOS device further includes a first Mx layer interconnect extending in a first direction and coupling the pMOS and nMOS transistor drains together, and a second Mx layer interconnect extending in the first direction and coupling the pMOS and nMOS transistor drains together. The first and second Mx layer interconnects are parallel. The MOS device further includes a first Mx+1 layer interconnect extending in a second direction orthogonal to the first direction. The first Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The MOS device further includes a second Mx+1 layer interconnect extending in the second direction. The second Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The second Mx+1 layer interconnect is parallel to the first Mx+1 layer interconnect.Type: GrantFiled: December 28, 2016Date of Patent: March 19, 2019Assignee: QUALCOMM IncorporatedInventors: Satyanarayana Sahu, Xiangdong Chen, Venugopal Boynapalli, Hyeokjin Lim, Mickael Malabry, Mukul Gupta
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Patent number: 10198511Abstract: A computerized datacenter contextual search query interpretation method includes receiving a search query from a user; displaying search suggestions based on the search query and obtaining a selected one of the search suggestions. Any time period associated with the search query is identified, instructions based on the selected search suggestion and any time period for searching a data model of a datacenter are generated to obtain search results and display a graphical visualization of the search results.Type: GrantFiled: January 8, 2015Date of Patent: February 5, 2019Assignee: VMware, Inc.Inventors: Kshitij Gupta, Mukul Gupta, Shiv Agarwal, Abhijit Sharma
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Patent number: 10175571Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus for assigning feature colors for a multiple patterning process are provided. The apparatus receives integrated circuit layout information including a set of features and an assigned color of a plurality of colors for each feature of a first subset of features of the set of features. In addition, the apparatus performs color decomposition on a second subset of features to assign colors to features in the second subset of features. The second subset of features includes features in the set of features that are not included in the first subset of features with an assigned color.Type: GrantFiled: June 14, 2016Date of Patent: January 8, 2019Assignee: QUALCOMM IncorporatedInventors: Xiangdong Chen, Hyeokjin Bruce Lim, Ohsang Kwon, Mickael Malabry, Jingwei Zhang, Raymond George Stephany, Haining Yang, Kern Rim, Stanley Seungchul Song, Mukul Gupta, Foua Vang
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Publication number: 20180183439Abstract: A MOS device of an IC includes pMOS and nMOS transistors. The MOS device further includes a first Mx layer interconnect extending in a first direction and coupling the pMOS and nMOS transistor drains together, and a second Mx layer interconnect extending in the first direction and coupling the pMOS and nMOS transistor drains together. The first and second Mx layer interconnects are parallel. The MOS device further includes a first Mx+1 layer interconnect extending in a second direction orthogonal to the first direction. The first Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The MOS device further includes a second Mx+1 layer interconnect extending in the second direction. The second Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The second Mx+1 layer interconnect is parallel to the first Mx+1 layer interconnect.Type: ApplicationFiled: December 28, 2016Publication date: June 28, 2018Inventors: Satyanarayana SAHU, Xiangdong CHEN, Venugopal BOYNAPALLI, Hyeokjin LIM, Mickael MALABRY, Mukul GUPTA
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Publication number: 20180122824Abstract: A standard cell CMOS device includes metal oxide semiconductor transistors having gates formed from gate interconnects. The gate interconnects extend in a first direction. The device further includes M1 layer interconnects. The M1 layer interconnects are parallel to the gate interconnects and extend in the first direction only. The device further includes a M0 layer interconnect. The M0 layer interconnect extends directly over a first gate interconnect and extends in a second direction orthogonal to the first direction only. The M0 layer interconnect is below the M1 layer and is isolated from directly connecting to the first gate interconnect. The device further includes a layer interconnect that is different from the M1 layer interconnects and the M0 layer interconnect. The layer interconnect is connected to the M0 layer interconnect and is directly connected to a second gate electrode.Type: ApplicationFiled: December 27, 2017Publication date: May 3, 2018Inventors: Mukul GUPTA, Xiangdong CHEN, Ohsang KWON, Foua VANG, Stanley Seungchul SONG, Kern RIM
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Patent number: 9923782Abstract: A computerized virtual entity pathway visualization method and system provide a virtual entity packet pathway display indicating a packet pathway along which a data packet would travel from between virtual entities (e.g., virtual machines) in a computer system. One implementation includes modeling of a computer system having physical and virtual entities, identifying a packet pathway from a source virtual entity in the computer system to a destination virtual entity in the computer system, and rendering on a computer display screen a packet pathway and an arrangement of plural active icons corresponding to physical and virtual entities included in the packet pathway from the source virtual entity to the destination virtual entity.Type: GrantFiled: January 8, 2015Date of Patent: March 20, 2018Assignee: VMware, Inc.Inventors: Sanket Bindle, Ajinkya Harkare, Rohit Toshniwal, Mukul Gupta, Shiv Agarwal, Raunaq Gupta