Patents by Inventor Mun-Yang Park
Mun-Yang Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11517216Abstract: The inventive concept relates to a body composition analysis system. A body composition analysis system according to an embodiment of the inventive concept includes a sinusoidal signal generator, a synchronous detector, and a bioimpedance analyzer. The sinusoidal signal generator converts a digital sinusoidal signal having a target frequency into an analog sinusoidal signal. The synchronous detector extracts a target frequency component of a bioelectrical signal generated in response to an analog sinusoidal signal based on the digital sinusoidal signal. The bioimpedance analyzer calculates the bioimpedance based on the target frequency component of the bioelectrical signal. According to the inventive concept, it is possible to improve the selectivity for extracting the target frequency component of the bioelectrical signal and to reduce the area and variations of characteristics for the implementation of the integrated circuit.Type: GrantFiled: January 15, 2019Date of Patent: December 6, 2022Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Min-Hyung Cho, Young-deuk Jeon, Bon Tae Koo, Mun Yang Park, Youngseok Baek
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Patent number: 10627501Abstract: Disclosed are a pulse radar apparatus and an operating method of the pulse radar apparatus, the pulse radar apparatus including a transmitter configured to receive a reference signal as a transmission clock signal, and transmit a transmission pulse to an object based on the transmission clock signal, a negative feedback loop configured to delay the reference signal and output the delayed reference signal as a reception clock signal, and a receiver configured to restore, based on the reception clock signal, a reflection pulse received in response to the transmission pulse being reflected from the object, wherein the negative feedback loop is configured to generate a delay control signal using the reference signal and a predetermined waveform signal generated by a waveform generator, delay the reference signal based on the delay control signal, and adjust the delay control signal by controlling the waveform generator to change the predetermined waveform signal.Type: GrantFiled: January 9, 2017Date of Patent: April 21, 2020Assignee: Electronics and Telecommunications Research InstituteInventors: Pil Jae Park, Seong Do Kim, Ki Su Kim, Mun Yang Park
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Publication number: 20190239771Abstract: The inventive concept relates to a body composition analysis system. A body composition analysis system according to an embodiment of the inventive concept includes a sinusoidal signal generator, a synchronous detector, and a bioimpedance analyzer. The sinusoidal signal generator converts a digital sinusoidal signal having a target frequency into an analog sinusoidal signal. The synchronous detector extracts a target frequency component of a bioelectrical signal generated in response to an analog sinusoidal signal based on the digital sinusoidal signal. The bioimpedance analyzer calculates the bioimpedance based on the target frequency component of the bioelectrical signal. According to the inventive concept, it is possible to improve the selectivity for extracting the target frequency component of the bioelectrical signal and to reduce the area and variations of characteristics for the implementation of the integrated circuit.Type: ApplicationFiled: January 15, 2019Publication date: August 8, 2019Inventors: Min-Hyung CHO, Young-deuk JEON, Bon Tae KOO, Mun Yang PARK, Youngseok BAEK
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Publication number: 20170285138Abstract: Disclosed are a pulse radar apparatus and an operating method of the pulse radar apparatus, the pulse radar apparatus including a transmitter configured to receive a reference signal as a transmission clock signal, and transmit a transmission pulse to an object based on the transmission clock signal, a negative feedback loop configured to delay the reference signal and output the delayed reference signal as a reception clock signal, and a receiver configured to restore, based on the reception clock signal, a reflection pulse received in response to the transmission pulse being reflected from the object, wherein the negative feedback loop is configured to generate a delay control signal using the reference signal and a predetermined waveform signal generated by a waveform generator, delay the reference signal based on the delay control signal, and adjust the delay control signal by controlling the waveform generator to change the predetermined waveform signal.Type: ApplicationFiled: January 9, 2017Publication date: October 5, 2017Inventors: Pil Jae PARK, Seong Do KIM, Ki Su KIM, Mun Yang PARK
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Patent number: 9294135Abstract: A digital RF receiver does not use a separate receiver according to a mode and a band for multi-mode reception, MIMO reception, and bandwidth extension reception, and changes only setting variables in a single receiver structure so as to implement multi-mode reception, MIMO reception, bandwidth extension reception, and/or simultaneous multi-mode operation, such that complexity of the receiver, development cost, and power consumption can be reduced.Type: GrantFiled: September 11, 2012Date of Patent: March 22, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Ik Soo Eo, Sang-Kyun Kim, Mun Yang Park, Seon-Ho Han, Hyun Kyu Yu
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Publication number: 20160065254Abstract: Exemplary embodiments of the present invention relate to an RF transmitter supporting carrier aggregation and envelope tracking and an RF transmitter according to an embodiment of the present invention comprises an RF path configured to convert a carrier aggregation signal in which a plurality of component carriers belonging to a baseband are aggregated into an RF signal; an ET path configured to generate an envelope signal by calculating magnitudes of the plurality of component carriers, respectively, and adding the calculated each magnitude of the component carriers; and an amplifier configured to power-amplify the converted RF signal according to a bias voltage corresponding to the generated envelope signal. According to exemplary embodiments of the present invention, power amplification efficiency and data transmission efficiency are improved by applying carrier aggregation and envelope tracking.Type: ApplicationFiled: August 25, 2015Publication date: March 3, 2016Inventors: Mi-Jeong PARK, Mun-Yang PARK, Dong-Woo KANG, Jang-Hong CHOI
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Patent number: 8542773Abstract: A digital RF converter, a digital RF modulator, and a transmitter are provided. The digital RF converter includes a delta-sigma modulated bits (DSMB) sub-block that generates a current magnitude corresponding to least-significant n bits among input signals at a first sampling speed, a least-significant bit (LSB) sub-block that generates a current magnitude corresponding to intermediate k bits among the input signals at a second sampling speed lower than the first sampling speed, and a most-significant bit (MSB) sub block that generates a current magnitude corresponding to most-significant m bits among the inputs signals at the second sampling speed.Type: GrantFiled: December 15, 2010Date of Patent: September 24, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Hyun Kyu Yu, Jang Hong Choi, Hyun Ho Boo, Pil Jae Park, Mun Yang Park, Seong Do Kim, Sun Bo Shim, Song Cheol Hong
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Publication number: 20130156141Abstract: A digital RF receiver does not use a separate receiver according to a mode and a band for multi-mode reception, MIMO reception, and bandwidth extension reception, and changes only setting variables in a single receiver structure so as to implement multi-mode reception, MIMO reception, bandwidth extension reception, and/or simultaneous multi-mode operation, such that complexity of the receiver, development cost, and power consumption can be reduced.Type: ApplicationFiled: September 11, 2012Publication date: June 20, 2013Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Ik Soo Eo, Sang-Kyun Kim, Mun Yang Park, Seon-Ho Han, Hyun Kyu Yu
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Publication number: 20130082756Abstract: The present invention provides a signal input device of a digital-RF converter including: a phase-modulated signal input unit configured to input a phase-modulated carrier signal to an LO switch of a digital-RF converter; and a digital signal input unit configured to correct a digital signal to correspond to the phase-modulated carrier signal, and input the corrected digital signal to a data switch of the digital-RF converter.Type: ApplicationFiled: September 13, 2012Publication date: April 4, 2013Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jang Hong CHOI, Mun Yang PARK, Hyun Ho BOO, Seon-Ho HAN, Hyun Kyu YU
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Publication number: 20130063199Abstract: Disclosed is a programmable complex mixer. In accordance with the embodiments of the present invention, it is possible to control an output by programming paths and signs of internal signals in a complex mixer to reduce a processing bandwidth, power consumption, and a chip area in a transceiver, thereby improving performance of a transceiver.Type: ApplicationFiled: September 13, 2012Publication date: March 14, 2013Applicant: Electronics and Telecommunications Research InstituteInventors: Seon-Ho HAN, Hyun Ho Boo, Mun Yang Park, Jang Hong Choi, Hyun Kyu Yu
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Patent number: 8295405Abstract: There is provided an apparatus and method for In-phase/Quadrature-phase (I/Q) mismatch calibration. The apparatus includes: a symmetrical point extracting part receiving continuous wave signals and extracting an I/Q channel average locus of the continuous wave signals; an error extracting part extracting a degree of distortion of the continuous wave signals from the extracted I/Q channel average locus; and a calibrating part calibrating a mismatch between I-channel signals and Q-channel signals of the continuous wave signals using the degree of distortion of the continuous wave signals.Type: GrantFiled: December 1, 2009Date of Patent: October 23, 2012Assignee: Electronics and Telecommunications Research InstituteInventors: Hyun Kyu Yu, Mun Yang Park, Jae Hoon Shim
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Patent number: 8013641Abstract: There is provided a digital lock detector and a frequency synthesizer using the same. The digital lock detector includes a comparator unit receiving a plurality of control bits, and generating a bit signal to notice a lock condition of the plurality of control bits; a delay cell block generating a plurality of delay signals based on the bit signal, and outputting a clock signal by combining the bit signal and the plurality of delay signals; and a detection unit detecting a shift time of the clock signal, and generating a lock indication signal according to the detection result.Type: GrantFiled: April 29, 2011Date of Patent: September 6, 2011Assignee: Electronics and Telecommunications Resarch InstittuteInventors: Ja Yol Lee, Seong Do Kim, Mun Yang Park, Cheon Soo Kim, Hyun Kyu Yu
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Publication number: 20110204944Abstract: There is provided a digital lock detector and a frequency synthesizer using the same. The digital lock detector includes a comparator unit receiving a plurality of control bits, and generating a bit signal to notice a lock condition of the plurality of control bits; a delay cell block generating a plurality of delay signals based on the bit signal, and outputting a clock signal by combining the bit signal and the plurality of delay signals; and a detection unit detecting a shift time of the clock signal, and generating a lock indication signal according to the detection result.Type: ApplicationFiled: April 29, 2011Publication date: August 25, 2011Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Ja Yol LEE, Seong Do KIM, Mun Yang PARK, Cheon Soo KIM, Hyun Kyu YU
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Publication number: 20110150125Abstract: There are provided a digital RF converter capable of improving a dynamic range and a signal to noise ratio of a transmitter and a digital RF modulator and a transmitter including the same. The digital RF converter may include: a delta-sigma modulated bits (DSMB) sub-block that generates a current magnitude corresponding to least-significant n bits among input signals at a first sampling speed; a least-significant bit (LSB) sub-block that generates a current magnitude corresponding to intermediate k bits among the input signals at a second sampling speed lower than the first sampling speed; and a most-significant bit (MSB) sub block that generates a current magnitude corresponding to most-significant m bits among the inputs signals at the second sampling speed.Type: ApplicationFiled: December 15, 2010Publication date: June 23, 2011Applicant: Electronics and Telecommunications Research InstituteInventors: Hyun Kyu YU, Jang Hong Choi, Hyun Ho Boo, Pil Jae Park, Mun Yang Park, Seong Do Kim, Sun Bo Shim, Song Cheol Hong
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Patent number: 7956658Abstract: There is provided a digital lock detector and a frequency synthesizer using the same. The digital lock detector includes a comparator unit receiving a plurality of control bits, and generating a bit signal to notice a lock condition of the plurality of control bits; a delay cell block generating a plurality of delay signals based on the bit signal, and outputting a clock signal by combining the bit signal and the plurality of delay signals; and a detection unit detecting a shift time of the clock signal, and generating a lock indication signal according to the detection result.Type: GrantFiled: October 28, 2009Date of Patent: June 7, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Ja Yol Lee, Seong Do Kim, Mun Yang Park, Cheon Soo Kim, Hyun Kyu Yu
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Publication number: 20110026571Abstract: An automatic gain-control method for a communication system is comprised of determining a communication distance between the first and second transceivers and controlling gain values of transception stages of the first and second transceivers in correspondence with the communication distance.Type: ApplicationFiled: August 8, 2008Publication date: February 3, 2011Applicant: Electronics and Telecommunications Research InstituteInventors: Seon-Ho Han, Mun-Yang Park, Cheon-Soo Kim, Jae-Young Kim
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Publication number: 20100271072Abstract: There is provided a digital lock detector and a frequency synthesizer using the same. The digital lock detector includes a comparator unit receiving a plurality of control bits, and generating a bit signal to notice a lock condition of the plurality of control bits; a delay cell block generating a plurality of delay signals based on the bit signal, and outputting a clock signal by combining the bit signal and the plurality of delay signals; and a detection unit detecting a shift time of the clock signal, and generating a lock indication signal according to the detection result.Type: ApplicationFiled: October 28, 2009Publication date: October 28, 2010Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Ja Yol LEE, Seong Do Kim, Mun Yang Park, Cheon Soo Kim, Hyun Kyu Yu
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Patent number: 7773953Abstract: Provided is a wireless transceiving apparatus for variability of signal processing band, in which at least one resonator of an analog processor and a VCO are simultaneously controlled using a frequency synthesizer, and a frequency of the VCO and a resonance frequency of the analog processor are controlled to have a rational number ratio, thereby capable of varying the signal processing band. The wireless transceiving apparatus includes: an analog processor having a plurality of resonators on a path of transmission/reception signals, for performing analog signal processing; a digital processor for performing digital signal processing on an output signal of the analog processor or data to be transmitted to the analog processor; and a frequency synthesizer for providing a local oscillation (LO) frequency and a controlling signal to the resonators of the analog processor so as to vary a signal processing band of the analog processor.Type: GrantFiled: September 12, 2005Date of Patent: August 10, 2010Assignee: Electronics and Telecommunications Research InstituteInventors: Seon-Ho Han, Mun-Yang Park, Hyun-Kyu Yu, Cheon-Soo Kim
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Publication number: 20100142648Abstract: There is provided an apparatus and method for In-phase/Quadrature-phase (I/Q) mismatch calibration. The apparatus includes: a symmetrical point extracting part receiving continuous wave signals and extracting an I/Q channel average locus of the continuous wave signals; an error extracting part extracting a degree of distortion of the continuous wave signals from the extracted I/Q channel average locus; and a calibrating part calibrating a mismatch between I-channel signals and Q-channel signals of the continuous wave signals using the degree of distortion of the continuous wave signals.Type: ApplicationFiled: December 1, 2009Publication date: June 10, 2010Applicant: Electronics and Telecommunications Research InstituteInventors: Hyun Kyu Yu, Mun Yang Park, Jae Hoon Shim
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Patent number: 7626476Abstract: A coplanar waveguide CPW using multi-layer interconnection CMOS technology is provided. In the CPW including an interlayer insulator disposed on a substrate, metal multilayers disposed on the interlayer insulator, and a ground line-a signal line-a ground line formed of an uppermost metal layer, when a ground line of a lowermost layer is connected to the ground line of the uppermost layer, intermediate metal layers are designed to gradually increase or decrease in width, or to be uneven so as to maximize an area where an ultra-high frequency spreads, thereby minimizing CPW loss and maximizing a slow wave effect. As a result, it is possible to improve performance of an ultra-high frequency circuit and miniaturize the circuit.Type: GrantFiled: March 23, 2007Date of Patent: December 1, 2009Assignee: Electronics and Telecommunications Research InstituteInventors: Cheon Soo Kim, Myung Shin Kwak, Seong Do Kim, Mun Yang Park, Hyun Kyu Yu, Hee Bum Jung