Patents by Inventor Mun-Yang Park
Mun-Yang Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7432768Abstract: Provided are a voltage controlled digital analog oscillator and a frequency synthesizer using the same, the oscillator comprising an oscillator having a frequency of an output signal being determined by a voltage inputted to an analog input end and a digital value inputted to a digital input end; and a digital tuner for comparing the voltage inputted to the analog input end to first and second threshold voltages and changing the digital value inputted to the digital input end according to the result, whereby it is possible to obtain a broadband frequency output with less noise.Type: GrantFiled: June 22, 2004Date of Patent: October 7, 2008Assignee: Electronics and Telecommunications Research InstituteInventors: Seon Ho Han, Jin Ho Han, Mun Yang Park
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Patent number: 7391260Abstract: An analog variable gain amplifier (VGA) adjusting a signal level of a mobile communication system is provided. More particularly, design of a VGA using an operational transconductance amplifier (OTA) having a wide linear input/output range is disclosed. The VGA includes two double-differential-pair OTAs and feedback resistors. A first differential input of a first double differential pair OTA receives an input signal from the forward stage, and a second differential input is negatively fed back through a differential output and a passive resistor. An input in which a first block of the connection structure and first and second differential inputs of a second double differential pair OTA are connected receives an output signal of the first block stage. The output is negatively fed back in series through a variable resistor whose resistance varies exponentially with an adjustment voltage from outside.Type: GrantFiled: August 25, 2006Date of Patent: June 24, 2008Assignee: Electronics and Telecommunications Research InstituteInventors: Young Ho Kim, Mun Yang Park, Hyun Kyu Yu
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Patent number: 7352247Abstract: Provided is a power amplifier which fits to a deep-submicron technology in radio frequency wireless communication. The power amplifier includes a cascode including a first transistor which receives and amplifies an input signal, and a second transistor which is connected to the first transistor in series and operated by a DC bias voltage; a third transistor which is connected between the cascode and an output end, operated by a dynamic gate bias and outputting a signal; and a voltage divider which includes first and second capacitors that are connected between the output end, i.e. a drain of the third transistor, and a ground in series, and provides the dynamic bias to a gate of the third transistor.Type: GrantFiled: August 22, 2007Date of Patent: April 1, 2008Assignee: Electronics and Telecommunications Research InstituteInventors: Hyoung-Seok Oh, Hyun-Kyu Yu, Mun-Yang Park, Cheon-Soo Kim
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Patent number: 7323939Abstract: Provided is a low noise amplifier with a common source and a source degeneration, which has linearity, power gain, noise factor, and lossless input matching. The low noise amplifier includes: a first inductor having one terminal connected to an input terminal receiving a signal; a second inductor having one terminal connected to a ground; a MOS transistor having a gate connected to the first inductor, a source connected to the other terminal of the second inductor, and a drain transmitting a signal; and a variable capacitor connected between the source and gate of the MOS transistor and varying an input matching frequency at the input terminal.Type: GrantFiled: September 29, 2005Date of Patent: January 29, 2008Assignee: Electronics and Telecommunications Research InstituteInventors: Seon-Ho Han, Mun-Yang Park, Hyun-Kyu Yu
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Publication number: 20070285175Abstract: Provided is a power amplifier which fits to a deep-submicron technology in radio frequency wireless communication. The power amplifier includes a cascode including a first transistor which receives and amplifies an input signal, and a second transistor which is connected to the first transistor in series and operated by a DC bias voltage; a third transistor which is connected between the cascode and an output end, operated by a dynamic gate bias and outputting a signal; and a voltage divider which includes first and second capacitors that are connected between the output end, i.e. a drain of the third transistor, and a ground in series, and provides the dynamic bias to a gate of the third transistor.Type: ApplicationFiled: August 22, 2007Publication date: December 13, 2007Inventors: Hyoung-Seok OH, Hyun-Kyu YU, Mun-Yang PARK, Cheon-Soo KIM
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Publication number: 20070241844Abstract: A coplanar waveguide CPW using multi-layer interconnection CMOS technology is provided. In the CPW including an interlayer insulator disposed on a substrate, metal multilayers disposed on the interlayer insulator, and a ground line-a signal line-a ground line formed of an uppermost metal layer, when a ground line of a lowermost layer is connected to the ground line of the uppermost layer, intermediate metal layers are designed to gradually increase or decrease in width, or to be uneven so as to maximize an area where an ultra-high frequency spreads, thereby minimizing CPW loss and maximizing a slow wave effect. As a result, it is possible to improve performance of an ultra-high frequency circuit and miniaturize the circuit.Type: ApplicationFiled: March 23, 2007Publication date: October 18, 2007Inventors: Cheon Soo KIM, Myung Shin KWAK, Seong Do KIM, Mun Yang PARK, Hyun Kyu YU, Hee Bum JUNG
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Patent number: 7276976Abstract: Provided is a power amplifier which fits to a deep-submicron technology in radio frequency wireless communication. The power amplifier includes a cascode including a first transistor which receives and amplifies an input signal, and a second transistor which is connected to the first transistor in series and operated by a DC bias voltage; a third transistor which is connected between the cascode and an output end, operated by a dynamic gate bias and outputting a signal; and a voltage divider which includes first and second capacitors that are connected between the output end, i.e. a drain of the third transistor, and a ground in series, and provides the dynamic bias to a gate of the third transistor.Type: GrantFiled: November 4, 2005Date of Patent: October 2, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Hyoung-Seok Oh, Hyun-Kyu Yu, Mun-Yang Park, Cheon-Soo Kim
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Patent number: 7233204Abstract: Provided is a method of acquiring a high linear characteristic and a low distortion in a transconductor (operational transconductance amplifier), especially, in a triode region type transconductor among CMOS transconductors. A resistance is inserted in a source or a drain of an input triode transistor. The transconductor has a simple circuit structure, and has a large linear region, constant transconductance and low total harmonic distortion (THD) characteristic within an error region.Type: GrantFiled: July 28, 2004Date of Patent: June 19, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Young Ho Kim, Cheon Soo Kim, Mun Yang Park
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Publication number: 20070126501Abstract: An analog variable gain amplifier (VGA) adjusting a signal level of a mobile communication system is provided. More particularly, design of a VGA using an operational transconductance amplifier (OTA) having a wide linear input/output range is disclosed. The VGA includes two double-differential-pair OTAs and feedback resistors. A first differential input of a first double differential pair OTA receives an input signal from the forward stage, and a second differential input is negatively fed back through a differential output and a passive resistor. An input in which a first block of the connection structure and first and second differential inputs of a second double differential pair OTA are connected receives an output signal of the first block stage. The output is negatively fed back in series through a variable resistor whose resistance varies exponentially with an adjustment voltage from outside.Type: ApplicationFiled: August 25, 2006Publication date: June 7, 2007Inventors: Young Ho Kim, Mun Yang Park, Hyun Kyu Yu
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Patent number: 7212585Abstract: There is provided a quadrature modulation transmitter which is capable of solving several problems of the conventional transmitter while performing the same function as the heterodyne transmitter or the digital IF transmitter, in which a circuit structure is simplified and a power consumption is reduced compared with the conventional transmitter.Type: GrantFiled: December 12, 2003Date of Patent: May 1, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Min-Hyung Cho, Seung-Chul Lee, Mun-Yang Park
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Patent number: 7199660Abstract: Disclosed is a CMOS variable gain amplifier (VGA). The variable gain amplifier comprises a voltage-current converter for converting voltages of a wide input range into currents, a current shared circuit for receiving the currents from the voltage-current converter and controlling values of output currents depending on first and second control voltages, and a current-voltage converter for converting the output currents from the current shared circuit into differential voltages depending on a bias voltage in order to obtain a variable gain. The voltage amplifier having a variable gain is provided by controlling the value of the output current of the drain terminal against the gate voltage of the NMOS transistor constituting the current shared circuit. Therefore, an integrated circuit (IC) type variable gain amplifier operating a high speed at a low supply voltage can be obtained.Type: GrantFiled: December 8, 2003Date of Patent: April 3, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Chong Ki Kwon, Gyu Hyung Cho, Mun Yang Park, Jong Dae Kim
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Patent number: 7193468Abstract: Provided is an active load circuit of a voltage gain amplifier, which allows a high voltage gain with a low supply voltage operation in high-frequency range. The active load circuit includes a PMOS transistor which is connected between the amplifying unit and a power supply voltage and functions as a load element in a low frequency range; a negative feedback buffering unit which is connected to the gate of the PMOS transistor and functions as a common drain amplifier to stabilize the output voltage of the voltage gain amplifier and drive the voltage gain amplifier at a low voltage; and a capacitor which is connected to the negative feedback buffering unit and compensates for both an impedance and a frequency characteristics when the voltage gain amplifier operates in a high frequency range.Type: GrantFiled: May 14, 2004Date of Patent: March 20, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Jong Kee Kwon, Gyu Hyeong Cho, Mun Yang Park, Jong Dae Kim
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Patent number: 7193466Abstract: Provided is a transconductor capable of eliminating a direct current (DC) offset component of a signal and compensating a mismatch of the signal. The transconductor includes amplifiers of simple circuit structures, and a common mode control DC offset elimination circuit. The transconductor includes a common mode control DC offset elimination circuit unit receiving input/output voltages to stabilize the current supplying and the output DC value, a first amplifier and a second amplifier reducing a mismatch in a transconductor circuit and increasing an output resistance, in order to prevent a signal distortion or a wrong operation of the circuit that is caused by the mismatch signal and unstable DC voltage.Type: GrantFiled: December 20, 2004Date of Patent: March 20, 2007Assignee: Electronics And Telecommunications Research InstituteInventors: Young Ho Kim, Mun Yang Park
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Patent number: 7180358Abstract: Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.Type: GrantFiled: December 3, 2004Date of Patent: February 20, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Jong Kee Kwon, Mun Yang Park, Jong Dae Kim, Won Chul Song
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Publication number: 20070030080Abstract: Provided are a voltage controlled digital analog oscillator and a frequency synthesizer using the same, the oscillator comprising an oscillator having a frequency of an output signal being determined by a voltage inputted to an analog input end and a digital value inputted to a digital input end; and a digital tuner for comparing the voltage inputted to the analog input end to first and second threshold voltages and changing the digital value inputted to the digital input end according to the result, whereby it is possible to obtain a broadband frequency output with less noise.Type: ApplicationFiled: June 22, 2004Publication date: February 8, 2007Inventors: Seon Ho Han, Jin Ho Han, Mun Yang Park
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Patent number: 7098702Abstract: Provided is a transconductor circuit for compensating distortion of an output current. The transconductor circuit is a differential pair with source degeneration and includes a main circuitry to which a predetermined input voltage is applied, constant current sources which supply the main circuitry with constant bias, an auxiliary circuitry which is connected to nodes of the main circuitry to compensate the distortion of the output current, and a variable current source which controls a depth or degree of a distortion compensation operation for the output current.Type: GrantFiled: September 14, 2004Date of Patent: August 29, 2006Assignee: Electronics and Telecommunications Research InstituteInventors: Beaung Woo Lee, Mun Yang Park
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Publication number: 20060135086Abstract: Provided is a wireless transceiving apparatus for variability of signal processing band, in which at least one resonator of an analog processor and a VCO are simultaneously controlled using a frequency synthesizer, and a frequency of the VCO and a resonance frequency of the analog processor are controlled to have a rational number ratio, thereby capable of varying the signal processing band. The wireless transceiving apparatus includes: an analog processor having a plurality of resonators on a path of transmission/reception signals, for performing analog signal processing; a digital processor for performing digital signal processing on an output signal of the analog processor or data to be transmitted to the analog processor; and a frequency synthesizer for providing a local oscillation (LO) frequency and a controlling signal to the resonators of the analog processor so as to vary a signal processing band of the analog processor.Type: ApplicationFiled: September 12, 2005Publication date: June 22, 2006Inventors: Seon-Ho Han, Mun-Yang Park, Hyun-Kyu Yu, Cheon-Soo Kim
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Publication number: 20060132242Abstract: Provided is a low noise amplifier with a common source and a source degeneration, which has linearity, power gain, noise factor, and lossless input matching. The low noise amplifier includes: a first inductor having one terminal connected to an input terminal receiving a signal; a second inductor having one terminal connected to a ground; a MOS transistor having a gate connected to the first inductor, a source connected to the other terminal of the second inductor, and a drain transmitting a signal; and a variable capacitor connected between the source and gate of the MOS transistor and varying an input matching frequency at the input terminal.Type: ApplicationFiled: September 29, 2005Publication date: June 22, 2006Inventors: Seon-Ho Han, Mun-Yang Park, Hyun-Kyu Yu
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Publication number: 20060119435Abstract: Provided is a power amplifier which fits to a deep-submicron technology in radio frequency wireless communication. The power amplifier includes a cascode including a first transistor which receives and amplifies an input signal, and a second transistor which is connected to the first transistor in series and operated by a DC bias voltage; a third transistor which is connected between the cascode and an output end, operated by a dynamic gate bias and outputting a signal; and a voltage divider which includes first and second capacitors that are connected between the output end, i.e. a drain of the third transistor, and a ground in series, and provides the dynamic bias to a gate of the third transistor.Type: ApplicationFiled: November 4, 2005Publication date: June 8, 2006Inventors: Hyoung-Seok Oh, Hyun-Kyu Yu, Mun-Yang Park, Cheon-Soo Kim
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Patent number: 7046089Abstract: Disclosed is a CMOS variable gain amplifier. The variable gain amplifier comprises a first means for first and second differential input voltages, a second means for controlling its transconductance to generate an output current according to a control voltage, a third means for a bias voltage to generate bias current by current mirror, and to supply a stabilized bias current to the second means using the replica current, and a fourth means for generating an output voltage with a variable gain according to control voltage by its output current generated in the second means. Therefore, the present invention provides a function of controlling low distortion and high linearity in low voltage and a high-speed operation by the supply of a stabilized sharing current bias, and can control a voltage gain in a wide range by the control voltage.Type: GrantFiled: December 8, 2003Date of Patent: May 16, 2006Assignee: Electronics and Telecommunications Research InstituteInventors: Chong Ki Kwon, Gyu Hyung Cho, Mun Yang Park, Jong Dae Kim