Patents by Inventor Munehiro Azami

Munehiro Azami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10916319
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node a rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: February 9, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Publication number: 20200082895
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node a rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Application
    Filed: September 20, 2019
    Publication date: March 12, 2020
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 10424390
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: September 24, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 10304399
    Abstract: A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1 becomes a high level, each of TFTs (101, 103) is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT (102) is increased to (VDD?V thN) and the gate is floated. TFT (102) is thus turned on. Then CK1 becomes low level and each of TFTs (101, 103) is turned off. Simultaneously, CK3 becomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT (102) is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (104), so that the high level appearing at the signal output section (Out) becomes equal to VDD.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: May 28, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shou Nagao, Munehiro Azami, Yoshifumi Tanada
  • Publication number: 20190147969
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Application
    Filed: October 17, 2018
    Publication date: May 16, 2019
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 10263059
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: April 16, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20180364047
    Abstract: An estimation device includes a detecting unit that detects acceleration; an acquiring unit that acquires a feature value that is based on the acceleration; and an estimation unit that estimates a speed based on a limit value of the feature value.
    Type: Application
    Filed: March 6, 2018
    Publication date: December 20, 2018
    Applicant: YAHOO JAPAN CORPORATION
    Inventor: Munehiro AZAMI
  • Patent number: 10109368
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: October 23, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Publication number: 20180254311
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Application
    Filed: February 28, 2018
    Publication date: September 6, 2018
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20180122492
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 3, 2018
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 9911801
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: March 6, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20180054709
    Abstract: An estimation device disclosed herein includes a detection unit, an acquisition unit, and an estimation unit. The detection unit detects acceleration in a moving object. The acquisition unit acquires speed of the moving object. The estimation unit estimates a movement direction of the moving object based on a direction of the acceleration detected by the detection unit when the speed acquired by the acquisition unit changes.
    Type: Application
    Filed: August 14, 2017
    Publication date: February 22, 2018
    Applicant: YAHOO JAPAN CORPORATION
    Inventor: Munehiro AZAMI
  • Patent number: 9897449
    Abstract: A determination device includes a detection unit that detects acceleration. The determination device includes a setting unit that sets a reference direction based on the acceleration detected by the detection unit. The determination device includes an acquisition unit that acquires a characteristic amount based on acceleration in a direction with respect to the reference direction set by the setting unit. The determination device includes a determination unit that determines a traveling state of a terminal device by using the characteristic amount acquired by the acquisition unit.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: February 20, 2018
    Assignee: YAHOO JAPAN CORPORATION
    Inventor: Munehiro Azami
  • Patent number: 9812218
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: November 7, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Publication number: 20170271426
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Application
    Filed: June 6, 2017
    Publication date: September 21, 2017
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20170241786
    Abstract: According to one aspect of an embodiment an estimation device includes a detection unit that detects a predetermined physical state that is produced at a time of movement. The estimation device includes an estimation unit that estimates a moving velocity from a state detected by the detection unit, by using a learner that has learned a velocity zone with the physical state being produced therefrom.
    Type: Application
    Filed: December 12, 2016
    Publication date: August 24, 2017
    Applicant: YAHOO JAPAN CORPORATION
    Inventors: Yuki OHIRA, Munehiro AZAMI
  • Publication number: 20170243554
    Abstract: A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1 becomes a high level, each of TFTs (101, 103) is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT (102) is increased to (VDD?V thN) and the gate is floated. TFT (102) is thus turned on. Then CK1 becomes low level and each of TFTs (101, 103) is turned off. Simultaneously, CK3 becomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT (102) is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (104), so that the high level appearing at the signal output section (Out) becomes equal to VDD.
    Type: Application
    Filed: March 2, 2017
    Publication date: August 24, 2017
    Inventors: Shou Nagao, Munehiro Azami, Yoshifumi Tanada
  • Patent number: 9679955
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: June 13, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20170160088
    Abstract: A determination device includes a detection unit that detects acceleration. The determination device includes a setting unit that sets a reference direction based on the acceleration detected by the detection unit. The determination device includes an acquisition unit that acquires a characteristic amount based on acceleration in a direction with respect to the reference direction act by the setting unit. The determination device includes a determination unit that determines a traveling state of a terminal device by using the characteristic amount acquired by the acquisition unit.
    Type: Application
    Filed: August 29, 2016
    Publication date: June 8, 2017
    Applicant: YAHOO JAPAN CORPORATION
    Inventor: Munehiro AZAMI
  • Publication number: 20170076820
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Application
    Filed: November 4, 2016
    Publication date: March 16, 2017
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada