Patents by Inventor Munehiro Azami

Munehiro Azami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150065162
    Abstract: A position specifying server includes a storage unit, a communication unit, an estimation unit, and a specifying unit. The storage unit stores GMMs corresponding to base stations of radio waves receivable by a terminal device on each floor. The communication unit receives measured values of the radio wave strengths of the radio waves which the terminal device receives from the base stations. The estimation unit estimates a position of the terminal device for each floor based on the received measured values of the radio wave strengths and the GMMs. The specifying unit calculates the estimated values of the radio wave strengths at the estimated position of the terminal device on each floor based on the GMMs and specifies the floor on which the terminal device is present based on the calculated estimated values of the radio wave strengths and the measured values of the radio wave strengths.
    Type: Application
    Filed: September 10, 2013
    Publication date: March 5, 2015
    Applicant: YAHOO JAPAN CORPORATION
    Inventor: Munehiro AZAMI
  • Patent number: 8970576
    Abstract: A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one D/A converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a D/A converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each D/A converter circuit, the grey-scale electric power supply lines connected to each D/A converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: March 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Patent number: 8952385
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20150035033
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Application
    Filed: July 3, 2014
    Publication date: February 5, 2015
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20140327008
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Application
    Filed: July 16, 2014
    Publication date: November 6, 2014
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 8854084
    Abstract: A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: October 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Shionoiri, Kiyoshi Kato, Munehiro Azami
  • Patent number: 8786533
    Abstract: A pulse is input to first and second TFTs to turn ON the first and second TFTs so that the potential of a node a rises. When the potential of the node a reaches (VDD?VthN), the node ? enters a floating state. Accordingly, a third TFT then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the third TFT further rises due to an operation of capacitance as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the third TFT.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: July 22, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 8779431
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: July 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20140159045
    Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node ? into a floating state. When the node ? is in the floating state, a potential of the node ? is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD?GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    Type: Application
    Filed: February 14, 2014
    Publication date: June 12, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 8665197
    Abstract: A pulse is input to first and second TFTs to turn ON the first and second TFTs so that the potential of a node a rises. When the potential of the node a reaches (VDD?VthN), the node ? enters a floating state. Accordingly, a third TFT then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the third TFT further rises due to an operation of capacitance as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the third TFT.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: March 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 8659532
    Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node ? into a floating state. When the node ? is in the floating state, a potential of the node ? is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: February 25, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Publication number: 20140035671
    Abstract: A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.
    Type: Application
    Filed: October 8, 2013
    Publication date: February 6, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Shionoiri, Kiyoshi Kato, Munehiro Azami
  • Publication number: 20140021459
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Application
    Filed: September 26, 2013
    Publication date: January 23, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Patent number: 8581631
    Abstract: A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: November 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Shionoiri, Kiyoshi Kato, Munehiro Azami
  • Patent number: 8546825
    Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: October 1, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Tatsuya Arao, Munehiro Azami
  • Publication number: 20130249890
    Abstract: A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one D/A converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a D/A converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each D/A converter circuit, the grey-scale electric power supply lines connected to each D/A converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed.
    Type: Application
    Filed: May 17, 2013
    Publication date: September 26, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro AZAMI
  • Patent number: 8446353
    Abstract: A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one D/A converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a D/A converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each D/A converter circuit, the grey-scale electric power supply lines connected to each D/A converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: May 21, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Publication number: 20130063328
    Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node ? into a floating state. When the node ? is in the floating state, a potential of the node ? is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD?GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 14, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Munehiro AZAMI, Shou NAGAO, Yoshifumi TANADA
  • Publication number: 20130057161
    Abstract: A pulse is input to first and second TFTs to turn ON the first and second TFTs so that the potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? enters a floating state. Accordingly, a third TFT then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the third TFT further rises due to an operation of capacitance as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the third TFT.
    Type: Application
    Filed: September 6, 2012
    Publication date: March 7, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 8330498
    Abstract: A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: December 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Shionoiri, Kiyoshi Kato, Munehiro Azami