Abstract: A method of forming a resistive memory element comprises forming an oxide material over a first electrode. The oxide material is exposed to a plasma process to form a treated oxide material. A second electrode is formed on the treated oxide material. Additional methods of forming a resistive memory element, as well as related resistive memory elements, resistive memory cells, and resistive memory devices are also described.

Abstract: An example memory cell may have at least a tunneling region disposed between a conducting region and a metal region, wherein the tunneling region can have at least an active interface regio disposed between a first tunneling barrier and a second tunneling barrier. A high resistive film is formed in the interface region with migration of ions from both the metal and conducting regions responsive to a write current to program the memory cell to a selected resistive state.

Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: A resistive sense memory cell includes a layer of crystalline praseodymium calcium manganese oxide and a layer of amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack. A first and second electrode are separated by the resistive sense memory stack. The resistive sense memory cell can further include an oxygen diffusion barrier layer separating the layer of crystalline praseodymium calcium manganese oxide from the layer of amorphous praseodymium calcium manganese oxide a layer. Methods include depositing an amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack.

Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: A resistive sense memory cell includes a layer of crystalline praseodymium calcium manganese oxide and a layer of amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack. A first and second electrode are separated by the resistive sense memory stack. The resistive sense memory cell can further include an oxygen diffusion barrier layer separating the layer of crystalline praseodymium calcium manganese oxide from the layer of amorphous praseodymium calcium manganese oxide a layer. Methods include depositing an amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack.

Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: A method and apparatus for protecting an electrical device using a non-volatile memory cell, such as an STRAM or RRAM memory cell. In some embodiments, a memory element is connected in parallel with a sensor element, where the memory element is configured to be repetitively reprogrammable between a high resistance state and a low resistance state. The memory element is programmed to the low resistance state when the sensor element is in a non-operational state and reprogrammed to the high resistance state when the sensor element is in an operational state.

Abstract: A non-volatile memory cell and method of use therefore are disclosed. In accordance with various embodiments, the memory cell comprises a tunneling region disposed between a conducting region and a metal region, wherein the tunneling region comprises an active interface region disposed between a first tunneling barrier and a second tunneling barrier. A high resistive film is formed in the active interface region with migration of ions from both the metal and conducting regions responsive to a write current to program the memory cell to a selected resistive state.

Abstract: A resistive sense memory cell includes a layer of crystalline praseodymium calcium manganese oxide and a layer of amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack. A first and second electrode are separated by the resistive sense memory stack. The resistive sense memory cell can further include an oxygen diffusion barrier layer separating the layer of crystalline praseodymium calcium manganese oxide from the layer of amorphous praseodymium calcium manganese oxide a layer. Methods include depositing an amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack.

Abstract: A method and apparatus for protecting an electrical device using a non-volatile memory cell, such as an STRAM or RRAM memory cell. In some embodiments, a memory element is connected in parallel with a sensor element, where the memory element is configured to be repetitively reprogrammable between a high resistance state and a low resistance state. The memory element is programmed to the low resistance state when the sensor element is in a non-operational state and reprogrammed to the high resistance state when the sensor element is in an operational state.

Abstract: Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Abstract: Memory elements and methods for making memory elements. One method of making a memory element includes forming a first electrode, forming an electrically conductive current densifying element and a memory cell on the first electrode, the memory cell and the current densifying element adjacent to each other. A second electrode is formed over the current densifying element and the memory cell. The memory elements may be resistance random access memory elements.

Abstract: A microelectronic programmable structure suitable for storing information and array including the structure and methods of forming and programming the structure are disclosed. The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure, and thus information may be stored using the structure.

Abstract: A programmable logic circuit, including programmable memory element, suitable for microprocessor applications, and a method of using the circuit are disclosed. The programmable circuit includes at least one logic cell, columns and rows of wires coupled to the logic cell, and a programmable memory element located at the intersection of two wires. The programmable element acts as a switch and as memory for the logic circuit.

Abstract: A microelectronic programmable structure suitable for storing information, and array including the structure and methods of forming and programming the structure are disclosed. The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure, and thus information may be stored using the structure.

Abstract: A microelectronic programmable structure suitable for storing information, a device including the structure and methods of forming and programming the structure are disclosed. The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure, and thus information may be stored using the structure.

Abstract: A microelectronic programmable structure suitable for storing information, a device including the structure and methods of forming and programming the structure are disclosed. The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure, and thus information may be stored using the structure.