Patents by Inventor Mutsuhiro Mori

Mutsuhiro Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170317075
    Abstract: A diode includes an anode electrode layer; a cathode electrode layer; a buffer layer of a first conductivity type formed between the anode electrode layer and the cathode electrode layer in a region extending to a location at a distance of 30 ?m or more from the cathode electrode layer; a first semiconductor layer of the first conductivity type formed in a region between the anode electrode layer and the cathode electrode layer, and being in contact with the buffer layer of the first conductivity type; and a second semiconductor layer of a second conductivity type formed in a region between the anode electrode layer and the first semiconductor layer of the first conductivity type. The carrier concentration in the first semiconductor layer is lower than the carrier concentration in the buffer layer. The carrier concentration in the buffer layer is less than 1×1015 cm?3.
    Type: Application
    Filed: April 24, 2017
    Publication date: November 2, 2017
    Inventors: Taiga ARAI, Masatoshi WAKAGI, Tetsuya ISHIMARU, Mutsuhiro MORI
  • Patent number: 9780660
    Abstract: An apparatus is adapted to drive an insulating gate-type semiconductor element by a first control voltage and a second control voltage, that are supplied to a first insulating gate and a second insulating gate, respectively, and includes a first noise filter inputting a signal about current that passes through the insulating gate-type semiconductor element, a first comparator making a comparison between an output signal of the first noise filter and a first reference signal and outputting a first comparison result, a first control voltage output circuit, and a second control voltage output circuit, the second control voltage output circuit being adapted to reduce the second control voltage when it is determined from the first comparison result that overcurrent passes through the insulating gate-type semiconductor element, the first control voltage output circuit being adapted to reduce the first control voltage after the second control voltage is reduced.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: October 3, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori
  • Publication number: 20170263516
    Abstract: Provided is a semiconductor device including: a first external electrode which includes a circular outer peripheral portion; a MOSFET chip; a control circuit chip which receives voltages of a drain electrode and a source electrode of the MOSFET and supplies a signal to a gate electrode to control the MOSFET on the basis of the voltage; a second external electrode which is disposed on an opposite side of the first external electrode with respect to the MOSFET chip and includes an external terminal on a center axis of the circular outer peripheral portion of the first external electrode; and an isolation substrate which isolates the control circuit chip from the external electrode. The first external electrode, the drain electrode and the source electrode of the MOSFET chip, and the second external electrode are disposed to be overlapped in a direction of the center axis. The drain electrode of the MOSFET chip and the first external electrode are connected.
    Type: Application
    Filed: August 19, 2015
    Publication date: September 14, 2017
    Inventors: Tetsuya ISHIMARU, Mutsuhiro MORI, Shinichi KURITA, Shigeru SUGAYAMA, Junichi SAKANO, Kohhei ONDA
  • Publication number: 20170236768
    Abstract: A heat-dissipating structure is formed by bonding a first member and a second member, each being any of a metal, ceramic, and semiconductor, via a die bonding member; or a semiconductor module formed by bonding a semiconductor chip, a metal wire, a ceramic insulating substrate, and a heat-dissipating base substrate including metal, with a die bonding member interposed between each. At least one of the die bonding members includes a lead-free low-melting-point glass composition and metal particles. The lead-free low-melting-point glass composition accounts for 78 mol % or more in terms of the total of the oxides V2O5, TeO2, and Ag2O serving as main ingredients. The content of each of TeO2 and Ag2O is 1 to 2 times the content of V2O5, and at least one of BaO, WO3, and P2O5 is included as accessory ingredients, and at least one of Y2O3, La2O3, and Al2O3 is included as additional ingredients.
    Type: Application
    Filed: September 9, 2015
    Publication date: August 17, 2017
    Applicant: HITACHI, LTD.
    Inventors: Takashi NAITO, Motomune KODAMA, Takuya AOYAGI, Shigeru KIKUCHI, Takashi NOGAWA, Mutsuhiro MORI, Eiichi IDE, Toshiaki MORITA, Akitoyo KONNO, Taigo ONODERA, Tatsuya MIYAKE, Akihiko MIYAUCHI
  • Publication number: 20170141677
    Abstract: The present invention provides a switching device (100) for power conversion in which a first gate electrode (6), a p-type channel layer (2) having an n-type emitter region (3), a second gate electrode (13), and a p-type floating layer (15) are repeatedly arranged in order on the surface side of an n?type semiconductor substrate (1). An interval a between the two gates (6, 13) that sandwich the p-type channel layer (2) is configured to be smaller than an interval b between the two gates (13, 6) that sandwich the p-type floating layer (15). The first gate electrode (6) and the second gate electrode (13) are both supplied with drive signals having a time difference in drive timing.
    Type: Application
    Filed: January 31, 2017
    Publication date: May 18, 2017
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI, Masahiro MASUNAGA
  • Patent number: 9654027
    Abstract: A semiconductor device is provided that can prevent a current from being concentrated into a specific chip, and can reduce loss as well as noise. The semiconductor device according to the present invention includes: a switching element; a main diode that is connected in parallel to the switching element; and an auxiliary diode that is connected in parallel to the switching element and has a different structure from that of the main diode, wherein in a conductive state a current flowing through the auxiliary diode is smaller than that through the main diode, and in a transition period from the conductive state to a non-conductive state a current flowing through the auxiliary diode is larger than that through the main diode.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: May 16, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hirao, Mutsuhiro Mori
  • Patent number: 9595602
    Abstract: The present invention provides a switching device (100) for power conversion in which a first gate electrode (6), a p-type channel layer (2) having an n-type emitter region (3), a second gate electrode (13), and a p-type floating layer (15) are repeatedly arranged in order on the surface side of an n-type semiconductor substrate (1). An interval a between the two gates (6, 13) that sandwich the p-type channel layer (2) is configured to be smaller than an interval b between the two gates (13, 6) that sandwich the p-type floating layer (15). The first gate electrode (6) and the second gate electrode (13) are both supplied with drive signals having a time difference in drive timing.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: March 14, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori, Masahiro Masunaga
  • Publication number: 20160315553
    Abstract: A rectifier including an autonomous type synchronous-rectification MOSFET is provided, which prevents chattering and through-current caused by a malfunction when a noise is applied. The rectifier includes: a rectification MOSFET for performing synchronous rectification; a determination circuit configured to input a voltage between a pair of main terminals of the rectification MOSFET, and to determine whether the rectification MOSFET is in on or off state on the basis of the inputted voltage; and a gate drive circuit configured such that a gate of the rectification MOSFET is turned on and off by a comparison signal from the determination circuit, and such that a time required to boost a gate voltage when the rectification MOSFET is turned on is longer than a time required to lower the gate voltage when the rectification MOSFET is turned off.
    Type: Application
    Filed: December 12, 2014
    Publication date: October 27, 2016
    Inventors: Tetsuya ISHIMARU, Kohhei ONDA, Junichi SAKANO, Mutsuhiro MORI
  • Publication number: 20160315184
    Abstract: The semiconductor device has a first external electrode having an outer peripheral section, which has a circular shape in top plan view and which is to be attached to an alternator. On the first external electrode there mounted: a MOSFET chip; a control circuitry to which voltages at or a current flowing between a first main terminal and a second main terminal of the MOSFET chip is inputted and which generates, on the basis of the voltages or the current, a control signal applied to a gate of the MOSFET chip; and a capacitor for providing a power supply to the control circuitry. The semiconductor device further has a second external electrode disposed opposite to the first external electrode with respect to the MOSFET chip. An electrical connection is made between the first main terminal of the MOSFET chip and the first external electrode, and between the second main terminal of the MOSFET chip and the second external electrode.
    Type: Application
    Filed: December 12, 2014
    Publication date: October 27, 2016
    Inventors: Tetsuya ISHIMARU, Mutsuhiro MORI, Junichi SAKANO, Kohhei ONDA
  • Patent number: 9349847
    Abstract: A semiconductor device of this invention (an IGBT with a built-in diode) includes: an n?-type drift layer 1; a p-type channel region 2 that is arranged in contact with the surface side of this n?-type drift layer 1; a gate electrode 5 that is provided in a trench T provided so as to penetrate this p-type channel region 2 and reach to the n?-type drift layer 1 through a gate insulating film 3; an n-type source region 4 that is provided so as to contact the trench T on the surface side of the p-type channel region 2; a high-concentration n-type region 6 that is arranged in contact with the back side of the n?-type drift layer 1; and a high-concentration p-type region 7 that is arranged in contact with the back side of this high-concentration n-type region 6; in which a junction of the high-concentration n-type region 6 and the high-concentration p-type region 7 is a tunnel junction. According to this semiconductor device, it is possible to form the IGBT and the diode on a single chip.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: May 24, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori
  • Publication number: 20160118891
    Abstract: An apparatus is adapted to drive an insulating gate-type semiconductor element by a first control voltage and a second control voltage, that are supplied to a first insulating gate and a second insulating gate, respectively, and includes a first noise filter inputting a signal about current that passes through the insulating gate-type semiconductor element, a first comparator making a comparison between an output signal of the first noise filter and a first reference signal and outputting a first comparison result, a first control voltage output circuit, and a second control voltage output circuit, the second control voltage output circuit being adapted to reduce the second control voltage when it is determined from the first comparison result that overcurrent passes through the insulating gate-type semiconductor element, the first control voltage output circuit being adapted to reduce the first control voltage after the second control voltage is reduced.
    Type: Application
    Filed: May 10, 2013
    Publication date: April 28, 2016
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI
  • Patent number: 9306047
    Abstract: There is provided a semiconductor device including a first emitter layer of a first conductivity type, a drift layer of a second conductivity type, adjacent to the first emitter layer, a channel layer of the first conductivity type, adjacent to the drift layer, a second emitter layer of the second conductivity type, adjacent to the channel layer, a collector electrode electrically coupled to the first emitter layer, an emitter electrode electrically coupled to the second emitter layer, a first trench-gate electrode for controlling on and off of an electric current flowing between the collector electrode and the emitter electrode, and a second trench-gate electrode for controlling a turn-off power loss. The semiconductor device further includes a thyristor unit made up of the first emitter layer, the drift layer, the channel layer, and the second emitter layer.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: April 5, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori, Masahiro Masunaga
  • Publication number: 20160013300
    Abstract: A semiconductor device according to the present invention includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type adjacent to the first semiconductor layer and having an impurity concentration lower than the first semiconductor layer; a third semiconductor layer of a second conductivity type adjacent to the second semiconductor layer; a fourth semiconductor layer of the first conductivity type located within the third semiconductor layer; a first electrode coupled to the third semiconductor layer and the fourth semiconductor layer; a second electrode coupled to the first semiconductor layer; and an insulated gate provided over the respective surfaces of the third semiconductor layer and the fourth semiconductor layer, wherein peak value of the impurity concentration of the third semiconductor layer is in the range of 2×1016 cm?3 or more and 5×1018 cm?3 or less.
    Type: Application
    Filed: February 25, 2013
    Publication date: January 14, 2016
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI
  • Publication number: 20160013299
    Abstract: A semiconductor device according to the present invention includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type, which is adjacent to the first semiconductor layer and has an impurity concentration lower than the first semiconductor layer; a third semiconductor layer adjacent to the second semiconductor layer; a first electrode electrically coupled to the third semiconductor layer; a second electrode electrically coupled to the first semiconductor layer; and an insulated gate provided over the surface of the third semiconductor layer. Then, an end portion of the insulated gate is located at a position distant from the junction part between the second semiconductor layer and the third semiconductor layer within the surface of the third semiconductor layer.
    Type: Application
    Filed: February 25, 2013
    Publication date: January 14, 2016
    Applicant: Hitachi, Ltd.
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI
  • Publication number: 20150340965
    Abstract: A semiconductor device is provided that can prevent a current from being concentrated into a specific chip, and can reduce loss as well as noise. The semiconductor device according to the present invention includes: a switching element; a main diode that is connected in parallel to the switching element; and an auxiliary diode that is connected in parallel to the switching element and has a different structure from that of the main diode, wherein in a conductive state a current flowing through the auxiliary diode is smaller than that through the main diode, and in a transition period from the conductive state to a non-conductive state a current flowing through the auxiliary diode is larger than that through the main diode.
    Type: Application
    Filed: May 22, 2015
    Publication date: November 26, 2015
    Inventors: Takashi HIRAO, Mutsuhiro MORI
  • Patent number: 9196563
    Abstract: Bondability and heat conductivity of a bonded body in which some of metal, ceramic, or semiconductor are bonded to each other are improved. In the bonded body in which a first member and a second member each comprise one of metal, ceramic, or semiconductor are bonded to each other, the second member is bonded to the first member by way of an adhesive member disposed to the surface of the first member, and the adhesive member contains a V2O5-containing glass and metal particles.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: November 24, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Yuichi Sawai, Takashi Naito, Takuya Aoyagi, Tadashi Fujieda, Mutsuhiro Mori
  • Publication number: 20150303288
    Abstract: The present invention provides a switching device (100) for power conversion in which a first gate electrode (6), a p-type channel layer (2) having an n-type emitter region (3), a second gate electrode (13), and a p-type floating layer (15) are repeatedly arranged in order on the surface side of an n-type semiconductor substrate (1). An interval a between the two gates (6, 13) that sandwich the p-type channel layer (2) is configured to be smaller than an interval b between the two gates (13, 6) that sandwich the p-type floating layer (15). The first gate electrode (6) and the second gate electrode (13) are both supplied with drive signals having a time difference in drive timing.
    Type: Application
    Filed: September 7, 2012
    Publication date: October 22, 2015
    Applicant: Hitachi, Ltd.
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI, Masahiro MASUNAGA
  • Publication number: 20150303268
    Abstract: It is an object of the present invention to provide a diode that can be produced with a simple method and performs a favorable recovery operation. The diode in accordance with the present invention includes a layer with a high concentration of dopants and a layer with a low concentration of dopants, and the layer with a low concentration of dopants further includes a layer with a different activation rate from other potions (see FIG. 1).
    Type: Application
    Filed: December 3, 2013
    Publication date: October 22, 2015
    Applicant: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Tetsuya Ishimaru, Mutsuhiro Mori
  • Publication number: 20150279979
    Abstract: There is provided a semiconductor device including a first emitter layer of a first conductivity type, a drift layer of a second conductivity type, adjacent to the first emitter layer, a channel layer of the first conductivity type, adjacent to the drift layer, a second emitter layer of the second conductivity type, adjacent to the channel layer, a collector electrode electrically coupled to the first emitter layer, an emitter electrode electrically coupled to the second emitter layer, a first trench-gate electrode for controlling on and off of an electric current flowing between the collector electrode and the emitter electrode, and a second trench-gate electrode for controlling a turn-off power loss. The semiconductor device further includes a thyristor unit made up of the first emitter layer, the drift layer, the channel layer, and the second emitter layer.
    Type: Application
    Filed: October 5, 2012
    Publication date: October 1, 2015
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori, Masahiro Masunaga
  • Patent number: 9082814
    Abstract: A semiconductor device includes first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type that is formed near a surface of the first semiconductor layer; a first main electrode that is electrically connected to the second semiconductor layer; a third semiconductor layer of the second conductivity type that neighbors the first semiconductor layer; a fourth semiconductor layer of the first conductivity type that is selectively disposed in an upper portion of the third semiconductor layer; a second main electrode that is electrically connected to the third semiconductor layer and the fourth semiconductor layer; a trench whose side face is in contact with the third semiconductor layer and the fourth semiconductor layer; a gate electrode that is formed along the side face of the trench by a sidewall of polysilicon; and a polysilicon electrode.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: July 14, 2015
    Assignee: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Masaki Shiraishi, Mutsuhiro Mori, Hiroshi Suzuki, So Watanabe