Patents by Inventor Mutsumi Hosoya

Mutsumi Hosoya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100082916
    Abstract: Provided is a unit for protecting data with respect to data transfer between memories of a disk controller. The disk controller for controlling data transfer between a host computer and a disk drive includes: a channel unit having a channel memory; a cache unit having a cache memory, and a control unit for controlling the data transfer. The data transferred to/from the host computer is transferred in a packet between the channel memory and the cache memory, and The control unit for verifying consistency of information included in a header of the packet to be transferred to decide whether transfer can be permitted when the packet is transferred.
    Type: Application
    Filed: December 4, 2009
    Publication date: April 1, 2010
    Applicant: Hitachi, Ltd.
    Inventor: Mutsumi HOSOYA
  • Patent number: 7640365
    Abstract: Provided is a unit for protecting data with respect to data transfer between memories of a disk controller. The disk controller for controlling data transfer between a host computer and a disk drive includes: a channel unit having a channel memory; a cache unit having a cache memory, and a control unit for controlling the data transfer. The data transferred to/from the host computer is transferred in a packet between the channel memory and the cache memory, and The control unit for verifying consistency of information included in a header of the packet to be transferred to decide whether transfer can be permitted when the packet is transferred.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: December 29, 2009
    Assignee: Hitachi, Ltd.
    Inventor: Mutsumi Hosoya
  • Publication number: 20090254507
    Abstract: A storage controller of the present invention narrows down the target for data comparison by comparing hash codes beforehand and rapidly detects duplicated data. A hash value setting unit sets a hash code in data received from a host. Hash code-attached data is stored in a logical volume. A microprocessor unit compares the hash codes for each comparison-targeted data. When hash codes match with one another, a data comparator compares the target data, and determines whether or not the data is duplicated data. When duplicated data is detected, the microprocessor unit removes the duplicated data.
    Type: Application
    Filed: June 10, 2008
    Publication date: October 8, 2009
    Inventors: Mutsumi HOSOYA, Horoshi KANAYAMA, Wataru MINETA
  • Patent number: 7594074
    Abstract: To provide a storage system with a cost/performance meeting the system scale, from a small-scale to a large-scale configuration. In the storage system, protocol transformation units and data caching control units are connected to each other through an interconnection, the data caching control units are divided into plural control clusters, each of the control clusters including at least two or more data caching control units, control of a cache memory is conducted independently for each of the control clusters, and one of the plural data caching control units manages, as a single system, protocol transformation units and the plural control clusters based on management information stored in a system management information memory unit.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: September 22, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Naoki Watanabe, Kentaro Shimada
  • Patent number: 7587551
    Abstract: Provided is a storage system having improved access performance. The storage system includes: a hard disk drive, and a storage controller for reading/writing data from/to the hard disk drive, the storage controller including: at least one interface connected to a host computer through a network; and a plurality of processors connected to the interface through an internal network. The storage system is characterized in that: the processor provides at least one logical access port to the host computer; and the interface stores routing information including a processor which processes an access request addressed to the logical access port, extracts an address from the received access request upon reception of the access request from the host computer, specifies the processor which processes the received access request based on the routing information and the extracted address, and transfers the received access request to the specified processor.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: September 8, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Akira Fujibayashi, Shuji Nakamura, Mutsumi Hosoya
  • Patent number: 7571280
    Abstract: A storage system 1 includes: plural protocol transformation units 10 that transform, to a protocol within the system, a read/write protocol of data exchanged with servers 3 or hard disk groups 2; plural cache control units 21 that include cache memory units 111 storing data read/written with the servers 3 or the hard disk groups 2 and which include the function of controlling the cache memory units 111; and an interconnection network 31 that connects the protocol transformation units 10 and the cache control units 21. In this storage system 1, the plural cache control units 21 are divided into plural control clusters 70, control of the cache memory units 111 is independent inside the control clusters, and a system management unit 60 that manages, as a single system, the plural protocol transformation units 10 and the plural control clusters 70 is connected to the interconnection network 30.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: August 4, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Kentaro Shimada, Akira Yamamoto, Naoko Iwami, Yasutomo Yamamoto
  • Publication number: 20090168784
    Abstract: Deadlock is avoided in a grid storage system having superior scalability. Provided is a storage subsystem connected to a host computer for receiving a write or read access from the host computer. This storage subsystem includes a plurality of modules respectively having a storage resource, a switch for connecting the plurality of modules, a controller for controlling the transfer of a packet based on the write or read access from the host computer to a target module among the plurality of modules via the switch, and a memory storing a transfer rule of the packet. The controller controls the transfer of the packet based on the transfer rule.
    Type: Application
    Filed: January 25, 2008
    Publication date: July 2, 2009
    Applicant: HITACHI, LTD.
    Inventors: Shuji NAKAMURA, Akira FUJIBAYASHI, Mutsumi HOSOYA, Hideaki FUKUDA
  • Publication number: 20090077272
    Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability.
    Type: Application
    Filed: November 12, 2008
    Publication date: March 19, 2009
    Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto, Kentaro Shimada
  • Patent number: 7469307
    Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: December 23, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto
  • Patent number: 7467238
    Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability. A storage system includes an interface unit having an interface with a server or hard drives, a memory unit, a processor unit, and an interconnection.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: December 16, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto, Kentaro Shimada
  • Publication number: 20080270701
    Abstract: A storage system 1 includes: plural protocol transformation units 10 that transform, to a protocol within the system, a read/write protocol of data exchanged with servers 3 or hard disk groups 2; plural cache control units 21 that include cache memory units 111 storing data read/written with the servers 3 or the hard disk groups 2 and which include the function of controlling the cache memory units 111; and an interconnection network 31 that connects the protocol transformation units 10 and the cache control units 21. In this storage system 1, the plural cache control units 21 are divided into plural control clusters 70, control of the cache memory units 111 is independent inside the control clusters, and a system management unit 60 that manages, as a single system, the plural protocol transformation units 10 and the plural control clusters 70 is connected to the interconnection network 30.
    Type: Application
    Filed: June 20, 2008
    Publication date: October 30, 2008
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Kentaro Shimada, Akira Yamamoto, Naoko Iwami, Yasutomo Yamamoto
  • Publication number: 20080263289
    Abstract: Provided are a storage controller and a storage control method capable of improving the transaction performance. This storage controller includes a disk controller for receiving a read command and a write command from a host computer, and an external disk controller and an internal disk device for sending and receiving data to and from the disk controller. A storage device of the external disk controller or the internal disk controller processes the access from the disk controller in physical sub-block units. When the disk controller is to access the storage device of the external disk controller or the internal disk device in logical sub-block units in which an additional code containing a guarantee code is added to user data, it makes such access in minimum common multiple units of logical sub-blocks and physical sub-blocks, and changes the guarantee code length.
    Type: Application
    Filed: January 11, 2008
    Publication date: October 23, 2008
    Inventors: Mutsumi Hosoya, Akira Fujibayashi
  • Publication number: 20080126603
    Abstract: Provided is a unit for protecting data with respect to data transfer between memories of a disk controller. The disk controller for controlling data transfer between a host computer and a disk drive includes: a channel unit having a channel memory; a cache unit having a cache memory, and a control unit for controlling the data transfer. The data transferred to/from the host computer is transferred in a packet between the channel memory and the cache memory, and The control unit for verifying consistency of information included in a header of the packet to be transferred to decide whether transfer can be permitted when the packet is transferred.
    Type: Application
    Filed: November 17, 2006
    Publication date: May 29, 2008
    Applicant: Hitachi, Ltd.
    Inventor: Mutsumi Hosoya
  • Publication number: 20080082746
    Abstract: The disk controller has a plurality of channel control units, a plurality of cache memories, a plurality of disk control units, and a plurality of internal switch units. Each channel control unit or disk control unit sends to one of the cache memory units a request packet requesting execution of processing. The cache memory unit sends a response packet in response to the received request packet. Each internal switch unit monitors the request packet sent from the channel control unit or disk control unit, and judges whether or not the response packet to the request packet has passed through the internal switch unit within a first given time period since the passage of the request packet. In the case where the response packet has not passed through the internal switch unit within the first given time period, the internal switch unit sends a failure notification.
    Type: Application
    Filed: December 12, 2006
    Publication date: April 3, 2008
    Applicant: Hitachi, Ltd.
    Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
  • Publication number: 20070245063
    Abstract: To provide a storage system with a cost/performance meeting the system scale, from a small-scale to a large-scale configuration. In the storage system, protocol transformation units and data caching control units are connected to each other through an interconnection, the data caching control units are divided into plural control clusters, each of the control clusters including at least two or more data caching control units, control of a cache memory is conducted independently for each of the control clusters, and one of the plural data caching control units manages, as a single system, protocol transformation units and the plural control clusters based on management information stored in a system management information memory unit.
    Type: Application
    Filed: June 12, 2007
    Publication date: October 18, 2007
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Naoki Watanabe, Kentaro Shimada
  • Publication number: 20070201434
    Abstract: In order to efficiently utilize processor resources, a storage system according to this invention includes: a protocol processor; a processor; a local router; a first memory; and a disk drive. In the storage system, the protocol processor transmits, upon transmitting a frame to the host computer, information on a transmission state of the frame to the local router, and the local router determines, upon the protocol processor receiving a frame, which of the processors processes the received frame, based on which a subject the received frame requests for an access to, transfers the received frame to the determined processor, determines, upon the protocol processor transmitting a frame, which of the processors processes information on a transmission state of the frame, based on an exchange of the transmitted frame, and transfers the information on the transmission state of the frame to the determined processor.
    Type: Application
    Filed: April 4, 2006
    Publication date: August 30, 2007
    Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
  • Publication number: 20070180188
    Abstract: Provided is a storage system having improved access performance. The storage system includes: a hard disk drive, and a storage controller for reading/writing data from/to the hard disk drive, the storage controller including: at least one interface connected to a host computer through a network; and a plurality of processors connected to the interface through an internal network. The storage system is characterized in that: the processor provides at least one logical access port to the host computer; and the interface stores routing information including a processor which processes an access request addressed to the logical access port, extracts an address from the received access request upon reception of the access request from the host computer, specifies the processor which processes the received access request based on the routing information and the extracted address, and transfers the received access request to the specified processor.
    Type: Application
    Filed: March 27, 2006
    Publication date: August 2, 2007
    Inventors: Akira Fujibayashi, Shuji Nakamura, Mutsumi Hosoya
  • Patent number: 7249220
    Abstract: To provide a storage system with a cost/performance meeting the system scale, from a small-scale to a large-scale configuration. In the storage system, protocol transformation units and data caching control units are connected to each other through an interconnection, the data caching control units are divided into plural control clusters, each of the control clusters including at least two or more data caching control units, control of a cache memory is conducted independently for each of the control clusters, and one of the plural data caching control units manages, as a single system, protocol transformation units and the plural control clusters based on management information stored in a system management information memory unit.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: July 24, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Naoki Watanabe, Kentaro Shimada
  • Patent number: 7231469
    Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: June 12, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto
  • Publication number: 20070130385
    Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability.
    Type: Application
    Filed: January 12, 2007
    Publication date: June 7, 2007
    Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto