Patents by Inventor Mutsumi Suzuki

Mutsumi Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060267480
    Abstract: The invention provides a display device using thin film type electron sources having a structure that can be formed in a simple manufacturing process. A lower electrode, a protective insulating layer and an interlayer film are formed on a cathode substrate. An upper bus electrode made from a laminated film of a metal film lower layer and a metal film upper layer is provided further on the interlayer film. A film of an upper electrode of a thin film type electron source for each pixel constituted by an insulating layer serving as an electron accelerating layer on the lower electrode and the upper electrode is formed on two stripe electrodes of the upper bus electrode in that pixel and another upper bus electrode in an adjacent pixel by sputtering. Then, the upper electrode is separated by self-alignment due to a setback portion of the metal film lower layer and an appentice of the metal film upper layer of the corresponding upper bus electrode.
    Type: Application
    Filed: August 10, 2006
    Publication date: November 30, 2006
    Inventors: Toshiaki Kusunoki, Masakazu Sagawa, Mutsumi Suzuki
  • Patent number: 7129641
    Abstract: The invention provides a display device using thin film type electron sources having a structure that can be formed in a simple manufacturing process. A lower electrode, a protective insulating layer and an interlayer film are formed on a cathode substrate. An upper bus electrode made from a laminated film of a metal film lower layer and a metal film upper layer is provided further on the interlayer film. A film of an upper electrode of a thin film type electron source for each pixel constituted by an insulating layer serving as an electron accelerating layer on the lower electrode and the upper electrode is formed on two stripe electrodes of the upper bus electrode in that pixel and another upper bus electrode in an adjacent pixel by sputtering. Then, the upper electrode is separated by self-alignment due to a setback portion of the metal film lower layer and an appentice of the metal film upper layer of the corresponding upper bus electrode.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: October 31, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Kusunoki, Masakazu Sagawa, Mutsumi Suzuki
  • Publication number: 20060221001
    Abstract: A display unit converts the image signal having the converted frame rate into an interlacing scanning format when the scanning frequency of a progressive image signal having the converted frame rate is higher than a predetermined value. The predetermined value corresponds to the maximum operation frequency of a display device or a drive circuit that drives the display device.
    Type: Application
    Filed: February 2, 2006
    Publication date: October 5, 2006
    Inventors: Takaaki Matono, Mutsumi Suzuki, Toshimitsu Watanabe, Fumio Haruna, Katsumi Ashizawa
  • Patent number: 7116291
    Abstract: The present invention provides an image display capable of reducing power used up or consumed by a thin-film electron-emitter matrix.
    Type: Grant
    Filed: September 4, 2000
    Date of Patent: October 3, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Suzuki, Toshiaki Kusunoki, Makoto Okai, Masakazu Sagawa, Akitoshi Ishizaka
  • Publication number: 20060202207
    Abstract: The present invention provides an image display device, by which it is possible to prevent dielectric breakdown between a bottom electrode and a top electrode (top electrode bus line), which make up thin-film type electron sources, and which is free of display defect and has longer service life. On a cathode substrate 10, a bottom electrode 11, a tunneling insulator 12, and a top electrode 13 are prepared. On a lower layer of the top electrode 13, a top electrode bus line 16 is formed, and the top electrode 13 is reliably connected to the top electrode bus line 16 via a contact electrode 15. A field insulator 12A, a lower layer 14a of the interlayer insulator deposited by sputtering and an upper layer 14b of the interlayer insulator are laminated between the top electrode 13 and the contact electrode and the bottom electrode 11, and the bottom electrode 11 is insulated from the top electrode 13 (top electrode bus line 16).
    Type: Application
    Filed: January 6, 2006
    Publication date: September 14, 2006
    Inventors: Masakazu Sagawa, Toshiaki Kusunoki, Kazutaka Tsuji, Mutsumi Suzuki
  • Publication number: 20060202605
    Abstract: The present invention provides an image display device free of display defects and with high reliability to prevent destruction of electron sources due to injection of electric charge. On the outermost periphery of a display region, there are provided a bottom electrode 11 serving as data line, a scan line bus 21 serving as scan line, and dummy potential fixing electrodes 11D1, 11D2, 21D1 and 21D2 not contributing to image display, and these are connected with electrodes 70 and 80 with low impedance and constant potential.
    Type: Application
    Filed: January 5, 2006
    Publication date: September 14, 2006
    Inventors: Masakazu Sagawa, Toshimitsu Watanabe, Yoshiro Mikami, Toshiaki Kusunoki, Mutsumi Suzuki
  • Publication number: 20060139248
    Abstract: A technique capable of displaying an efficient bright image in an image display apparatus using electron sources is provided. The image display apparatus includes a plurality of electron sources, and a plurality of phosphors provided so as to be opposed to the electron sources, light being emitted by the phosphors in response to electrons emitted from the electron sources. The electron sources are capacitive electron sources formed by sandwiching an insulation layer between two metal layers. And two capacitive electron sources electrically connected in series are disposed so as to be associated with each of the phosphors.
    Type: Application
    Filed: December 2, 2005
    Publication date: June 29, 2006
    Applicant: Hitachi, Ltd.
    Inventors: Toshimitsu Watanabe, Nobuaki Kabuto, Mutsumi Suzuki, Masakazu Sagawa
  • Publication number: 20060125730
    Abstract: A second interlayer insulation layer (15) is formed under an upper wiring electrode (16) serving as a power feed line to an upper electrode (13) in each thin-film type electron source array so as to prevent a failure of short-circuit. Further, an electron emission portion is limited by the second interlayer insulation layer (15) so as to cover defects unevenly distributed in the border between an electron acceleration layer (12) and a first interlayer insulation layer (14). Thus, a failure of time dependent insulation breakdown is suppressed.
    Type: Application
    Filed: October 18, 2002
    Publication date: June 15, 2006
    Inventors: Masakazu Sagawa, Toshiaki Susunoki, Mutsumi Suzuki
  • Publication number: 20060092115
    Abstract: The invention intends to realize long lifetime of electron-emitter elements and a display apparatus by preferably eliminating charges accumulated in the electron-emitter elements. The display apparatus of the invention has: a non-display period extending circuit for extending a non-display period of an input video signal to a period longer than the non-display period of the input video image and outputting the extended signal; a plurality of electron-emitter elements for emitting electrons on the basis of the video signal outputted from the non-display period extending circuit; and a scan driver having a pulse applying circuit for applying a pulse signal to the electron-emitter elements in the non-display period of the video signal extended by the non-display period extending circuit. A pulse width of the pulse signal is set to be longer in accordance with the extended non-display period.
    Type: Application
    Filed: August 26, 2005
    Publication date: May 4, 2006
    Applicant: Hitachi, Ltd.
    Inventors: Takaaki Matono, Mutsumi Suzuki, Toshimitsu Watanabe, Katsumi Ashizawa
  • Publication number: 20060038768
    Abstract: A display having hot electron type electron sources displaying an image by a line sequential scanning scheme is provided to prevent poor brightness uniformity along scan lines. The hot electron type electron source is provided with a top electrode bus line serving as a scan line and a bottom electrode bus line serving as a data line. The top electrode bus line has a sheet resistance lower than that of the bottom electrode. The wire sheet resistance of the scam line can be reduced to several m/square. When forming a 40 inch large screen FED using the hot electron type electron sources, a voltage drop amount produced in the scan line can be suppressed below an allowable range. As a result, high quality image without poor brightness uniformity can be obtained.
    Type: Application
    Filed: October 25, 2005
    Publication date: February 23, 2006
    Inventors: Masakazu Sagawa, Mutsumi Suzuki, Toshiaki Kusunoki
  • Patent number: 6975075
    Abstract: A display having hot electron type electron sources displaying an image by a line sequential scanning scheme is provided to prevent poor brightness uniformity along scan lines. The hot electron type electron source is provided with a top electrode bus line serving as a scan line and a bottom electrode bus line serving as a data line. The top electrode bus line has a sheet resistance lower than that of the bottom electrode. The wire sheet resistance of the scam line can be reduced to several m/square. When forming a 40 inch large screen FED using the hot electron type electron sources, a voltage drop amount produced in the scan line can be suppressed below an allowable range. As a result, high quality image without poor brightness uniformity can be obtained.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: December 13, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masakazu Sagawa, Mutsumi Suzuki, Toshiaki Kusunoki
  • Patent number: 6963171
    Abstract: In a cathode substrate of an FED, spacers lines exclusive for connecting spacers to the ground were necessary besides scan lines and data lines, and a cathode substrate having a three-layer line structure was used in the prior art. The present invention realizes a high-reliable cold cathode type flat panel display which is easily produced and keeps performance that can be obtained by the three-layer line structure, using a cathode substrate having a two-layer line structure. The line structure of a cathode substrate (10) of an FED is made into a two-layer structure. Hitherto, lines of the first layer are bottom electrodes (11) which constitute electron sources and have been used as scan lines, and top electrodes (13) of the second layer have been used as data lines. In the present invention, however, the bottom electrodes (11) and the top electrodes (13) are changed to data lines and scan lines, respectively.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: November 8, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masakazu Sagawa, Toshiaki Kusunoki, Mutsumi Suzuki, Nobuaki Kabuto
  • Publication number: 20050189866
    Abstract: A flat panel display apparatus includes a rear substrate in which a number of cold cathode devices for emitting electrons are formed on an insulative substrate; a display substrate in which phosphors are arranged in a matrix shape on a translucent substrate; supporting members which are arranged between the rear substrate and the display substrate and maintain intervals between them; and frame members, in which a space surrounded by the rear substrate, the display substrate, and the frame members is set to a vacuum atmosphere. It then becomes possible to provide an apparatus in which there is no remarkable change between a scanning line resistance value in the scanning line direction in a portion with spacers and that in a portion without a spacer, a luminance variation can be reduced, and the apparatus has a conduction connection structure of the spacers and the scanning lines.
    Type: Application
    Filed: January 27, 2005
    Publication date: September 1, 2005
    Applicant: Hitachi Ltd.
    Inventors: Yoshie Kodera, Tetsu Ohishi, Toshimitsu Watanabe, Mutsumi Suzuki, Masakazu Sagawa, Akinori Maeda
  • Publication number: 20050156533
    Abstract: A cold cathode type flat panel display which is an image display device including a vacuum panel container composed of a cathode substrate in which plural cold cathode type electron sources are arranged, an anode substrate, plural spacers for supporting the cathode substrate and the anode substrate, and a glass frame. Plural electrical lines extend in a line direction and a row direction across an interlayer insulator on the cathode substrate. Parts of lines positioned in an upper layer of the plural electrical lines are made into scan lines and lines positioned in a lower layer are made into data lines. Further, parts of the electrical lines positioned in the upper layer are made into ground lines for giving ground voltage to the spacers.
    Type: Application
    Filed: March 11, 2005
    Publication date: July 21, 2005
    Inventors: Masakazu Sagawa, Toshiaki Kusunoki, Mutsumi Suzuki, Nobuaki Kabuto
  • Publication number: 20050094429
    Abstract: A display having hot electron type electron sources displaying an image by a line sequential scanning scheme is provided to prevent poor brightness uniformity along scan lines. The hot electron type electron source is provided with a top electrode bus line serving as a scan line and a bottom electrode bus line serving as a data line. The top electrode bus line has a sheet resistance lower than that of the bottom electrode. The wire sheet resistance of the scam line can be reduced to several m/square. When forming a 40 inch large screen FED using the hot electron type electron sources, a voltage drop amount produced in the scan line can be suppressed below an allowable range. As a result, high quality image without poor brightness uniformity can be obtained.
    Type: Application
    Filed: December 7, 2004
    Publication date: May 5, 2005
    Inventors: Masakazu Sagawa, Mutsumi Suzuki, Toshiaki Kusunoki
  • Patent number: 6873309
    Abstract: A display apparatus includes: a plurality of luminance modulation elements each modulated in luminance by a voltage of a positive polarity applied thereto, each of the luminance modulation elements being not modulated in luminance by a voltage of an opposite polarity applied thereto; a plurality of first lines electrically coupled to first electrodes of the plurality of luminance modulation elements; a plurality of second lines electrically coupled to second electrodes of the plurality of luminance modulation elements, the plurality of second lines intersecting the plurality of first lines; a first drive unit coupled to the plurality of first lines, the first drive unit outputting scanning pulses; and a second driver unit coupled to the plurality of second lines. The first drive unit sets the first lines in a nonselection state to a high impedance state having a higher impedance as compared with the first lines in a selection state.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: March 29, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Suzuki, Toshiaki Kusunoki, Masakazu Sagawa
  • Patent number: 6873115
    Abstract: A display having hot electron type electron sources displaying an image by a line sequential scanning scheme is provided to prevent poor brightness uniformity along scan lines. The hot electron type electron source is provided with a top electrode bus line serving as a scan line and a bottom electrode bus line serving as a data line. The top electrode bus line has a sheet resistance lower than that of the bottom electrode. The wire sheet resistance of the scam line can be reduced to several m/square. When forming a 40 inch large screen FED using the hot electron type electron sources, a voltage drop amount produced in the scan line can be suppressed below an allowable range. As a result, high quality image without poor brightness uniformity can be obtained.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: March 29, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masakazu Sagawa, Mutsumi Suzuki, Toshiaki Kusunoki
  • Patent number: 6841946
    Abstract: An object of the present invention is to obtain excellent images which are free from distortion in a flat display apparatus including electron-emitter elements, phosphors, and spacers. A structure of the present invention is such that the display apparatus comprises a display panel including a first substrate having a plurality of electron-emitter elements, a second substrate having phosphors, and spacers; and driving means employing a line-sequential scanning method; wherein scan pulse output is performed by the driving means, and the driving means performs scanning in such a manner that a scan is performed in the direction of approaching a relevant one of the spacers from far. Thus, the present invention realizes the excellent display images which are free from distortion by largely reducing or eliminating influence of charging of the spacers to be exerted on the images.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: January 11, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Suzuki, Masakazu Sagawa, Toshiaki Kusunoki
  • Publication number: 20050001792
    Abstract: The present invention reduces smears arising from voltage decreases caused by the wiring resistance of scan lines for electron emission device selection. The display unit includes an FED panel in which scan lines, data lines, and electron supply devices are positioned at the intersections of the data lines and scan-lines. A scan driver for supplying a selection signal to the scan lines, and a data driver for supplying a drive signal to the data lines are provided. Electron emission devices selected by the selection signal are driven by the drive signal. A signal corrector circuit individually corrects the drive signal to be supplied to each data line to compensate for a voltage decrease caused by the wiring resistance in each column of the scan lines.
    Type: Application
    Filed: October 24, 2003
    Publication date: January 6, 2005
    Applicant: Hitachi, Ltd.
    Inventors: Toshimitsu Watanabe, Nobuaki Kabuto, Mutsumi Suzuki, Yoshihisa Ooishi, Mitsuo Nakajima, Junichi Ikoma
  • Publication number: 20040252083
    Abstract: To improve luminance uniformity in a panel plane, for example, there is set an amplitude of a pixel driving voltage which is an anode current in the neighborhood of a threshold value of electron emission of one pixel and the amplitude is kept as a threshold value correction value for each pixel, and to correct the luminance variation in the high-luminance emission between the pixels, there is set an amplitude of a pixel driving voltage which is an anode current in the neighborhood of a maximum value of electron emission of one pixel and the amplitude is kept as a gain correction value for each pixel. In the configuration, when a video image is displayed, the input video signal is corrected using the threshold correction value and the gain correction value for each pixel.
    Type: Application
    Filed: October 31, 2003
    Publication date: December 16, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Toshimitsu Watanabe, Mitsuo Nakajima, Nobuaki Kabuto, Mutsumi Suzuki, Yoshihisa Ooishi, Junichi Ikoma