Abstract: Provided is a method of synthesizing apatite powder by emitting a laser beam to a surface of a substrate immersed in a precursor solution. The method is including immersing a substrate in an apatite-forming precursor solution, emitting a laser beam to a region on a surface of the substrate immersed in the precursor solution, and obtaining apatite powder generated in the precursor solution.

Abstract: Disclosed is a force sensor. More particularly, the force sensor includes a first permanent magnet layer; a magnetic tunnel junction disposed on the first permanent magnet layer and configured to have a preset resistance value; and a second permanent magnet layer disposed to be spaced apart from the magnetic tunnel junction, wherein the second permanent magnet layer moves in a direction of the first permanent magnet layer when pressure is applied from outside, the preset resistance value of the magnetic tunnel junction is changed when a magnetic field strength formed between the first permanent magnet layer and the second permanent magnet layer becomes a preset strength or more according to movement of the second permanent magnet layer, and the force sensor senses the pressure based on a change in the preset resistance value.

Abstract: A memory system includes: a main memory device configured to include a plurality of row lines; a cache memory device configured to include a plurality of cache lines for caching data stored in the row lines, each cache line including cache data, a row hammer state value for storing an access number of a corresponding row line, and an access selection bit set according to the row hammer state value; and a memory controller configured to control an access operation to be performed on one of the main memory device and the cache memory device, which is selected according to the access selection bit of a cache-hit cache line, in response to a request from a host.

Abstract: A storage device can be designed to reduce latency in a read operation. Such a storage device can include: a memory device including a plurality of pages that include a first page and a second page different from the first page, each page including a plurality of memory cells that are configured to store data; and a memory controller in communication with the memory device and for sequentially storing result values of a function with respect to a plurality of input values in the plurality of memory cells, and controlling the memory device to store a result value in a last area of the first page and a start area of the second page.

Abstract: A DIMM (Dual In-line Memory Module) may include: one or more volatile memories, a nonvolatile memory having a first area where a reference parameter value which is expected to reduce the life expectancy of the volatile memory by a preset range or more, is stored and a second area where an excess counting value is stored, and a control circuit suitable for measuring an operation parameter value of the volatile memory, generating the excess counting value by counting the number of times that the operation parameter value exceeds the reference parameter value, and outputting the excess counting value stored in the second area to the outside through a preset pin in a preset operation mode.

Abstract: A data center includes a refrigerant induction pipe surrounding one or more regions of the data center, a refrigerant supply device suitable for supplying a refrigerant to the refrigerant induction pipe, the refrigerant having a vaporization temperature corresponding to a pseudo cryogenic temperature, a plurality of racks disposed in the one or more regions, and a plurality of rotating devices, each rotating device being suitable for rotating a corresponding one of the plurality of racks.

Abstract: A memory system includes a first memory device having a first memory that includes a plurality of access management regions and a first access latency, each of the access management regions including a plurality of pages, the first memory device configured to detect a hot access management region having an access count that reaches a preset value from the plurality of access management regions, and detect one or more hot pages included in the hot access management region; and a second memory device having a second access latency that is different from the first access latency of the first memory device. Data stored in the one or more hot pages is migrated to the second memory device.

Abstract: A memory module may include J memory chips configured to input/output data in response to each of a plurality of translated address signals; and an address remapping circuit configured to generate a plurality of preliminary translated address signals by adding first correction values to a target address signal provided from an exterior of the memory module, and to generate the plurality of translated address signals by shifting all bits of each of the plurality of preliminary translated address signals so that K bits included in a bit string of each of the plurality of preliminary translated address signals are moved to other positions of each bit string.

Abstract: A storage device can be designed to reduce latency in a read operation. Such a storage device can include: a memory device including a plurality of pages that include a first page and a second page different from the first page, each page including a plurality of memory cells that are configured to store data; and a memory controller in communication with the memory device and for sequentially storing result values of a function with respect to a plurality of input values in the plurality of memory cells, and controlling the memory device to store a result value in a last area of the first page and a start area of the second page.

Abstract: A cooling system for efficiently cooling large-scale data storage devices embedded in a vehicle, and a smart vehicle including the same are disclosed. The storage device cooling system includes a storage housing section located at a ceiling-mounted structure of a vehicle, provided with an indoor space thereof in which a plurality of storage devices is kept and an opening/closing device configured to open or close the indoor space, a sensing circuit configured to detect a temperature of the indoor space, and an opening/closing controller configured to control operations of the opening/closing device in response to the temperature detected by the sensing circuit.

Abstract: A memory system includes a non-volatile memory device and a controller. The non-volatile memory device includes a plurality of memory regions, each memory region including a plurality of cells commonly coupled to a word line. The controller generates a plurality of candidate data sets based on source data, determines a number of vulnerable cells corresponding to each of the plurality of candidate data sets, and stores a candidate data set having a smallest number of vulnerable cells into a target memory region among the plurality of memory regions.

Abstract: A data processing system includes a plurality of processors, a memory, a non-volatile memory, and a memory controller. The operational memory includes a first memory region and a second memory region. The memory controller performs a first swap operation of releasing assignment of a memory area assigned to a first processor within the first memory region, the first swap operation performed by moving data from the memory area to the second memory region. The memory controller performs a second swap operation by moving the data from the second memory region to the non-volatile memory when a second swap condition is satisfied after completion of the first swap operation.

Abstract: A memory system includes a non-volatile memory device and a controller. The non-volatile memory device includes a plurality of memory regions, each memory region including a plurality of cells commonly coupled to a word line. The controller generates a plurality of candidate data sets based on source data, determines a number of vulnerable cells corresponding to each of the plurality of candidate data sets, and stores a candidate data set having a smallest number of vulnerable cells into a target memory region among the plurality of memory regions.

Abstract: A memory module may include: a plurality of stacked memory chips; a memory controller; and an interposer connected between the plurality of memory chips and the memory controller.

Abstract: A semiconductor module includes a module board, an interposer on the module board, and a processing device and a memory stack that are disposed side by side on the interposer, wherein the memory stack includes a base die, and a memory die on the base die, wherein the memory die includes an outer bank region, a central TSV region, first and second inner bank regions, and a first non-central TSV region, wherein the central TSV region is disposed between the outer bank region and the second inner bank region, and the first non-central TSV region is disposed between the first inner bank region and the second inner bank region.

Abstract: A heat spreader of a memory module including a printed circuit board (PCB) and a plurality of semiconductor chips on at least one surface of the PCB may include a first heat spreading plate and a second heat spreading plate. The first heat spreading plate may be installed at a front surface of the memory module. The second heat spreading plate may be installed at a rear surface of the memory module. At least one of the first and second heat spreading plates may include a body, a plurality of cooling plates and at least one slot. The body may have a plate shape extended in a lengthwise direction of the memory module. The cooling plates may extend from the body in a widthwise direction of the memory module to shield surfaces of the semiconductor chips. The slot may be formed between the cooling plates.

Abstract: An arithmetic device includes a multiplying-accumulating (MAC) operator and an activation function (AF) circuit. The MAC operator performs a MAC arithmetic operation for weight data and vector data to generate an arithmetic result signal. The AF circuit stores a look-up table for an activation function, adjusts a number of logic level combinations of an input distribution signal that correspond to each logic level combination of the output distribution signal, among a plurality of logic level combinations of the output distribution signal, based on an input range of the activation function. The AF circuit selects and outputs the output distribution signal that corresponds to the input distribution signal based on the look-up table. The input range of the activation function is based on a relative number of errors that occur.

Abstract: A memory system includes a first memory device having a first memory that includes a plurality of access management regions and a first access latency, each of the access management regions including a plurality of pages, the first memory device configured to detect a hot access management region having an access count that reaches a preset value from the plurality of access management regions, and detect one or more hot pages included in the hot access management region; and a second memory device having a second access latency that is different from the first access latency of the first memory device. Data stored in the one or more hot pages is migrated to the second memory device.

Abstract: A semiconductor apparatus may include: a pad unit including a plurality of pads; a memory cell array coupled to the pad unit through input/output signal lines; and a pad configuration control circuit configured to change a pad configuration of the pad unit by dividing the plurality of pads into a plurality of groups and setting the plurality of groups to different modes, respectively.

Abstract: A data center includes a refrigerant induction pipe surrounding one or more regions of the data center, a refrigerant supply device suitable for supplying a refrigerant to the refrigerant induction pipe, the refrigerant having a vaporization temperature corresponding to a pseudo cryogenic temperature, a plurality of racks disposed in the one or more regions, and a plurality of rotating devices, each rotating device being suitable for rotating a corresponding one of the plurality of racks.