Patents by Inventor Myoung-Soo Jeon

Myoung-Soo Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030160314
    Abstract: A modular semiconductor die package is provided. The semiconductor die package includes a polymer base for mounting at least one semiconductor die. A polymer cap is operatively secured over the base forming a cavity. The cap includes a light transmissive member operatively positioned to allow light of predetermined wavelengths to pass between at least a portion of the surface of the die and the light transmissive member. A plurality of conductive leads extend through the base to form connections with the semiconductor die(s) positioned in the cavity.
    Type: Application
    Filed: February 25, 2002
    Publication date: August 28, 2003
    Inventors: Stanford W. Crane, Jennifer Colegrove, Zsolt Horvath, Myoung-soo Jeon, Joshua Nickel, Lei-Ming Yang
  • Publication number: 20030162319
    Abstract: A micro grid array semiconductor die package includes a housing defining a cavity for holding at least one semiconductor die, said housing including a plurality of insulative side walls, each of said side walls having a bottom surface and an interior wall including a top surface, and an end plate joined to said side walls; and a plurality of substantially straight conductive leads extending through at least one of said side walls, each of said conductive leads including an internal lead section extending into the cavity from the top surface of the interior wall and a external lead section extending externally from said at least one bottom surface of said side wall.
    Type: Application
    Filed: February 26, 2002
    Publication date: August 28, 2003
    Applicant: Silicon Bandwidth, Inc.
    Inventors: Stanford W. Crane, Vicente D. Alcaria, Myoung-Soo Jeon
  • Patent number: 6603193
    Abstract: A semiconductor package having a molded body and a plurality of conductive pins that extend from the bottom of the molded body. The semiconductor package further includes a RF shield around a protected cavity that holds a first integrated circuit. The molded body can further include an unprotected plastic cavity for holding a second integrated circuit. The conductive pins form bonding pads that are used to electrically interconnect the first and second semiconductor devices to the external environment. A cover, beneficially comprised of copper, is disposed over the molded body. The plastic cavity beneficially includes a beveled wall that improves the routing of electrical conductors between the first integrated circuit and the second integrated circuit.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: August 5, 2003
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Myoung-Soo Jeon, Vicente D. Alcaria
  • Publication number: 20030042598
    Abstract: Ultrasonically formed seals, their use in semiconductor packages, and methods of fabricating semiconductor packages. A brittle center member (such as glass) has a molded edge member. That edge member is ultrasonically welded to a body. The molded edge member and body are comprised of ultrasonically weldable materials. A hermetically sealed semiconductor package includes a lid with a brittle center plate and a molded edge. The molded edge is ultrasonically welded to a body. Locating features that enable accurate positioning of the lid relative to the body, and energy directors can be included. Pins having a relieved portion and a protruding portion can also be hermetically sealed to the body. Such pins can have various lengths that enable stadium-type pin rows. The pins can be within channels, which can hold a sealant. The body can include a device that is electrically connected to the pins.
    Type: Application
    Filed: September 6, 2001
    Publication date: March 6, 2003
    Inventors: Stanford W. Crane, Myoung-Soo Jeon, Matthew E. Doty
  • Publication number: 20030044130
    Abstract: Optoelectronic packaging assemblies for optically and electrically interfacing a protected electro-optical device or system to both an optical fiber and to external circuitry. Such assemblies are comprised of body components that are comprised of plastic that coated or plated with a conductive material. Electrical contact pins in the form of transmission lines are used to couple external electrical signals with the package. The optoelectronic packaging assemblies are dimensioned with small cavities and with steps, breaks, walls, and/or fins molded into the body components. The optoelectronic packaging assemblies further include an optical input receptacle for receiving an optical ferrule and an optical fiber. The optoelectronic packaging assembly provides for cooling, such as by heat sink fins and/or a thermal-electric-cooler. The transmission line pins and body components are dimensioned to mate with a standardized circuit board having transmission line traces.
    Type: Application
    Filed: February 14, 2002
    Publication date: March 6, 2003
    Inventors: Stanford W. Crane, Myoung-Soo Jeon, Joshua G. Nickel, Zsolt Horvath
  • Publication number: 20030042582
    Abstract: A packaged semiconductor device that is fabricated with a plurality of conductive leads defined in a strip that beneficially includes a radio frequency shield box. The conductive contacts are located in a housing, beneficially by insert molding or by sandwiching between a bottom piece and a top piece. The housing can further include a cavity that receives a semiconductor device, and the radio frequency shield can receive another semiconductor device. Bonding conductors electrically connect at least one semiconductor device to another semiconductor device and/or to the conductive contacts. A conductive cover is disposed over the housing. The cavity beneficially includes a beveled wall and the conductive leads and the radio frequency shield are beneficially comprised of copper.
    Type: Application
    Filed: September 6, 2001
    Publication date: March 6, 2003
    Inventors: Stanford W. Crane, Myoung-Soo Jeon, Vicente D. Alcaria
  • Publication number: 20030042596
    Abstract: A semiconductor package having a molded body and a plurality of conductive pins that extend from the bottom of the molded body. The semiconductor package further includes a RF shield around a protected cavity that holds a first integrated circuit. The molded body can further include an unprotected plastic cavity for holding a second integrated circuit. The conductive pins form bonding pads that are used to electrically interconnect the first and second semiconductor devices to the external environment. A cover, beneficially comprised of copper, is disposed over the molded body. The plastic cavity beneficially includes a beveled wall that improves the routing of electrical conductors between the first integrated circuit and the second integrated circuit.
    Type: Application
    Filed: September 6, 2001
    Publication date: March 6, 2003
    Inventors: Stanford W. Crane, Myoung-Soo Jeon, Vicente D. Alcaria
  • Publication number: 20020117751
    Abstract: A cluster grid array semiconductor die package and mating socket provide electrical connection between one or more semiconductor dies housed within the die package and substrate, such as a printed circuit board, on which the mating socket is mounted. The die package and the mating socket may be easily connected and disconnected. The die package may include power and ground planes built into and distributed within the housing of the die package.
    Type: Application
    Filed: May 31, 2001
    Publication date: August 29, 2002
    Applicant: Silicon Bandwidth, Inc.
    Inventors: Stanford W. Crane, Jr., Myoung-soo Jeon, Charley Takeshi Ogata, Ton-Yong Wang, Andreas C. Cangellaris, Jose Schutt-Aine
  • Patent number: 6270366
    Abstract: The present invention relates to an plug-in type electric interconnecting system.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: August 7, 2001
    Assignee: LG Cable and Machinery Ltd.
    Inventors: Myoung Soo Jeon, Geol Hun Cho, Young Pyo Hong, Seong Joon Lee, Chang Ho Jung
  • Patent number: 6073703
    Abstract: A tool for rotating a pin and a method of rotating a pin are disclosed. The tool includes a front support, a rear support, a side wall connected to the front support and the rear support, a moving member contacting the side wall and moveable relative to the front and rear supports, the moving member including a portion defining a slot and a projection extending into the slot, and a screw connected to the moving member so as to permit movement of the screw relative to the front and rear supports and the moving member. The screw has an external surface and an end, the screw including a slot defined in the end and a groove along the external surface, wherein the projection on the moving member engages the groove on the screw, the screw rotates as the moving member moves, and a pin that inserted in the slot of the screw rotates with the screw. The pin may be connected to an electrical connector after rotation.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: June 13, 2000
    Inventors: Myoung-Soo Jeon, Young Pyo Hong, Song Hoon Ahn