Patents by Inventor Myoung-Sub Kim
Myoung-Sub Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10056138Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory may include a memory region comprising a plurality of memory cells disposed at respective intersections between a plurality of row lines and a plurality of column lines, the plurality of row lines extending in a first direction, the plurality of column lines extending in a second direction crossing the first direction; first and second row drivers arranged on one side and the other side of the memory region in the first direction, respectively, and driving a common row line corresponding to a row address among the plurality of row lines; and a column driver driving a common column line corresponding to a column address among the plurality of column lines, wherein the first and second row drivers are coupled to the common row line.Type: GrantFiled: May 25, 2017Date of Patent: August 21, 2018Assignee: SK HYNIX INC.Inventors: Hyun-Jeong Kim, Myoung-Sub Kim, Tae-Hoon Kim, Seung-Hwan Lee, Woo-Tae Lee
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Patent number: 9984748Abstract: A semiconductor memory includes a cell array including a plurality of resistive memory cells arranged in a plurality of columns and a plurality of rows, the plurality of resistive memory cells having a snapback characteristic; and a read circuit configured to apply a read voltage to a memory cell selected among the plurality of resistive memory cells, and sense data stored in the selected memory cell by determining whether or not a snapback phenomenon has occurred in the selected memory cell, wherein the read voltage has a level higher than a level of a first voltage and lower than a level of a second voltage, wherein the snapback phenomenon occurs when the first voltage is applied to the selected memory cell in a case where the selected memory cell stores first data, and wherein the snapback phenomenon occurs when the second voltage is applied to the selected memory cell in a case where the selected memory cell stores second data.Type: GrantFiled: May 24, 2017Date of Patent: May 29, 2018Assignee: SK HYNIX INC.Inventors: Seung-Hwan Lee, Woo-Tae Lee, Hyun-Jeong Kim, Myoung-Sub Kim, Tae-Hoon Kim
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Publication number: 20180005673Abstract: An electronic device includes a semiconductor memory that includes: a memory cell coupled between first and second lines and having a specific resistance state; a first read circuit suitable for supplying a predetermined pattern of a read voltage to the first line to generate a cell current corresponding to the specific resistance state of the memory cell during a read operation mode; and a second read circuit suitable for generating read data based on the cell current flowing through the second line during the read operation mode.Type: ApplicationFiled: June 29, 2017Publication date: January 4, 2018Inventor: Myoung-Sub KIM
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Patent number: 9842882Abstract: A semiconductor memory includes first to third lines, the second line crossing the first and third lines between the first line and the third line, a first memory element overlapping an intersection region of the first and second lines between the first line and the second line, the first memory element including a first memory layer, a first electrode under the first memory layer, and a second electrode over the first memory layer, and a second memory element overlapping an intersection region of the second and third lines between the second line and the third line, the second memory element including a second memory layer, a third electrode under the second memory layer, and a fourth electrode over the second memory layer. An electrical resistance relation of the third and fourth electrodes is controlled according to an electrical resistance relation of electrical resistances of the first and second electrodes.Type: GrantFiled: March 6, 2017Date of Patent: December 12, 2017Assignee: SK HYNIX INC.Inventors: Myoung-Sub Kim, Hyun-Jeong Kim, Woo-Tae Lee
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Patent number: 9818481Abstract: A resistive memory device includes a memory cell array including a unit memory cell coupled between a word line and a bit line, wherein the unit memory cell includes a data storage material and a non-silicon-substrate-based type bidirectional access device coupled in series, a path setting circuit coupled between the bit line and the word line, suitable for providing a program pulse toward the bit line or the word line based on a path control signal, a forward write command, and a reverse write command, and a control unit suitable for providing a write path control signal, a forward program command, and a reverse program command based on an external command signal.Type: GrantFiled: February 16, 2017Date of Patent: November 14, 2017Assignee: SK Hynix Inc.Inventors: Hae Chan Park, Myoung Sub Kim, Se Ho Lee, Seung Yun Lee
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Publication number: 20170162262Abstract: A resistive memory device includes a memory cell array including a unit memory cell coupled between a word line and a bit line, wherein the unit memory cell includes a data storage material and a non-silicon-substrate-based type bidirectional access device coupled in series, a path setting circuit coupled between the bit line and the word line, suitable for providing a program pulse toward the bit line or the word line based on a path control signal, a forward write command, and a reverse write command, and a control unit suitable for providing a write path control signal, a forward program command, and a reverse program command based on an external command signal.Type: ApplicationFiled: February 16, 2017Publication date: June 8, 2017Inventors: Hae Chan PARK, Myoung Sub KIM, Se Ho LEE, Seung Yun LEE
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Patent number: 9613690Abstract: A resistive memory device includes a memory cell array including a unit memory cell coupled between a word line and a bit line, wherein the unit memory cell includes a data storage material and a non-silicon-substrate-based type bidirectional access device coupled in series, a path setting circuit coupled between the bit line and the word line, suitable for providing a program pulse toward the bit line or the word line based on a path control signal, a forward write command, and a reverse write command, and a control unit suitable for providing a write path control signal, a forward program command, and a reverse program command based on an external command signal.Type: GrantFiled: October 1, 2013Date of Patent: April 4, 2017Assignee: SK Hynix Inc.Inventors: Hae Chan Park, Myoung Sub Kim, Se Ho Lee, Seung Yun Lee
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Semiconductor system including semiconductor memory apparatus and temperature control method thereof
Patent number: 9437295Abstract: A semiconductor memory apparatus and a temperature control method thereof are provided. The semiconductor memory apparatus includes a temperature adjustment unit suitable for adjusting a temperature of a memory cell, and a temperature control unit suitable for sensing a temperature of the temperature adjustment unit, comparing a sensed temperature with a reference temperature range, and controlling the temperature adjustment unit to adjust the temperature thereof within the reference temperature range based on a comparison result.Type: GrantFiled: December 2, 2015Date of Patent: September 6, 2016Assignee: SK Hynix Inc.Inventors: Seung Yun Lee, Hae Chan Park, Myoung Sub Kim, Se Ho Lee -
SEMICONDUCTOR SYSTEM INCLUDING SEMICONDUCTOR MEMORY APPARATUS AND TEMPERATURE CONTROL METHOD THEREOF
Publication number: 20160086663Abstract: A semiconductor memory apparatus and a temperature control method thereof are provided. The semiconductor memory apparatus includes a temperature adjustment unit suitable for adjusting a temperature of a memory cell, and a temperature control unit suitable for sensing a temperature of the temperature adjustment unit, comparing a sensed temperature with a reference temperature range, and controlling the temperature adjustment unit to adjust the temperature thereof within the reference temperature range based on a comparison result.Type: ApplicationFiled: December 2, 2015Publication date: March 24, 2016Inventors: Seung Yun LEE, Hae Chan PARK, Myoung Sub KIM, Se Ho LEE -
Patent number: 9236121Abstract: A semiconductor memory apparatus and a temperature control method thereof are provided. The semiconductor memory apparatus includes a temperature adjustment unit suitable for adjusting a temperature of a memory cell, and a temperature control unit suitable for sensing a temperature of the temperature adjustment unit, comparing a sensed temperature with a reference temperature range, and controlling the temperature adjustment unit to adjust the temperature thereof within the reference temperature range based on a comparison result.Type: GrantFiled: January 17, 2014Date of Patent: January 12, 2016Assignee: SK Hynix Inc.Inventors: Seung Yun Lee, Hae Chan Park, Myoung Sub Kim, Se Ho Lee
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Patent number: 9111762Abstract: A semiconductor device includes a semiconductor substrate, a plurality of pillars vertically extending from the semiconductor substrate, each pillar including a groove formed in an upper surface thereof, a salicide layer formed to cover the upper surface and a lateral circumference of an upper end of each pillar and a lower electrode formed to cover an upper surface and a lateral surface of the salicide layer.Type: GrantFiled: December 5, 2013Date of Patent: August 18, 2015Assignee: SK Hynix Inc.Inventor: Myoung Sub Kim
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Patent number: 9054304Abstract: A resistive memory device capable of preventing disturbance is provided. The resistive memory device includes a lower electrode formed on a semiconductor substrate, a variable resistor disposed on the lower electrode, an upper electrode disposed on the variable resistor, and an interlayer insulating layer configured to insulate the variable resistor. The interlayer insulating layer may include an air-gap area in at least a portion thereof.Type: GrantFiled: March 8, 2013Date of Patent: June 9, 2015Assignee: SK hynix Inc.Inventors: Seung Yun Lee, Hae Chan Park, Myoung Sub Kim, Sung Bin Hong, Se Ho Lee, Jung Won Seo
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Publication number: 20150109856Abstract: A semiconductor memory apparatus and a temperature control method thereof are provided. The semiconductor memory apparatus includes a temperature adjustment unit suitable for adjusting a temperature of a memory cell, and a temperature control unit suitable for sensing a temperature of the temperature adjustment unit, comparing a sensed temperature with a reference temperature range, and controlling the temperature adjustment unit to adjust the temperature thereof within the reference temperature range based on a comparison result.Type: ApplicationFiled: January 17, 2014Publication date: April 23, 2015Applicant: SK hynix Inc.Inventors: Seung Yun LEE, Hae Chan PARK, Myoung Sub KIM, Se Ho LEE
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Publication number: 20150069582Abstract: A semiconductor device includes a semiconductor substrate, a plurality of pillars vertically extending from the semiconductor substrate, each pillar including a groove formed in an upper surface thereof, a salicide layer formed to cover the upper surface and a lateral circumference of an upper end of each pillar and a lower electrode formed to cover an upper surface and a lateral surface of the salicide layer.Type: ApplicationFiled: December 5, 2013Publication date: March 12, 2015Applicant: SK hynix Inc.Inventor: Myoung Sub KIM
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Patent number: 8934294Abstract: A semiconductor integrated circuit device, a method of manufacturing the same, and a method of driving the same are provided. The device includes a semiconductor substrate, an upper electrode extending from a surface of the semiconductor substrate; a plurality of switching structures extending from both sidewalls of the upper electrode in a direction parallel to the surface of the semiconductor substrate, and a phase-change material layer disposed between the plurality of switching structures and the upper electrode.Type: GrantFiled: February 18, 2014Date of Patent: January 13, 2015Assignee: SK Hynix Inc.Inventors: Myoung Sub Kim, Soo Gil Kim, Nam Kyun Park, Sung Cheoul Kim, Gap Sok Do, Joon Seop Sim, Hyun Jeong Lee
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Patent number: 8917545Abstract: A semiconductor integrated circuit device, a method of manufacturing the same, and a method of driving the same are provided. The device includes a semiconductor substrate, an upper electrode extending from a surface of the semiconductor substrate; a plurality of switching structures extending from both sidewalls of the upper electrode in a direction parallel to the surface of the semiconductor substrate, and a phase-change material layer disposed between the plurality of switching structures and the upper electrode.Type: GrantFiled: February 18, 2014Date of Patent: December 23, 2014Assignee: SK Hynix Inc.Inventors: Myoung Sub Kim, Soo Gil Kim, Nam Kyun Park, Sung Cheoul Kim, Gap Sok Do, Joon Seop Sim, Hyun Jeong Lee
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Publication number: 20140325120Abstract: A resistive memory device includes a memory cell array including a unit memory cell coupled between a word line and a bit line, wherein the unit memory cell includes a data storage material and a non-silicon-substrate-based type bidirectional access device coupled in series, a path setting circuit coupled between the bit line and the word line, suitable for providing a program pulse toward the bit line or the word line based on a path control signal, a forward write command, and a reverse write command, and a control unit suitable for providing a write path control signal, a forward program command, and a reverse program command based on an external command signal.Type: ApplicationFiled: October 1, 2013Publication date: October 30, 2014Applicant: SK hynix Inc.Inventors: Hae Chan PARK, Myoung Sub KIM, Se Ho LEE, Seung Yun LEE
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Publication number: 20140166965Abstract: A resistive memory device may include a bottom structure, a memory cell structure disposed on the bottom structure, and a data storage material disposed to surround an outer sidewall of the memory cell structure.Type: ApplicationFiled: March 18, 2013Publication date: June 19, 2014Applicant: SK Hynix Inc.Inventors: Jung Won SEO, Hae Chan PARK, Myoung Sub KIM, Sung Bin HONG, Se Ho LEE, Seung Yun LEE
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Publication number: 20140162429Abstract: A semiconductor integrated circuit device, a method of manufacturing the same, and a method of driving the same are provided. The device includes a semiconductor substrate, an upper electrode extending from a surface of the semiconductor substrate; a plurality of switching structures extending from both sidewalls of the upper electrode in a direction parallel to the surface of the semiconductor substrate, and a phase-change material layer disposed between the plurality of switching structures and the upper electrode.Type: ApplicationFiled: February 18, 2014Publication date: June 12, 2014Applicant: SK hynix Inc.Inventors: Myoung Sub KIM, Soo Gil KIM, Nam Kyun PARK, Sung Cheoul KIM, Gap Sok DO, Joon Seop SIM, Hyun Jeong LEE
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Publication number: 20140160839Abstract: A semiconductor integrated circuit device, a method of manufacturing the same, and a method of driving the same are provided. The device includes a semiconductor substrate, an upper electrode extending from a surface of the semiconductor substrate; a plurality of switching structures extending from both sidewalls of the upper electrode in a direction parallel to the surface of the semiconductor substrate, and a phase-change material layer disposed between the plurality of switching structures and the upper electrode.Type: ApplicationFiled: February 18, 2014Publication date: June 12, 2014Applicant: SK hynix Inc.Inventors: Myoung Sub KIM, Soo Gil KIM, Nam Kyun PARK, Sung Cheoul KIM, Gap Sok DO, Joon Seop SIM, Hyun Jeong LEE