Patents by Inventor Myounggeun Cha

Myounggeun Cha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200144345
    Abstract: A display device includes a substrate, a metal layer on the substrate, a buffer layer covering the metal layer on the substrate, the buffer layer having a planarized upper surface, and including a first buffer layer including a first portion not overlapping an upper surface of the metal layer and a second portion overlapping an upper surface of the metal layer, the second portion protruding upward from the first portion from the first portion, and a second buffer layer on the first portion of the first buffer layer, an active pattern on the planarized upper surface of the buffer layer, the active pattern overlapping the metal layer, a gate insulation layer on the active pattern, a gate electrode on the gate insulation layer, the gate electrode overlapping the active pattern, and an organic light emitting diode on the gate electrode.
    Type: Application
    Filed: August 30, 2019
    Publication date: May 7, 2020
    Inventors: Myounggeun CHA, Sanggun CHOI, Sangsub KIM, Jiyeong SHIN, Yongsu LEE, Kiseok CHOI
  • Publication number: 20200135825
    Abstract: A scan driver includes a substrate, a first transistor on the substrate, the first transistor including a first active pattern and a first gate electrode, the first active pattern including first and second regions, and a first channel region between the first and second regions, a second transistor on the first transistor, the second transistor including a second active pattern and a second gate electrode, the second active pattern including third and fourth regions, and a second channel region between the third and fourth regions, first and second electrodes on the second transistor, the first electrode and the second electrode electrically connected to the first region and the second region, respectively, and third and fourth electrodes on the second transistor, the third electrode and the fourth electrode electrically connected to the third region and the fourth region, respectively, wherein the first and third electrodes are electrically connected.
    Type: Application
    Filed: September 17, 2019
    Publication date: April 30, 2020
    Inventors: Myounggeun CHA, Sanggun CHOI, Jiyeong SHIN, Yongsu LEE
  • Publication number: 20200083311
    Abstract: A display apparatus has a display area and a non-display area around the display area, the display apparatus includes, in the non-display area, a first power line, a driving circuit on a layer over the first power line, and a second power line electrically connected to the first power line and on a same layer on which one electrode of the driving circuit is arranged.
    Type: Application
    Filed: July 12, 2019
    Publication date: March 12, 2020
    Inventors: Myounggeun CHA, Yongsu LEE, Sanggun CHOI, Jiyeong SHIN
  • Patent number: 10573698
    Abstract: A transistor including a polysilicon layer on a base substrate and including a channel region, a first ion doping region, a second ion doping region, the channel region being between the first and second ion doping regions, an average size of the grains in the channel region being greater than that of the grains in the first and second ion doping regions, a first gate electrode insulated from and overlapping the channel region, a second gate electrode insulated from the first gate electrode and overlapping the channel region, an inter-insulating layer on the second gate electrode, a source electrode on the inter-insulating layer and connected to the first ion doping region, and a drain electrode on the inter-insulating layer and connected to the second ion doping region.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: February 25, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyoungwon Lee, Yoonho Khang, Myounggeun Cha, Youngki Shin, Woonghee Jeong
  • Publication number: 20190340978
    Abstract: A pixel unit of a display device including: an OLED; a first transistor including a first electrode connected to a first node, a second electrode connected to a second node, and a third electrode connected to a third node; a capacitor including a first electrode receiving a power voltage and a second electrode connected to the first node; a second transistor including a first electrode receiving a scan signal, a second electrode receiving a data voltage and a third electrode connected to the second node; a third transistor including a first electrode receiving the scan signal, a second electrode connected to the first node and a third electrode connected to the third node, wherein at least one of the first and third transistors includes a fourth electrode, the fourth electrode receives a compensation voltage when an operation temperature is above a preset temperature and is floated when the operation temperature is equal to or more than the preset temperature.
    Type: Application
    Filed: April 11, 2019
    Publication date: November 7, 2019
    Inventors: Myounggeun CHA, Sanggun CHOI, Jiyeong SHIN, Yong Su LEE
  • Publication number: 20190341440
    Abstract: A display device including: a substrate; a light emitting element on the substrate; a pixel circuit between the substrate and the light emitting element, wherein the pixel circuit is electrically connected to the light emitting element, and includes a plurality of transistors; and a conductive pattern including an electrode portion and a wiring portion for supplying a voltage to the electrode portion, wherein the electrode portion overlaps an active pattern of at least one transistor among the plurality of transistors, wherein the conductive pattern is disposed between the substrate and the active pattern, and wherein a thickness of the wiring portion is greater than a thickness of the electrode portion.
    Type: Application
    Filed: April 12, 2019
    Publication date: November 7, 2019
    Inventors: Myounggeun CHA, Sanggun CHOI, Jiyeong SHIN, Yong Su LEE
  • Publication number: 20190245016
    Abstract: A display apparatus includes a base substrate, a conductive layer disposed on the base substrate to cover entire of the base substrate, wherein the conductive layer is configured to be applied with a ground voltage, a buffer layer disposed on the conductive layer, an active pattern comprising a drain region, a source region and a channel region between the drain region and the source region, a first insulation layer disposed on the active pattern, a gate pattern disposed on the first insulation layer and comprising a gate electrode which overlapping the channel region of the active pattern, a second insulation layer disposed on the gate pattern, and a data pattern comprising a source electrode electrically connected to the source region of the active pattern, and a drain electrode electrically connected to the drain region of the active pattern.
    Type: Application
    Filed: January 24, 2019
    Publication date: August 8, 2019
    Inventors: Yongsu LEE, Sunghwan CHOI, Sunghoon YANG, Thanh Tien NGUYEN, Myounggeun CHA
  • Publication number: 20190181360
    Abstract: A display substrate includes a first conductive layer on a base substrate, a first insulation layer on the first conductive layer, a second conductive layer on the first insulation layer, a second insulation layer on the second conductive layer, and a third conductive layer on the second insulation layer. The third conductive layer is connected to the first conductive layer and the second conductive layer through a contact hole passing through the first insulation layer, the second conductive layer, and the second insulation layer. A sidewall of the contact hole has a stepped shape.
    Type: Application
    Filed: November 28, 2018
    Publication date: June 13, 2019
    Inventors: Myounggeun CHA, Sanggun CHOI, Meejae KANG, Sanggab KIM, Joon woo BAE, Thanh Tien NGUYEN, Kyoungwon LEE, Yongsu LEE
  • Patent number: 9837316
    Abstract: A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: December 5, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jongchan Lee, Yoonho Khang, Myounghwa Kim, Joonhwa Bae, Myounggeun Cha
  • Publication number: 20170084755
    Abstract: A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.
    Type: Application
    Filed: December 2, 2016
    Publication date: March 23, 2017
    Inventors: Jongchan LEE, Yoonho KHANG, Myounghwa KIM, Joonhwa BAE, Myounggeun CHA
  • Patent number: 9515154
    Abstract: A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: December 6, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jongchan Lee, Yoonho Khang, Myounghwa Kim, Joonhwa Bae, Myounggeun Cha
  • Patent number: 9437624
    Abstract: A thin film transistor (TFT) substrate, a flat display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the flat display apparatus, the thin film transistor (TFT) substrate including a substrate; a first gate electrode on the substrate, the first gate electrode including a first branch electrode and a second branch electrode that are spaced apart from one another; a polysilicon layer on the first gate electrode and insulated from the first gate electrode; and a second gate electrode on the polysilicon layer, the second gate electrode being insulated from the polysilicon layer and overlying the first and second branch electrodes.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: September 6, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myounggeun Cha, Dongjo Kim, Yoonho Khang, Myounghwa Kim, Kyoungwon Lee
  • Patent number: 9417516
    Abstract: Provided is a method of manufacturing a display apparatus, the method including forming an amorphous silicon layer on a substrate; changing amorphous silicon in the amorphous silicon layer into crystalline silicon by irradiating the amorphous silicon with a laser beam emitted through a phase shift mask; and forming a display device, the phase shift mask including a base substrate; a barrier layer on the base substrate and including a plurality of transmissive portions which are spaced apart from each other in a first direction; and phase shift portions which alternately fill the plurality of transmissive portions in the first direction.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: August 16, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Bongyeon Kim, Min Kang, Yong Son, Hyunjoo Lee, Myounggeun Cha, Jinho Ju
  • Publication number: 20160148986
    Abstract: A transistor including a polysilicon layer on a base substrate and including a channel region, a first ion doping region, a second ion doping region, the channel region being between the first and second ion doping regions, an average size of the grains in the channel region being greater than that of the grains in the first and second ion doping regions, a first gate electrode insulated from and overlapping the channel region, a second gate electrode insulated from the first gate electrode and overlapping the channel region, an inter-insulating layer on the second gate electrode, a source electrode on the inter-insulating layer and connected to the first ion doping region, and a drain electrode on the inter-insulating layer and connected to the second ion doping region.
    Type: Application
    Filed: October 21, 2015
    Publication date: May 26, 2016
    Inventors: Kyoungwon Lee, Yoonho Khang, Myounggeun Cha, Youngki Shin, Woonghee Jeong
  • Publication number: 20160097972
    Abstract: Provided is a method of manufacturing a display apparatus, the method including forming an amorphous silicon layer on a substrate; changing amorphous silicon in the amorphous silicon layer into crystalline silicon by irradiating the amorphous silicon with a laser beam emitted through a phase shift mask; and forming a display device, the phase shift mask including a base substrate; a barrier layer on the base substrate and including a plurality of transmissive portions which are spaced apart from each other in a first direction; and phase shift portions which alternately fill the plurality of transmissive portions in the first direction.
    Type: Application
    Filed: July 8, 2015
    Publication date: April 7, 2016
    Inventors: Bongyeon KIM, Min KANG, Yong SON, Hyunjoo LEE, Myounggeun CHA, Jinho JU
  • Publication number: 20160093646
    Abstract: A thin film transistor (TFT) substrate, a flat display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the flat display apparatus, the thin film transistor (TFT) substrate including a substrate; a first gate electrode on the substrate, the first gate electrode including a first branch electrode and a second branch electrode that are spaced apart from one another; a polysilicon layer on the first gate electrode and insulated from the first gate electrode; and a second gate electrode on the polysilicon layer, the second gate electrode being insulated from the polysilicon layer and overlying the first and second branch electrodes.
    Type: Application
    Filed: April 17, 2015
    Publication date: March 31, 2016
    Inventors: Myounggeun CHA, Dongjo KIM, Yoonho KHANG, Myounghwa KIM, Kyoungwon LEE
  • Patent number: 9263470
    Abstract: Provided is a semiconductor device including a buffer layer that is on a substrate and includes an inclined surface; a crystalline silicon layer that is on the buffer layer; a gate electrode that is on the crystalline silicon layer while being insulated from the crystalline silicon layer; and a source electrode and a drain electrode that are each electrically connected to the crystalline silicon layer, the angle between the substrate and the inclined surface being in a range of about 17.5 degrees to less than about 70 degrees.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: February 16, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dongjo Kim, Myounggeun Cha, Yoonho Khang, Soyoung Koo
  • Publication number: 20160042959
    Abstract: A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.
    Type: Application
    Filed: January 15, 2015
    Publication date: February 11, 2016
    Inventors: Jongchan LEE, Yoonho KHANG, Myounghwa KIM, Joonhwa BAE, Myounggeun CHA
  • Publication number: 20160035754
    Abstract: Provided is a semiconductor device including a buffer layer that is on a substrate and includes an inclined surface; a crystalline silicon layer that is on the buffer layer; a gate electrode that is on the crystalline silicon layer while being insulated from the crystalline silicon layer; and a source electrode and a drain electrode that are each electrically connected to the crystalline silicon layer, the angle between the substrate and the inclined surface being in a range of about 17.5 degrees to less than about 70 degrees.
    Type: Application
    Filed: December 30, 2014
    Publication date: February 4, 2016
    Inventors: Dongjo KIM, Myounggeun CHA, Yoonho KHANG, Soyoung KOO
  • Patent number: 9057923
    Abstract: A wire is provided on an insulating substrate to have a first thickness in a first area and a second thickness smaller than the first thickness in a second area except for the first area. A display apparatus includes the wire. The wire is formed by forming a first conductive layer and a second conductive layer on the insulating substrate and etching the first and second conductive layers using photoresist layer patterns having different thicknesses.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: June 16, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Chong Sup Chang, Yoonho Khang, Changoh Jeong, Sehwan Yu, Sangho Park, Su-Hyoung Kang, Hyungjun Kim, Honglong Ning, Jinho Hwang, Myounggeun Cha, Youngki Shin