Abstract: A printed circuit board and a flip chip package using the same are designed to minimize thermal stress due to different thermal coefficients present in areas having metal lines and solder resist versus other areas on the printed circuit board. The printed circuit board includes an insulation layer; a first metal line formed on one surface of the insulation layer and having at one end thereof a bump land and a projection which integrally extends from the bump land; a second metal line formed on the other surface of the insulation layer and having at one end thereof a ball land; a via metal line formed through the insulation layer to connect the first and second metal lines to each other; and solder resists formed on the upper and lower surfaces of the insulation layer to expose the bump land and the ball land.

Abstract: The stack type package module includes a plurality of stacked tape carrier packages. Each package has an elongated lead having an extension end connected to the first lateral end connected to a central portion connected to a second lateral end. The second lateral end is connected to the respective chip via a bump. The packages made as such are then stacked on top of each other on a printed circuit board. The plurality of the stacked first lateral ends are then cut and soldered the printed circuit board. The predetermined portions of the packages including the cut first lateral ends are sealed for protection.

Abstract: The stack package includes at least two semiconductor chips disposed up and down. Bonding pads are formed in the respective semiconductor chips along a center line. Inner leads of a first lead frame and a second lead frame are attached to bonding-pad-disposed faces of the respective semiconductor chips. The inner lead of each lead frame is electrically connected to its corresponding bonding pad by means of metal wires. The inner lead of the first lead frame is also electrically connected to the second lead frame by utilizing a conductive adhesive material. A connecting hole is formed in the outer end of the inner lead for better electrical connection when soldered. The entire resultant structure is molded with an epoxy compound so as to expose a connecting part between the first and second lead frames and an outer lead of the second lead frame.

Abstract: The present invention relates to a stack package, as well as a method for fabricating the same, the stack package includes at least two semiconductor chips disposed up and down. Bonding pads are formed in the respective semiconductor chips along a center line. Inner leads of a first lead frame and a second lead frame are attached to bonding pad-disposed faces of the respective semiconductor chips. The inner lead of each lead frame is electrically connected to its corresponding bonding pad by means of metal wires. The inner lead of the first lead frame is also electrically connected to the second lead frame. The entire structure is molded with an epoxy compound so as to expose a connecting part between the first and second lead frames and an outer lead of the second lead frame.

Abstract: The present invention relates to a stack package, as well as a method for fabricating the same, the stack package includes at least two semiconductor chips disposed up and down. Bonding pads are formed in the respective semiconductor chips along a center line. Inner leads of a first lead frame and a second lead frame are attached to bonding pad-disposed faces of the respective semiconductor chips. The inner lead of each lead frame is electrically connected to its corresponding bonding pad by means of metal wires. The inner lead of the first lead frame is also electrically connected to the second lead frame. The entire structure is molded with an epoxy compound so as to expose a connecting part between the first and second lead frames and an outer lead of the second lead frame.