Patents by Inventor Nachiket R. Raravikar

Nachiket R. Raravikar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8133585
    Abstract: A thermally and electrically conductive structure comprises a carbon nanotube (110) having an outer surface (111) and a carbon coating (120) covering at least a portion of the outer surface of the carbon nanotube. The carbon coating may be applied to the carbon nanotube by providing a nitrile-containing polymer, coating the carbon nanotube with the nitrile-containing polymer, and pyrolyzing the nitrile-containing polymer in order to form the carbon coating on the carbon nanotube. The carbon nanotube may further be coated with a low contact resistance layer (130) exterior to the carbon coating and a metal layer (140) exterior to the low contact resistance layer.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: March 13, 2012
    Assignee: Intel Corporation
    Inventors: Linda A. Shekhawat, Nachiket R. Raravikar
  • Patent number: 8068328
    Abstract: A method of manufacturing an embedded passive device for a microelectronic application comprises steps of providing a substrate (110, 210, 310), nanolithographically forming a first section (121, 221, 321) of the embedded passive device over the substrate, and nanolithographically forming subsequent sections (122, 222, 322) the embedded passive device adjacent to the first section. The resulting embedded passive device may contain features less than approximately 100 nm in size.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: November 29, 2011
    Assignee: Intel Corporation
    Inventors: Nachiket R. Raravikar, Rahul Panat
  • Publication number: 20110151624
    Abstract: A coating for a microelectronic device comprises a polymer film (131) containing a filler material (232). The polymer film has a thermal conductivity greater than 3 W/m·K and a thickness (133) that does not exceed 10 micrometers. The polymer film may be combined with a dicing tape (310) to form a treatment (300) that simplifies a manufacturing process for a microelectronic package (100) and may be used in order to manage a thermal profile of the microelectronic device.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 23, 2011
    Inventors: Dingying Xu, Leonel R. Arana, Nachiket R. Raravikar, Mohit Mamodia, Rajasekaran Swaminathan, Rahul Manepalli
  • Publication number: 20100264536
    Abstract: A semiconductor package is described. The semiconductor package includes an internal housing and a semiconductor die coupled with the internal housing by a layer of self-healing thermal interface material.
    Type: Application
    Filed: June 29, 2010
    Publication date: October 21, 2010
    Inventors: Ravi Shankar, Nachiket R. Raravikar, Dingying Xu
  • Patent number: 7799849
    Abstract: A self-healing composite material and a method to fabricate the self-healing microcapsules are illustrated. The self-healing microcapsules may be fabricated by mixing nanoscale material with a self-healing agent to form a self-healing mixture. The self-healing mixture may be encapsulated to form self-healing capsules which may be dispersed in a polymer to fabricate self-healing material.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: September 21, 2010
    Assignee: Intel Corporation
    Inventors: Nachiket R. Raravikar, Nirupama Nirupama
  • Patent number: 7700943
    Abstract: An embodiment of the present invention is a technique to functionalize carbon nanotubes in situ. A carbon nanotube (NT) array is grown or deposited on a substrate. The NT array is functionalized in situ with a polymer by partial thermal degradation of the polymer to form a NT structure. The functionalization of the NT structure is characterized. The functionalized NT structure is processed according to the characterized functionalization.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: April 20, 2010
    Assignee: Intel Corporation
    Inventors: Nachiket R. Raravikar, James C. Matayabas, Jr.
  • Patent number: 7666768
    Abstract: A method, apparatus and various material-architectures in an electrically conductive through die via formed of a composite material with a continuous phase of matrix metal and a dispersed phase of graphitic structures of carbon, wherein bulk material properties of the composite material differ from similar bulk material properties of the matrix metal.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: February 23, 2010
    Assignee: Intel Corporation
    Inventors: Nachiket R. Raravikar, Daewoong Suh, Leonel Arana, James C. Matayabas, Jr.
  • Publication number: 20100035063
    Abstract: A thermally and electrically conductive structure comprises a carbon nanotube (110) having an outer surface (111) and a carbon coating (120) covering at least a portion of the outer surface of the carbon nanotube. The carbon coating may be applied to the carbon nanotube by providing a nitrile-containing polymer, coating the carbon nanotube with the nitrile-containing polymer, and pyrolyzing the nitrile-containing polymer in order to form the carbon coating on the carbon nanotube. The carbon nanotube may further be coated with a low contact resistance layer (130) exterior to the carbon coating and a metal layer (140) exterior to the low contact resistance layer.
    Type: Application
    Filed: October 5, 2009
    Publication date: February 11, 2010
    Inventors: Linda A. Shekhawat, Nachiket R. Raravikar
  • Publication number: 20090321922
    Abstract: A semiconductor package is described. The semiconductor package includes an internal housing and a semiconductor die coupled with the internal housing by a layer of self-healing thermal interface material.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Inventors: Ravi Shankar, Nachiket R. Raravikar, Dingying Xu
  • Patent number: 7618679
    Abstract: A thermally and electrically conductive structure comprises a carbon nanotube (110) having an outer surface (111) and a carbon coating (120) covering at least a portion of the outer surface of the carbon nanotube. The carbon coating may be applied to the carbon nanotube by providing a nitrile-containing polymer, coating the carbon nanotube with the nitrile-containing polymer, and pyrolyzing the nitrile-containing polymer in order to form the carbon coating on the carbon nanotube. The carbon nanotube may further be coated with a low contact resistance layer (130) exterior to the carbon coating and a metal layer (140) exterior to the low contact resistance layer.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: November 17, 2009
    Assignee: Intel Corporation
    Inventors: Linda Shekhawat, Nachiket R. Raravikar
  • Publication number: 20090231777
    Abstract: A method of manufacturing an embedded passive device for a microelectronic application comprises steps of providing a substrate (110, 210, 310), nanolithographically forming a first section (121, 221, 321) of the embedded passive device over the substrate, and nanolithographically forming subsequent sections (122, 222, 322) the embedded passive device adjacent to the first section. The resulting embedded passive device may contain features less than approximately 100 nm in size.
    Type: Application
    Filed: March 12, 2008
    Publication date: September 17, 2009
    Inventors: Nachiket R. Raravikar, Rahul Panat
  • Patent number: 7553681
    Abstract: An embodiment of the present invention is a technique to form stress sensors on a package in situ. A first array of carbon nanotubes (CNTs) aligned in a first orientation is deposited at a first location on a substrate or a die in a wafer. The first array is intercalated with polymer. The first polymer-intercalated array is covered with a protective layer. A second array of CNTs aligned in a second orientation is deposited at a second location on the substrate or the die. The second array is intercalated with polymer.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: June 30, 2009
    Assignee: Intel Corporation
    Inventors: Nachiket R. Raravikar, Neha M. Patel
  • Publication number: 20090061125
    Abstract: A thermally and electrically conductive structure comprises a carbon nanotube (110) having an outer surface (111) and a carbon coating (120) covering at least a portion of the outer surface of the carbon nanotube. The carbon coating may be applied to the carbon nanotube by providing a nitrile-containing polymer, coating the carbon nanotube with the nitrile-containing polymer, and pyrolyzing the nitrile-containing polymer in order to form the carbon coating on the carbon nanotube. The carbon nanotube may further be coated with a low contact resistance layer (130) exterior to the carbon coating and a metal layer (140) exterior to the low contact resistance layer.
    Type: Application
    Filed: August 27, 2007
    Publication date: March 5, 2009
    Inventors: Linda A. Shekhawat, Nachiket R. Raravikar
  • Publication number: 20090005486
    Abstract: A self-healing composite material and a method to fabricate the self-healing microcapsules are illustrated. The self-healing microcapsules may be fabricated by mixing nanoscale material with a self-healing agent to form a self-healing mixture. The self-healing mixture may be encapsulated to form self-healing capsules which may be dispersed in a polymer to fabricate self-healing material.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Nachiket R. Raravikar, Nirupama Nirupama
  • Patent number: 7465605
    Abstract: An embodiment of the present invention is a technique to functionalize carbon nanotubes in situ. A carbon nanotube (NT) array is grown or deposited on a substrate. The NT array is functionalized in situ with a polymer by partial thermal degradation of the polymer to form a NT structure. The functionalization of the NT structure is characterized. The functionalized NT structure is processed according to the characterized functionalization.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: December 16, 2008
    Assignee: Intel Corporation
    Inventors: Nachiket R. Raravikar, James C. Matayabas, Jr.
  • Publication number: 20080305321
    Abstract: An embodiment of the present invention is a technique to functionalize carbon nanotubes in situ. A carbon nanotube (NT) array is grown or deposited on a substrate. The NT array is functionalized in situ with a polymer by partial thermal degradation of the polymer to form a NT structure. The functionalization of the NT structure is characterized. The functionalized NT structure is processed according to the characterized functionalization.
    Type: Application
    Filed: August 20, 2008
    Publication date: December 11, 2008
    Applicant: INTEL CORPORATION
    Inventors: Nachiket R. Raravikar, James C. Matayabas, JR.
  • Publication number: 20080237822
    Abstract: A microelectronic die and a package including the die. The die comprises a die substrate including a base and a die passivation layer disposed on the base. The die passivation layer includes a nanocomposite including a matrix and nanoparticles dispersed within the matrix.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Nachiket R. Raravikar, Sumant Padiyar, Neha Patel
  • Publication number: 20080185718
    Abstract: An embodiment of the present invention is an interconnect technique. A nanostructure bump is formed on a die. The nanostructure bump has a template defining nano-sized openings and metallic nano-wires extending from the nano-sized openings. The die is attached to a substrate via the nanostructure bump.
    Type: Application
    Filed: April 2, 2008
    Publication date: August 7, 2008
    Inventors: Daewoong Suh, Nachiket R. Raravikar
  • Patent number: 7371674
    Abstract: An embodiment of the present invention is an interconnect technique. A nanostructure bump is formed on a die. The nanostructure bump has a template defining nano-sized openings and metallic nano-wires extending from the nano-sized openings. The die is attached to a substrate via the nanostructure bump.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: May 13, 2008
    Assignee: Intel Corporation
    Inventors: Daewoong Suh, Nachiket R. Raravikar
  • Publication number: 20080081386
    Abstract: A method, apparatus and various material-architectures in an electrically conductive through die via formed of a composite material with a continuous phase of matrix metal and a dispersed phase of graphitic structures of carbon, wherein bulk material properties of the composite material differ from similar bulk material properties of the matrix metal.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Nachiket R. Raravikar, Daewoong Suh, Leonel Arana, James C. Matayabas