Abstract: An uplink multiple input-multiple output (MIMO) transmitter apparatus using transmit diversity uses transmit diversity signals that are modified to create intermediate orthogonal signals. A transceiver circuit in the transmitter apparatus includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from the intermediate orthogonal signals. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals correspond to the two original transmit diversity signals but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals.

Abstract: An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes a distributed ET integrated circuit (DETIC) configured to generate a distributed ET voltage. The DETIC may be coupled to a higher-bandwidth (HB) amplifier circuit and a lower-bandwidth (LB) amplifier circuit configured to amplify an HB radio frequency (RF) signal and an LB RF signal, respectively. In examples discussed herein, the DETIC may be configured to selectively provide the ET voltage to one of the HB amplifier circuit and the LB amplifier circuit, depending on which of the HB amplifier circuit and the LB amplifier circuit is activated. By providing the DETIC in proximity to the HB amplifier circuit and the LB amplifier circuit, it may be possible to reduce potential distortion to the HB RF signal and the LB RF signal, without significantly increasing footprint of the ET amplifier apparatus.

Abstract: A transmitter apparatus that performs beamforming with phase correction uses power detectors present between power amplifiers (PAs) and antennas are used to measure power amplitudes on at least two transmission paths. The sum and difference of these amplitudes are then evaluated to determine a phase difference therebetween. A phase of one signal contributing to the sum and difference may be modified until the sum and difference are the same. Based on an amount of phase modification, a correction signal may be sent to a beamforming circuit to provide phase correction during beamforming.

Abstract: A fast-switching power management circuit is provided. The fast-switching power management circuit is configured to generate an output voltage(s) based on an output voltage target that may change on a per-frame or per-symbol basis. In embodiments disclosed herein, the fast-switching power management circuit can be configured to adapt (increase or decrease) the output voltage(s) within a very short switching interval (e.g., less than one microsecond). As a result, when the fast-switching power management circuit is employed in a wireless communication apparatus to supply the output voltage(s) to a power amplifier circuit(s), the fast-switching power management circuit can quickly adapt the output voltage(s) to help improve operating efficiency and linearity of the power amplifier circuit(s).

Abstract: A multi-mode power management integrated circuit (PMIC) is provided. The PMIC includes a supply voltage circuit that generates a number of supply voltages based on an input voltage. The PMIC also includes a pair of voltage circuits each generating a respective voltage based on any of the supply voltages. In one operation mode, one of the voltage circuits is configured to generate an envelope tracking (ET) voltage and another one of the voltage circuits is configured to generate the input voltage for the supply voltage circuit. The input voltage may be generated according to a peak of the ET voltage to cause each of the supply voltages to be proportionally related to the peak of the ET voltage. Accordingly, the voltage circuit configured to generate the ET voltage can operate based on an appropriate one of the supply voltages, thus helping to improve efficiency and linearity of the voltage circuit.

Abstract: An inverted group delay circuit is provided. The inverted group delay circuit can offset a group delay between a pair of signals. In a non-limiting example, the inverted group delay circuit can be configured to offset a group delay (e.g., negative group delay) between a time-variant voltage and a time-variant envelope of an analog signal. More specifically, the inverted group delay circuit can output an inverted time-variant voltage having an opposing phase and time-adjusted relative to the time-variant voltage to thereby offset the group delay between the time-variant voltage and the time-variant envelope. As such, the inverted group delay circuit can be provided in a power management integrated circuit (PMIC) to improve timing alignment between a time-variant voltage(s) and a time-variant analog signal(s) at a power amplifier(s), thus helping to reduce potential amplitude distortion when the analog signal(s) is amplified by the power amplifier(s).

Abstract: A power management circuit operable with group delay is provided. In embodiments disclosed herein, the power management circuit includes a voltage processing circuit configured to receive a first time-variant target voltage having a first group delay relative to a time-variant target voltage and a second time-variant target voltage having a second group delay relative to the time-variant target voltage. Accordingly, the voltage processing circuit generates a windowed time-variant target voltage higher than or equal to a highest one of the first time-variant target voltage and the second time-variant target voltage in a group delay tolerance window(s) defined by the first group delay and the second group delay. As a result, the power management circuit can generate a time-variant voltage based on the windowed time-variant target voltage to help a power amplifier to avoid amplitude clipping when amplifying an analog signal.

Abstract: An envelope tracking (ET) power amplifier apparatus is provided. The ET power amplifier apparatus includes an amplifier circuit configured to amplify a radio frequency (RF) signal based on an ET voltage and a tracker circuit configured to generate the ET voltage based on an ET target voltage. The ET power amplifier apparatus also includes a control circuit. The control circuit is configured to dynamically determine a voltage standing wave ratio (VSWR) change at a voltage output relative to a nominal VSWR and cause an adjustment to the ET voltage. By dynamically determining the VSWR change and adjusting the ET voltage in response to the VSWR change, the amplifier circuit can operate under a required EVM threshold across all phase angles of the RF signal.

Abstract: A multi-mode envelope tracking (ET) amplifier circuit is provided. The multi-mode ET amplifier circuit can operate in a low-resource block (RB) mode, a mid-RB mode, and a high-RB mode. The multi-mode ET amplifier circuit includes fast switcher circuitry having a first switcher path and a second switcher path and configured to generate an alternating current (AC) current. A control circuit activates the fast switcher circuitry in the mid-RB mode and the high-RB mode, while deactivating the fast switcher circuitry in the low-RB mode. More specifically, the control circuit selectively activates one of the first switcher path and the second switcher path in the mid-RB mode and activates both the first switcher path and the second switcher path in the high-RB mode. As a result, it is possible to improve efficiency of ET tracker circuitry and the multi-mode ET amplifier circuit in all operation modes.

Abstract: An electrical current measurement circuit is provided. The electrical current measurement circuit is configured to receive a sense current proportionally related to an electrical current of interest to continuously charge a capacitor to a sense voltage. The electrical current measurement circuit is configured to determine whether the sense voltage reaches a predefined voltage threshold and reduce the sense voltage to below the predefined voltage threshold in response to the sense voltage reaching the predefined voltage threshold. The electrical current measurement circuit counts each occurrence of the sense voltage reaching the predefined voltage threshold and quantifies the electrical current based on a total count of the sense voltage reaching the predefined voltage threshold during the predefined measurement period.

Abstract: A power management circuit operable to adjust voltage within a defined interval(s) is provided. The power management circuit is configured to generate a time-variant voltage for amplifying an analog signal based on a target voltage. In embodiments disclosed herein, the power management circuit can be configured to generate a lower initial target voltage at a start of the defined interval(s), such as during a cyclic prefix (CP) of an orthogonal frequency division multiplexing (OFDM) symbol, and dynamically adjust the initial target voltage, if necessary, within the defined interval(s) based on a time-variant power envelope of the analog signal. By generating the lower target voltage, in contrast to a conventional method of generating a maximum target voltage, at the start of the defined interval(s), it is possible to reduce energy waste and help improve efficiency in a power amplifier configured to amplify the analog signal based on the time-variant voltage.

Abstract: A power management circuit operable to reduce energy loss is provided. The power management circuit is configured to provide a time-variant voltage(s) to a power amplifier(s) for amplifying an analog signal(s). To achieve best possible operating efficiency at the power amplifier(s), the time-variant voltage(s) needs to rise and fall frequently and quickly in accordance with power fluctuations of the analog signal(s). The power management circuit stores an electrical potential energy (e.g., capacitive energy) when the time-variant voltage(s) increases and discharges the electrical potential energy when the time-variant voltage(s) decreases. In embodiments disclosed herein, the power management circuit is configured to harvest a portion of the discharged electrical potential energy to thereby charge a battery. By harvesting the discharged electrical potential energy, it is possible to prolong battery life concurrent to supporting fast and frequent voltage changes.

Abstract: An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (ETIC) and a distributed ETIC (DETIC) coupled to a single-wire bus that correspond to a first bus access priority and a second bus access priority, respectively. The ETIC and the DETIC can contend for access to the single-wire bus by asserting a bus contention indication(s) when the single-wire bus is in a defined bus state configured to permit bus contention. In a non-limiting example, a winner for the single-wire bus is a peer device having a highest bus access priority between the ETIC and the DETIC. In this regard, each of the ETIC and the DETIC can have a chance to initiate communications over the single-wire bus, thus making it possible for the single-wire bus to function based on bidirectional peer-to-peer (P2P) bus architecture capable of supporting more application and/or deployment scenarios.

Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

Abstract: A delay-compensating power management integrated circuit (PMIC) is provided. The PMIC includes a target voltage circuit configured to generate a target voltage that is utilized for generating a time-variant voltage to amplify an analog signal. The target voltage is generated based on a time-variant envelope of the analog signal but lags behind the time-variant envelope by a temporal delay(s) due to an inherent processing delay in the target voltage circuit. In this regard, a voltage processing circuit is provided in the target voltage circuit to generate a modified target voltage that is time-adjusted relative to the target voltage to substantially offset the temporal delay(s). By generating the time-variant voltage based on the modified target voltage, the time-variant voltage can be better aligned with the time-variant envelope of the analog signal, thus helping to reduce amplitude distortion when amplifying the analog signal.

Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

Abstract: Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

Abstract: A delay-compensating power management circuit is provided. The power management circuit includes a power management integrated circuit (PMIC) configured to generate a time-variant voltage(s) based on a time-variant target voltage(s) for amplifying an analog signal(s) associated with a time-variant power envelope(s). A voltage processing circuit is provided in the power management circuit to determine a temporal offset, which can be positive or negative, between the time-variant power envelope(s) and the time-variant target voltage(s). Accordingly, the voltage processing circuit modifies the time-variant target voltage(s) to substantially reduce the determined temporal offset and thereby realign the time-variant target voltage(s) with the time-variant power envelope(s). By realigning the time variant target voltage(s) with the time-variant power envelope(s), it is possible to align the time-variant voltage(s) with the time-variant power envelope(s) to reduce distortions (e.g.