Patents by Inventor Nadim Khlat

Nadim Khlat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11579646
    Abstract: A power management circuit for fast average power tracking (APT) voltage switching is provided. The power management circuit includes a primary voltage circuit configured to generate an APT voltage based on an APT target voltage. However, the primary voltage circuit may be inherently slow in ramping up the APT voltage to the APT target voltage. As such, a secondary voltage circuit is provided in the power management circuit to help drive the APT voltage to a desired level by a defined temporal limit. Once the APT voltage reaches the desired level, the secondary voltage circuit will automatically shut off, while the primary voltage circuit continues operating at a selected duty cycle to maintain the APT voltage at the APT target voltage. By utilizing the secondary voltage circuit to quickly drive up the APT voltage, the power management circuit is capable of supporting dynamic power control under stringent switching delay budget.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: February 14, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11563421
    Abstract: An acoustic structure is provided. The acoustic structure includes an acoustic resonator structure configured to resonate in a series resonance frequency (e.g., passband frequency) to pass a signal, or cause a series capacitance to block the signal in a parallel resonance frequency (e.g., stopband frequency). The parallel resonance frequency may become higher than the series resonance frequency when the tunable capacitance is lesser than or equal to two times of the series capacitance (CTune?2C0), or lower than the series resonance frequency when the tunable capacitance is greater than two times of the series capacitance (CTune>2C0). In this regard, the acoustic structure can be configured to include a tunable reactive circuit to generate the tunable capacitance (CTune) to adjust the parallel resonance frequency. As such, it may be possible to flexibly configure the acoustic resonator structure to block the signal in desired stopband frequencies.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: January 24, 2023
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11558016
    Abstract: A fast-switching average power tracking (APT) power management integrated circuit (PMIC) is provided. The fast-switching APT PMIC includes a voltage amplifier(s) and an offset capacitor(s) having a small capacitance (e.g., between 10 nF and 200 nF). The voltage amplifier(s) is configured to generate an initial APT voltage(s) based on an APT target voltage(s) and the offset capacitor(s) is configured to raise the initial APT voltage(s) by an offset voltage(s) to generate an APT voltage(s). In embodiments disclosed herein, the offset voltage(s) is modulated based on the APT target voltage(s). Given the small capacitance of the offset capacitor(s), it is possible to adapt the offset voltage(s) fast enough to thereby change the APT voltage(s) within a predetermined temporal limit (e.g., 0.5 ?s). As a result, the fast-switch APT PMIC can enable a power amplifier(s) to support dynamic power control with improved linearity and efficiency.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: January 17, 2023
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11545937
    Abstract: A dual-mode average power tracking (APT) controller operates in a first mode to move the control voltage quickly without concern for ripple or ringing. When this coarse adjustment takes the control voltage to within a desired margin of a target, the controller may switch to a second mode, where the APT controller more slowly approaches the target, but has reduced ringing or ripples. The mode is changed by changing resistance and capacitance values in a loop filter within the APT circuit. In a further aspect, a pulse shaper circuit may inject a pulse to force the control voltage to change more rapidly. By switching modes in this fashion, the control voltage may quickly reach a desired target, and then remain in the second mode during a transmission time slot such that the control voltage is clean throughout.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: January 3, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Jean-Frederic Chiron, Robert Moehrke
  • Patent number: 11545945
    Abstract: An apparatus and method for calibrating an envelope tracking (ET) lookup table (LUT) are provided. An ET power management apparatus includes a power amplifier configured to amplify a radio frequency (RF) signal from a time-variant input power to a time-variant output power linearly related to the time-variant input power. A calibration circuit is employed to receive a time-variant output power feedback nonlinearly related to the time-variant input power, determine a linear relationship between the time-variant input power and the time-variant output power based on the time-variant output power feedback, and calibrate the ET LUT based on the determined linear relationship. As a result, it is possible to improve accuracy of the ET LUT to thereby improve operating efficiency and linearity of the power amplifier.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: January 3, 2023
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11539290
    Abstract: A power management circuit operable with low battery is provided. The power management circuit is configured to generate a time-variant average power tracking (APT) voltage based on a battery voltage supplied by a voltage source (e.g., battery). In examples disclosed herein, the power management circuit can be configured to remain operable when the battery voltage drops below a low battery threshold. Specifically, the power management circuit maintains the time-variant APT voltage at a constant level in response to the battery voltage dropping below the low battery threshold to thereby avoid drawing a rush current from the voltage source. As a result, a wireless device employing the power management circuit can remain operable with low battery to continue to support critical applications.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: December 27, 2022
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11539330
    Abstract: An envelope tracking (ET) integrated circuit (ETIC) supporting multiple types of power amplifiers. The ETIC includes a pair of tracker circuits configured to generate a pair of low-frequency currents at a pair of output nodes, respectively. The ETIC also includes a pair of ET voltage circuits configured to generate a pair of ET voltages at the output nodes, respectively. In various embodiments disclosed herein, the ETIC can be configured to generate the low-frequency currents independent of what type of power amplifier is coupled to the output nodes. Concurrently, the ETIC can also generate the ET voltages in accordance with the type of power amplifier coupled to the output nodes. As such, it is possible to support multiple types of power amplifiers based on a single ETIC, thus helping to reduce footprint, power consumption, and heat dissipation in an electronic device employing the ETIC and the multiple types of power amplifiers.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: December 27, 2022
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11539289
    Abstract: A multi-level charge pump (MCP) circuit is provided. The MCP circuit includes a multi-level voltage circuit configured to receive a supply voltage and generate a low-frequency voltage. The multi-level voltage circuit includes a first switch path, a second switch path, and a third switch path each having a respective on-resistance and coupled in parallel between an input node and an output node. In a non-limiting example, the multi-level voltage circuit is configured to activate the first switch path and at least one of the second switch path and the third switch path when the multi-level voltage circuit generates the low-frequency voltage that equals the supply voltage. By activating at least two of the three switch paths to generate the low-frequency voltage, it may be possible to reduce an equivalent resistance of the multi-level voltage circuit, thus helping to improve efficiency and reduce power loss of the MCP circuit.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: December 27, 2022
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Jeffrey D. Potts, Michael R. Kay, Michael J. Murphy
  • Publication number: 20220407462
    Abstract: A wideband transmission circuit is provided. The wideband transmission circuit includes a power amplifier circuit(s) and an envelope tracking (ET) integrated circuit (ETIC). The ETIC is configured to generate a modulated voltage based on a modulated target voltage. The power amplifier circuit(s) amplifies a radio frequency (RF) signal(s) based on the modulated voltage and provides the amplified RF signal(s) to a coupled RF front-end circuit. In embodiments disclosed herein, the ETIC is configured to cause the modulated target voltage to be equalized by a real equalization filter to thereby compensate for a complex voltage distortion filter resulting from a coupling between the power amplifier circuit(s) and the RF front-end circuit. As a result, it is possible to reduce undesired instantaneous excessive compression and/or spectrum regrowth resulting from the complex voltage distortion filter to thereby improve efficiency and linearity of the power amplifier circuit(s).
    Type: Application
    Filed: March 8, 2022
    Publication date: December 22, 2022
    Inventor: Nadim Khlat
  • Publication number: 20220407463
    Abstract: A wideband transmission circuit is provided. The wideband transmission circuit includes a transceiver circuit and a power amplifier circuit(s). The transceiver circuit generates a radio frequency (RF) signal(s) from a time-variant input vector and provides the RF signal(s) to the power amplifier circuit(s). The power amplifier circuit(s) amplifies the RF signal(s) based on a modulated voltage and provides the amplified RF signal(s) to a coupled RF front-end circuit (e.g., filter/multiplexer circuit). In embodiments disclosed herein, the transceiver circuit is configured to apply an equalization filter to the time-variant input vector to thereby compensate for a voltage distortion filter caused by a coupling of the power amplifier circuit(s) and the RF front-end circuit. As a result, it is possible to reduce undesired instantaneous excessive compression and/or spectrum regrowth resulting from the voltage distortion filter to thereby improve efficiency and linearity of the power amplifier circuit(s).
    Type: Application
    Filed: March 22, 2022
    Publication date: December 22, 2022
    Inventors: Nadim Khlat, James M. Retz
  • Publication number: 20220407478
    Abstract: Envelope tracking (ET) voltage correction in a transmission circuit is provided. The transmission circuit includes a transceiver circuit and a power amplifier circuit(s). The transceiver circuit generates a radio frequency (RF) signal(s) from a time-variant modulation vector and the power amplifier circuit(s) amplifies the RF signal(s) based on a modulated voltage and provides the amplified RF signal(s) to a coupled RF front-end circuit. Herein, the transceiver circuit is configured to apply an equalization filter to a selected form of the time-variant modulation vector to compensate for a voltage distortion filter created across a modulation bandwidth of the RF signal(s) by coupling the power amplifier circuit with the RF front-end circuit.
    Type: Application
    Filed: March 22, 2022
    Publication date: December 22, 2022
    Inventors: Nadim Khlat, James M. Retz
  • Publication number: 20220407465
    Abstract: Voltage ripple suppression in a transmission circuit is disclosed. The transmission circuit includes a power amplifier circuit coupled to an envelope tracking integrated circuit (ETIC) via a conductive path. Notably, the ETIC and the conductive path can present a large source impedance to the power amplifier circuit, which can cause a ripple in the modulated voltage received by the power amplifier circuit. In a conventional approach, the large source impedance may be isolated by a large decoupling capacitor at the expense of increased voltage switching time and battery current drain. In contrast, the ETIC disclosed herein can determine and apply a correction term to the modulated voltage generated by the ETIC to thereby suppress the ripple without requiring the large decoupling capacitor. By eliminating the large decoupling capacitor, the transmission circuit can thus achieve fast voltage switching with lower battery current drain.
    Type: Application
    Filed: April 6, 2022
    Publication date: December 22, 2022
    Inventor: Nadim Khlat
  • Publication number: 20220407464
    Abstract: Envelope tracking (ET) voltage correction in a transmission circuit is provided. The transmission circuit includes a transceiver circuit and a power amplifier circuit(s). The transceiver circuit generates a radio frequency (RF) signal(s) from a time-variant modulation vector and the power amplifier circuit(s) amplifies the RF signal(s) based on a modulated voltage and provides the amplified RF signal(s) to a coupled RF front-end circuit. Herein, the transceiver circuit is configured to apply a complex filter(s) to the time-variant modulation vector and/or the RF signal(s) to compensate for a voltage distortion filter created across a modulation bandwidth of the RF signal(s) by coupling the power amplifier circuit with the RF front-end circuit.
    Type: Application
    Filed: March 22, 2022
    Publication date: December 22, 2022
    Inventors: Nadim Khlat, James M. Retz
  • Publication number: 20220407420
    Abstract: The present disclosure discloses a direct current (DC)-DC boost converter, which includes a battery terminal providing a battery voltage, a charge pump coupled between the battery terminal and an interior node, and a power inductor coupled between the interior node and a power supply terminal that provides a power voltage to a radio frequency transceiver. The charge pump is configured to provide an interior voltage at the interior node based on the battery voltage. Herein, the interior voltage toggles between the battery voltage and two times the battery voltage. The charge pump includes a first switch coupled between the battery terminal and the interior node, a second switch coupled between the battery terminal and a connecting node, a third switch coupled between the connecting node and ground, and a flying capacitor coupled between the interior node and the connecting node of the second switch and the third switch.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 22, 2022
    Inventors: Nadim Khlat, Michael R. Kay, Jeffrey D. Potts, Michael J. Murphy
  • Publication number: 20220399861
    Abstract: An envelope tracking (ET) integrated circuit (ETIC) operable with multiple types of power amplifiers is provided. The ETIC is configured to provide one or more ET voltages to a power amplifier(s) for amplifying a radio frequency (RF) signal. In embodiments disclosed herein, the ETIC can be configured to generate the ET voltages at same or different voltage levels based on specific types of the power amplifier(s), such as multi-stage power amplifier and Doherty power amplifier, and for a wider modulation bandwidth of the RF signal. As such, the ETIC can be flexibly adapted to enable a variety of power management scenarios and/or topologies.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 15, 2022
    Inventor: Nadim Khlat
  • Publication number: 20220385247
    Abstract: An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.
    Type: Application
    Filed: August 11, 2022
    Publication date: December 1, 2022
    Inventors: Nadim Khlat, Terry J. Stockert
  • Publication number: 20220385239
    Abstract: A radio frequency (RF) equalizer in an envelope tracking (ET) circuit is disclosed. A transmitter chain includes an ET circuit having an RF equalizer therein. The RF equalizer includes a two operational amplifier (op-amp) structure that provides a relatively flat gain and a relatively constant negative group delay across a frequency range of interest (e.g., up to 200 MHz). The simple two op-amp structure provides frequency response equalization and time tuning adjustment and/or creates a window Vcc signal.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 1, 2022
    Inventor: Nadim Khlat
  • Publication number: 20220368295
    Abstract: A distributed power management circuit is disclosed. Herein, a phase correction in a radio frequency (RF) signal is performed by a power management integrated circuit (PMIC), a distributed PMC, and a power amplifier circuit. The power amplifier circuit includes a phase shifter circuit configured to phase-shift the RF signal based on a phase correction signal and a power amplifier configured to amplify the phase-shifted RF signal based on a modulated voltage. The distributed PMIC is configured to generate the phase correction signal and the modulated voltage based on a modulated target voltage. The PMIC is configured to generate the modulated target voltage based on a time-variant power envelope of the RF signal. As a result, the modulated voltage and the time-variant power envelope can be better aligned in time and/or phase at the power amplifier circuit to thereby improve efficiency and linearity of the power amplifier.
    Type: Application
    Filed: December 29, 2021
    Publication date: November 17, 2022
    Inventor: Nadim Khlat
  • Publication number: 20220368283
    Abstract: A power management circuit supporting phase correction in an analog signal is disclosed. The power management circuit includes a power amplifier circuit configured to amplify an analog signal having a time-variant power envelope based on a modulated voltage. The power management circuit also includes an envelope tracking (ET) integrated circuit (ETIC) configured to generate the modulated voltage and a modulated phase correction voltage to thereby cause a phase change in the analog signal. In embodiments disclosed herein, a correlation between the time-variant power envelope, the modulated voltage, and the modulated phase correction voltage is explored to thereby allow the ETIC to generate the modulated voltage and the modulated phase correction voltage based on the time-variant power envelope. As a result, it is possible to enable good time and phase alignment between the modulated voltage and the time-variant power envelope to thereby improve efficiency and linearity of the power amplifier circuit.
    Type: Application
    Filed: November 29, 2021
    Publication date: November 17, 2022
    Inventors: Andrew F. Folkmann, Nadim Khlat, Mark Connor
  • Publication number: 20220368294
    Abstract: A power amplifier circuit supporting phase correction in a radio frequency (RF) signal is disclosed. The power amplifier circuit includes a power amplifier configured to amplify an RF signal based on a modulated voltage. The power amplifier circuit also includes a phase correction circuit configured to generate a phase correction signal based on the modulated voltage to thereby cause a phase change in the RF signal before the RF signal is amplified by the power amplifier. As a result, the modulated voltage and the time-variant power envelope can be better aligned in time and/or phase at the power amplifier circuit to thereby improve efficiency and linearity of the power amplifier circuit.
    Type: Application
    Filed: December 29, 2021
    Publication date: November 17, 2022
    Inventor: Nadim Khlat