Patents by Inventor Nafea Bshara

Nafea Bshara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10803007
    Abstract: Provided are integrated circuit devices and methods for operating integrated circuit devices. In various examples, an integrated circuit device can include a memory for storing instructions a configuration register, and an instruction execution circuit. An instruction read from the memory can be a reconfigurable instruction. which includes a set of fields corresponding to a plurality of operations. Values in the fields can determine whether the operations are enabled or disabled. For example, a first value in a first field can enable a first operation. Whether the first operation is performed can further be determined by comparing a second value in a second field to a third value read from the configuration register. The value set in the configuration register thus can control whether the operation is performed.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: October 13, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Thomas A. Volpe, Nafea Bshara, Raymond Scott Whiteside, Ron Diamant
  • Patent number: 10802828
    Abstract: Provided are systems and methods for implementing a memory for an integrated circuit device. In various examples, the integrated circuit can operate the memory as a FIFO, where each address in the FIFO is directly addressable. The integrated circuit can include a first register for storing a head pointer and a second register for storing a tail pointer. When new data is written to the memory, the data cat be written starting at the tail pointer location, without the tail pointer being modified. The tail pointer can be incremented using write transactions received from external to the integrated circuit.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: October 13, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Thomas A. Volpe, Nafea Bshara
  • Patent number: 10795742
    Abstract: Disclosed are techniques regarding aspects of implementing client configurable logic within a computer system. The computer system can be a cloud infrastructure. The techniques can include determining that the client configurable logic has performed an errant action.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: October 6, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Asif Khan, Sundeep Amirineni, Kiran Kalkunte Seshadri, Nafea Bshara
  • Patent number: 10789337
    Abstract: A licensing server object generator identifies a plurality of servers that can be used to obtain a license for accessing a feature of an application. The licensing server object generator determines, for the identified servers, network addresses and utilizes these network addresses to generate a plurality of data objects. Each data object specifies a subset of the network addresses for the servers. The licensing server object generator makes these data objects available to enable use of the data objects to obtain the license.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: September 29, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Kristopher King, Islam Mohamed Hatem Abdulfattah Mohamed Atta, Nafea Bshara
  • Patent number: 10778521
    Abstract: Techniques for reconfiguring a server to perform various hardware functions are disclosed herein. In one embodiment, a client device sends an instance request to a compute service system for launching an instance. The instance request indicates a resource requirement for the instance. In response to the instance request, the compute service system selects a server from among a plurality of servers in the compute service system based on determining that the server is configurable to at least partially meet the resource requirement. The compute service system then sends a provisioning request to the selected server. The provisioning request includes information for programming a reconfigurable resource of an adapter device in the selected server according to a particular hardware function.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: September 15, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Anthony Nicholas Liguori, Nafea Bshara
  • Patent number: 10776142
    Abstract: Disclosed herein are techniques for configuring a shell logic in a configurable computing system while a client virtual machine (VM) using the shell logic is active. In certain embodiments, a configurable device includes a client configurable circuit associated with a client virtual machine, and a shell logic configured to isolate the client configurable circuit. The shell logic includes a reconfigurable shell, an isolation logic, and a packet processing logic. The isolation logic is configured to disable communication between the reconfigurable shell and the client virtual machine when the reconfigurable shell is being reconfigured. The packet processing logic is configured to service transactions between the client virtual machine and the configurable device after the communication between the reconfigurable shell and the client virtual machine is disabled.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: September 15, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Kiran Kalkunte Seshadri, Asif Khan, Nafea Bshara
  • Patent number: 10778653
    Abstract: The following description is directed to a logic repository service. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic of the configurable hardware. The method can include generating the configuration data for the configurable hardware. The configuration data can include data for implementing the application logic. The method can include encrypting the configuration data to generate encrypted configuration data. The method can include signing the encrypted configuration data using a private key. The method can include transmitting the signed encrypted configuration data in response to the request.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: September 15, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Islam Mohamed Hatem Abdulfattah Mohamed Atta, Christopher Joseph Pettey, Nafea Bshara, Asif Khan, Mark Bradley Davis, Prateek Tandon
  • Patent number: 10764129
    Abstract: The following description is directed to a logic repository service supporting adaptable host logic. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic. The method can include selecting a particular host logic shell from a group of host logic shells. The particular host logic shell can be used to encapsulate the application logic when the configurable hardware is configured. Configuration data for the configurable hardware can be generated. The configuration data can include data for implementing the application logic and at least a portion of the particular host logic shell. The method can include receiving a second request to download the configuration data to a host server computer comprising the configurable hardware. The configuration data can be transmitted to the host server computer in response to the second request.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: September 1, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Asif Khan, Islam Mohamed Hatem Abdulfattah Mohamed Atta, Christopher Joseph Pettey, Kiran Kalkunte Seshadri, Nafea Bshara
  • Patent number: 10754797
    Abstract: A network device stores information associated with a packet in a queue. The network device sends an interrupt to a host to notify the host of completion of processing the packet. A Memory-Mapped Input/Output (MMIO) write transaction is received that includes a pointer update associated with the queue and an interrupt unmasking value. The pointer is updated and the interrupt is unmasked based on receiving the single MMIO write transaction.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: August 25, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Georgy Machulsky, Netanel Israel Belgazal, Said Bshara, Nafea Bshara, Adi Habusha
  • Patent number: 10746792
    Abstract: An error-handling processing circuit and system are provided. The system can receive an error signal, such as an interrupt, and decouple (e.g., by a gate signal) a functional clock from a processing block, in some instances effectively halting the processing block's operation. This can prevent a cascade of interdependent errors, thereby avoiding producing redundant or confusing error information. The system can include the processing block, a debug clock not coupled to the processing block, and a data block (e.g., a register file) coupled to the debug clock and to an external input/output interface. The data block can be configured to continue receiving a clock signal via a multiplexer from the debug clock without disruption after the functional clock is decoupled, enabling the data block to remain operational for debugging.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: August 18, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Ron Diamant, Gil Stoler, Nafea Bshara
  • Patent number: 10747565
    Abstract: A computing system can include a server computer and a configurable hardware platform. The server computer can include instances or domains such as a management partition and a user partition. The management partition can be used to perform management services for the user partitions and the configurable hardware platform. The configurable hardware platform is coupled to the server computer, and can include a host logic and a configurable application logic. In an embodiment, the computing system is configured to provide the user partition with physical or virtual access to a first part of the configurable hardware platform through the host logic in the configurable hardware platform. The computing system is also configured to provide the user partition with virtual access to certain portions/resources associated with the configurable hardware platform.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: August 18, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Robert Michael Johnson, Kiran Kalkunte Seshadri, Nafea Bshara
  • Publication number: 20200259759
    Abstract: Provided are systems and methods for reliable, out-of-order transmission of packets. In some implementations, provided is an apparatus configured to communicate with a network and a host device. The apparatus may receive messages from the host device at a send queue, where each message includes destination information. The apparatus may further determine, using the destination information and an identify of the send queue, a transport context associated with a destination on the network. The apparatus may further, for each message and using the transport context, generate a packet including the message and transmit the packet over the network. The apparatus may further monitor status for each transmitted packet.
    Type: Application
    Filed: May 1, 2020
    Publication date: August 13, 2020
    Inventors: Leah Shalev, Brian William Barrett, Nafea Bshara, Georgy Machulsky
  • Publication number: 20200257454
    Abstract: Methods and apparatus are disclosed for securely erasing partitions of reconfigurable logic devices such as FPGAs in a multi-tenant server environment. In one example, a method of securely erasing an FPGA includes identifying one partition of previously-programmed resources in the FPGA, erasing the identified partition by storing new values in memory or storage elements of the identified partition, and storing new values in memory or storage elements of additional external resources electrically connected to the integrated circuit and associated with the identified partition. Thus, other partitions and subsequent users of the identified partition are prevented from accessing the securely erased data. A configuration circuit, accessible by a host computer via DMA, can be programmed into the FPGA reconfigurable logic for performing the disclosed erasing operations.
    Type: Application
    Filed: April 30, 2020
    Publication date: August 13, 2020
    Applicant: Amazon Technologies, Inc.
    Inventors: Mark Bradley Davis, Erez Izenberg, Robert Michael Johnson, Asif Khan, Islam Mohamed Hatem Abdulfattah Mohamed Atta, Nafea Bshara, Christopher Joseph Pettey
  • Patent number: 10740466
    Abstract: Interfaces of a compute node on a printed circuit board can be secured by obfuscating the information communicated over the interfaces. Data to be communicated between the compute node and a device on the printed circuit board using an interface can be encrypted, and an address corresponding to the data to be communicated can be scrambled. In addition, the compute node can be the root of trust which can provide secure boot of different components using an on-chip mechanism, and without relying on external devices.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: August 11, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Nafea Bshara, Matthew Shawn Wilson, Eric Jason Brandwine, Anthony Nicholas Liguori, Yaniv Shapira, Mark Bradley Davis, Adi Habusha
  • Patent number: 10742555
    Abstract: A method and corresponding apparatus for detecting network congestion. The method includes capturing, using a local clock of a sender device, a send time of an outgoing packet sent from the sender device to a receiver device through a forward route, and capturing, using the local clock of the sender device, a receive time of an acknowledgment packet sent from the receiver device to the sender device through a backward route. The acknowledgment packet contains timing information, generated using a local clock of the receiver device, for determining an internal latency of the receiver device. A round trip time is computed as a difference between the send time and the receive time. The internal latency is subtracted from the round trip time to compute a total propagation time. If the total propagation time is above a threshold, the forward route and the backward route are changed.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: August 11, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Leah Shalev, Ron Diamant, Erez Izenberg, Nafea Bshara
  • Patent number: 10725957
    Abstract: A plurality of system on chips (SoCs) in a server computer can be coupled to a plurality of memory agents (MAs) via respective Serializer/Deserializer (SerDes) interfaces. Each of the plurality of MAs can include one or more memory controllers to communicate with a memory coupled to the respective MA, and globally addressable by each of the SoCs. Each of the plurality of SoCs can access the memory coupled to any of the MAs in uniform number of hops using the respective SerDes interfaces. Different types of memories, e.g., volatile memory, persistent memory, can be supported.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: July 28, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Mark Bradley Davis, Thomas A. Volpe, Nafea Bshara, Yaniv Shapira, Adi Habusha
  • Patent number: 10727966
    Abstract: In various implementations, provided are techniques for distributing network time across a network using multiple grand masters (e.g., master time keepers). These techniques include having multiple grand masters simultaneously providing time to the network. Simultaneous means that all the grand masters are active at the same time, and none are designated as backups. In various implementations, the nodes in the network can simultaneously synchronize to network times provided by more than grand masters so that the nodes can obtain more than one network time. Using these multiple network times, nodes configured as clients can determine one network time. The client devices can then use the single network time in applications that require a time.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: July 28, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Erez Izenberg, Nafea Bshara
  • Patent number: 10719463
    Abstract: Disclosed herein are techniques for migrating data from a source memory range to a destination memory while data is being written into the source memory range. An apparatus includes a control logic configured to receive a request for data migration and initiate the data migration using a direct memory access (DMA) controller, while the source memory range continues to accept write operations. The apparatus also includes a tracking logic coupled to the control logic and configured to track write operations performed to the source memory range while data is being copied from the source memory range to the destination memory. The control logic is further configured to initiate copying data associated with the tracked write operations to the destination memory.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: July 21, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Nafea Bshara, Mark Bradley Davis, Matthew Shawn Wilson, Uwe Dannowski, Yaniv Shapira, Adi Habusha, Anthony Nicholas Liguori
  • Patent number: 10705995
    Abstract: The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a plurality of reconfigurable logic regions. Each reconfigurable region can include hardware that is configurable to implement an application logic design. The host logic can be used for separately encapsulating each of the reconfigurable logic regions. The host logic can include a plurality of data path functions where each data path function can include a layer for formatting data transfers between a host interface and the application logic of a corresponding reconfigurable logic region. The host interface can be configured to apportion bandwidth of the data transfers generated by the application logic of the respective reconfigurable logic regions.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: July 7, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Asif Khan, Islam Mohamed Hatem Abdulfattah Mohamed Atta, Robert Michael Johnson, Mark Bradley Davis, Christopher Joseph Pettey, Nafea Bshara, Erez Izenberg
  • Patent number: 10708241
    Abstract: A hardware security accelerator includes a configurable parser that is configured to receive a packet and to extract from the packet headers associated with a set of protocols. The security accelerator also includes a packet type detection unit to determine a type of the packet in response to the set of protocols and to generate a packet type identifier indicative of the type of the packet. A configurable security unit includes a configuration unit and a configurable security engine. The configuration unit configures the configurable security engine according to the type of the packet and to content of at least one of the headers extracted from the packet. The configurable security engine performs security processing of the packet to provide at least one security result.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: July 7, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Ron Diamant, Nafea Bshara, Leah Shalev, Erez Izenberg