Abstract: Methods and apparatus are disclosed for securely erasing partitions of reconfigurable logic devices such as FPGAs in a multi-tenant server environment. In one example, a method of securely erasing an FPGA includes identifying one partition of previously-programmed resources in the FPGA, erasing the identified partition by storing new values in memory or storage elements of the identified partition, and storing new values in memory or storage elements of additional external resources electrically connected to the integrated circuit and associated with the identified partition. Thus, other partitions and subsequent users of the identified partition are prevented from accessing the securely erased data. A configuration circuit, accessible by a host computer via DMA, can be programmed into the FPGA reconfigurable logic for performing the disclosed erasing operations.

Abstract: Techniques for emulating a configuration space by a peripheral device may include receiving a access request, determining that the access request is for an emulated configuration space of the peripheral device, and retrieving an emulated configuration from an emulated configuration space. The access request can then be serviced by using the emulated configuration.

Abstract: A method for writing data, the method may include: receiving or generating, by an interfacing module, a data unit coherent write request for performing a coherent write operation of a data unit to a first address; receiving, by the interfacing module and from a circuit that comprises a cache and a cache controller, a cache coherency indicator that indicates that a most updated version of the content stored at the first address is stored in the cache; and instructing, by the interfacing module, the cache controller to invalidate a cache line of the cache that stored the most updated version of the first address without sending the most updated version of the content stored at the first address from the cache to a memory module that differs from the cache if a length of the data unit equals a length of the cache line.

Abstract: Provided are systems and methods for modifying a forwarding decision for a packet being processed by a network device. The forwarding decision can include a final determination whether to forward the packet from the network device and onto a network. In various implementations, an integrated circuit device of the network device can receive packet information for the packet, where the packet information includes a forwarding decision. The forwarding decision can include a decision type. The integrated circuit device can further determine a redirection includes using the decision type. The redirection information can include a redirection entry for each of one or more decision types. The integrated circuit device can further modify the packet information using values from the particular redirection entry, excluding modification of values associated with an outbound packet header that can be used to forward the particular packet.

Abstract: A method for calculating a plurality (M) of redundancy blocks for multiple (N) data blocks of a plurality (D) of words each, the method comprises: receiving the number (M) of redundancy blocks by a calculator that comprises multiple (R) calculation units; configuring the calculator according to M and R; concurrently calculating, if M equals R, by the multiple (R) calculation units of the calculator, R sets of parity vectors, each set includes a plurality (D) of parity vectors; and calculating the plurality (M) of the redundancy blocks based on the R sets of parity vectors.

Abstract: An Input/Output (I/O) adapter device is provided. The I/O adapter device comprises: a device interface configured to communicate with a first device and a second device communicatively coupled to the I/O adapter device; a host interface configured to support communication with a frontend driver of a host device via a software interface of the host device; a first emulated backend driver configured to communicate with the frontend driver through the host interface using the software interface and to communicate with the first device to provide the frontend driver with access to the first device; and a second emulated backend driver configured to communicate with the frontend driver through the host interface using the software interface and to communicate with the second device to provide the frontend driver with access to the second device.

Abstract: Provided are systems and methods for generating transactions with a configurable port. In some implementations, a peripheral device is provided. The peripheral device comprises a configurable port. In some implementations, the configurable port may be configured to receive a first transaction. In these implementations, the first transactions may include an address. The address may include a transaction attribute. In some implementations, the configurable port may extract the transaction attribute and a transaction address from the address. The configurable port may further generate a second transaction that includes the transaction attribute and the transaction address. The configurable port may also transmit the second transaction.

Abstract: Disclosed herein are techniques for classifying input network packets evenly into a plurality of classes. An apparatus includes an input port configured to receive a plurality of network packets. The apparatus also includes processing logic configured to receive the plurality of network packets from the input port and classify each packet of the plurality of network packets. For each packet, whether a condition is met is determined, a most recently used hash operation is selected when the condition is not met or a new hash operation is selected when the condition is met; and the selected hash operation is performed on the packet using at least a portion of the packet as an input value to classify the packet. The most recently used hash operation and the new hash operation are configured to classify packets having the same input value into different classes.

Abstract: An interrupt request generating process can include determining a first interrupt triggering event has occurred after a predetermined period of time in which no interrupt triggering event occurred. In response to determining that the first interrupt triggering event has occurred, the interrupt request generating process may generate a first interrupt request without adding an intentional delay, and initiating a timer configured to expire after a predetermined time interval. When a second interrupt triggering event is determined to have occurred before the timer expires, a second interrupt request is delayed from being generated until the timer expires.

Abstract: A hardware cipher module to cipher a packet. The cipher module includes a key scheduling engine and a ciphering engine. The key scheduling engine is configured to receive a compact key and iteratively generate a set of round keys, including a first round key, based on the compact key and determine, based upon a cipher mode indication and a type of ciphering whether to generate a key-scheduling-done indication after the first round key is generated and before all of the set of round keys are generated or to generate the key-scheduling-done indication after all of the set of round keys is generated. The ciphering engine is configured to begin to cipher the packet with one of the set of round keys as a result of receiving the key schedule done indication.

Abstract: Disclosed herein are techniques for preventing or minimizing completion timeout errors on a computer device. An apparatus includes a processing logic circuit configured to perform transactions requested by a requester device, and a timeout prevention logic coupled to the processing logic circuit. The timeout prevention logic includes a timeout logic and a moderation logic. The timeout logic is configured to, when the processing logic circuit fails to complete a particular transaction requested by the requester device within a reconfigurable time period, generate a timeout event and complete the particular requested transaction. The moderation logic is configured to determine a number of timeout events generated by the timeout logic during a monitoring time period, and set the reconfigurable time period based on the number of timeout events generated by the timeout logic during the monitoring time period.

Abstract: Technologies are provided for dynamically changing a size of a cache region of a storage device. A storage device controller writes data to the cache region of the storage device using a particular storage format. The storage device controller then migrates the cached data to a storage region of the device, where the data is written using a different storage format. A dynamic cache manager monitors input and output activity for the storage device and dynamically adjusts a size of the cache region to adapt to changes in the input and/or output activity. The dynamic cache manager can also adjust a size of the storage region. The storage device controller can automatically detect that the storage device has dynamic cache support and configure the storage device by creating the cache region and the storage region on the device.

Abstract: A technique for remote direct memory access (RDMA) may include receiving a packet that was sent over a network, and determining the packet has metadata indicative of acceleration. The technique may also include selecting a queue having minimal storage stages to process the packet, and writing the data of the packet to an application memory using the datapath associated with the queue. Amended metadata can be generated to indicate that the data has been written to the application memory, and the amended metadata can be stored in a software accessible buffer.

Abstract: Disclosed are techniques regarding aspects of implementing client configurable logic within a computer system. The computer system can be a cloud infrastructure. The techniques can include providing an identifier in response to configuring client configurable logic within the computer system.

Abstract: Apparatus, methods, and computer-readable storage media are disclosed for core-to-core communication between physical and/or virtual processor cores. In some examples of the disclosed technology, application cores write notification data (e.g., to doorbell or PCI configuration memory space accesses via a memory interface), without synchronizing with the other application cores or the service cores. In one examples of the disclosed technology, a message selection circuit is configured to, serialize data from the plurality of user cores by: receiving data from a user core, selecting one of the service cores to send the data based on a memory location addressed by the sending user core, and sending the received data to a respective message buffer dedicated to the selected service core.

Abstract: Implementations detailed herein include description of a computer-implemented method.

Abstract: Implementations detailed herein include description of a computer-implemented method.

Abstract: Implementations detailed herein include description of a computer-implemented method. In an implementation, the method at least includes receiving an application instance configuration, an application of the application instance to utilize a portion of an attached accelerator during execution of a machine learning model and the application instance configuration including: an indication of the central processing unit (CPU) capability to be used, an arithmetic precision of the machine learning model to be used, an indication of the accelerator capability to be used, a storage location of the application, and an indication of an amount of random access memory to use.

Abstract: Implementations detailed herein include description of a computer-implemented method.

Abstract: Techniques for emulating a configuration space by a peripheral device may include receiving a configuration access request, determining that the configuration access request is for a configuration space other than a native configuration space of the peripheral device, and retrieving an emulated configuration from an emulated configuration space. The configuration access request can then be serviced by using the emulated configuration.