Patents by Inventor Nagarajan Rajagopalan
Nagarajan Rajagopalan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110136327Abstract: Methods of forming high-current density vertical p-i-n diodes on a substrate are described. The methods include the steps of concurrently combining a group-IV-element-containing precursor with a sequential exposure to an n-type dopant precursor and a p-type dopant precursor in either order. An intrinsic layer is deposited between the n-type and p-type layers by reducing or eliminating the flow of the dopant precursors while flowing the group-IV-element-containing precursor. The substrate may reside in the same processing chamber during the deposition of each of the n-type layer, intrinsic layer and p-type layer and the substrate is not exposed to atmosphere between the depositions of adjacent layers.Type: ApplicationFiled: June 25, 2010Publication date: June 9, 2011Applicant: Applied Materials, Inc.Inventors: Xinhai Han, Nagarajan Rajagopalan, Ji Ae Park, Bencherki Mebarki, Heung Lak Park, Bok Hoen Kim
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Patent number: 7947611Abstract: A method for depositing a low dielectric constant film by flowing a oxidizing gas into a processing chamber, flowing an organosilicon compound from a bulk storage container through a digital liquid flow meter at an organosilicon flow rate to a vaporization injection valve, vaporizing the organosilicon compound and flowing the organosilicon compound and a carrier gas into the processing chamber, maintaining the organosilicon flow rate to deposit an initiation layer, flowing a porogen compound from a bulk storage container through a digital liquid flow meter at a porogen flow rate to a vaporization injection valve, vaporizing the porogen compound and flowing the porogen compound and a carrier gas into the processing chamber, increasing the organosilicon flow rate and the porogen flow rate while depositing a transition layer, and maintaining a second organosilicon flow rate and a second porogen flow rate to deposit a porogen containing organosilicate dielectric layer.Type: GrantFiled: July 9, 2008Date of Patent: May 24, 2011Assignee: Applied Materials, Inc.Inventors: Dustin W. Ho, Juan Carlos Rocha-Alvarez, Alexandros T. Demos, Kelvin Chan, Nagarajan Rajagopalan, Visweswaren Sivaramakrishnan
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Patent number: 7723228Abstract: Unwanted hillocks arising in copper layers due to formation of overlying barrier layers may be significantly reduced by optimizing various process parameters, alone or in combination. A first set of process parameters may be controlled to pre-condition the processing chamber in which the barrier layer is deposited. A second set of process parameters may be controlled to minimize energy to which a copper layer is exposed during removal of CuO prior to barrier deposition. A third set of process parameters may be controlled to minimize the thermal budget after removal of the copper oxide.Type: GrantFiled: May 20, 2003Date of Patent: May 25, 2010Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Meiyee Shek, Kegang Huang, Bok Hoen Kim, Hichem M'saad, Thomas Nowak
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Publication number: 20100087062Abstract: A method and apparatus for depositing organosilicate dielectric layers having good adhesion properties and low dielectric constant. Embodiments are described in which layers are deposited at low temperature and at high temperature. The low temperature layers are generally post-treated, whereas the high temperature layers need no post treating. Adhesion of the layers is promoted by use of an initiation layer.Type: ApplicationFiled: October 6, 2008Publication date: April 8, 2010Applicant: APPLIED MATERIALS, INC.Inventors: Annamalai Lakshmanan, Dante Manalo, Nagarajan Rajagopalan, Francimar C. Schmitt, Bok Hoen Kim
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Publication number: 20090011148Abstract: Adhesion between a copper metallization layer and a dielectric barrier film may be promoted by stabilizing a flow of a silicon-containing precursor in a divert line leading to the chamber exhaust. The stabilized gas flow is then introduced to the processing chamber to precisely form a silicide layer over the copper. This silicidation step creates a network of strong Cu—Si bonds that prevent delamination of the barrier layer, while not substantially altering the sheet resistance and other electrical properties of the resulting metallization structure.Type: ApplicationFiled: June 17, 2008Publication date: January 8, 2009Applicant: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Bok Heon Kim, Lester A. D'Cruz, Zhenjiang Cui, Girish A. Dixit, Visweswaren Sivaramakrishnan, Hichem M'Saad, Meiyee Shek, Li-Qun Xia
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Publication number: 20080280457Abstract: A method for depositing a low dielectric constant film by flowing a oxidizing gas into a processing chamber, flowing an organosilicon compound from a bulk storage container through a digital liquid flow meter at an organosilicon flow rate to a vaporization injection valve, vaporizing the organosilicon compound and flowing the organosilicon compound and a carrier gas into the processing chamber, maintaining the organosilicon flow rate to deposit an initiation layer, flowing a porogen compound from a bulk storage container through a digital liquid flow meter at a porogen flow rate to a vaporization injection valve, vaporizing the porogen compound and flowing the porogen compound and a carrier gas into the processing chamber, increasing the organosilicon flow rate and the porogen flow rate while depositing a transition layer, and maintaining a second organosilicon flow rate and a second porogen flow rate to deposit a porogen containing organosilicate dielectric layer.Type: ApplicationFiled: July 9, 2008Publication date: November 13, 2008Inventors: Dustin W. Ho, Juan Carlos Rocha-Alvarez, Alexandros T. Demos, Kelvin Chan, Nagarajan Rajagopalan, Visweswaren Sivaramakrishnan
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Patent number: 7410916Abstract: A method for depositing a low dielectric constant film by flowing a oxidizing gas into a processing chamber, flowing an organosilicon compound from a bulk storage container through a digital liquid flow meter at an organosilicon flow rate to a vaporization injection valve, vaporizing the organosilicon compound and flowing the organosilicon compound and a carrier gas into the processing chamber, maintaining the organosilicon flow rate to deposit an initiation layer, flowing a porogen compound from a bulk storage container through a digital liquid flow meter at a porogen flow rate to a vaporization injection valve, vaporizing the porogen compound and flowing the porogen compound and a carrier gas into the processing chamber, increasing the organosilicon flow rate and the porogen flow rate while depositing a transition layer, and maintaining a second organosilicon flow rate and a second porogen flow rate to deposit a porogen containing organosilicate dielectric layer.Type: GrantFiled: November 21, 2006Date of Patent: August 12, 2008Assignee: Applied Materials, Inc.Inventors: Dustin W. Ho, Juan Carlos Rocha-Alvarez, Alexandros T. Demos, Kelvin Chan, Nagarajan Rajagopalan, Visweswaren Sivaramakrishnan
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Publication number: 20080119058Abstract: A method for depositing a low dielectric constant film by flowing a oxidizing gas into a processing chamber, flowing an organosilicon compound from a bulk storage container through a digital liquid flow meter at an organosilicon flow rate to a vaporization injection valve, vaporizing the organosilicon compound and flowing the organosilicon compound and a carrier gas into the processing chamber, maintaining the organosilicon flow rate to deposit an initiation layer, flowing a porogen compound from a bulk storage container through a digital liquid flow meter at a porogen flow rate to a vaporization injection valve, vaporizing the porogen compound and flowing the porogen compound and a carrier gas into the processing chamber, increasing the organosilicon flow rate and the porogen flow rate while depositing a transition layer, and maintaining a second organosilicon flow rate and a second porogen flow rate to deposit a porogen containing organosilicate dielectric layer.Type: ApplicationFiled: November 21, 2006Publication date: May 22, 2008Inventors: DUSTIN W. HO, Juan Carlos Rocha-Alvarez, Alexandros T. Demos, Kelvin Chan, Nagarajan Rajagopalan, Visweswaren Sivaramakrishnan
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Patent number: 7371427Abstract: Unwanted hillocks arising in copper layers due to formation of overlying barrier layers may be significantly reduced by optimizing various process parameters, alone or in combination. A first set of process parameters may be controlled to pre-condition the processing chamber in which the barrier layer is deposited. A second set of process parameters may be controlled to minimize energy to which a copper layer is exposed during removal of CuO prior to barrier deposition. A third set of process parameters may be controlled to minimize the thermal budget after removal of the copper oxide.Type: GrantFiled: May 20, 2003Date of Patent: May 13, 2008Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Meiyee Shek, Kegang Huang, Bok Hoen Kim, Hichem M'saad, Thomas Nowak
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Publication number: 20080075888Abstract: Unwanted hillocks arising in copper layers due to formation of overlying barrier layers may be significantly reduced by optimizing various process parameters, alone or in combination. A first set of process parameters may be controlled to pre-condition the processing chamber in which the barrier layer is deposited. A second set of process parameters may be controlled to minimize energy to which a copper layer is exposed during removal of CuO prior to barrier deposition. A third set of process parameters may be controlled to minimize the thermal budget after removal of the copper oxide.Type: ApplicationFiled: October 22, 2007Publication date: March 27, 2008Applicant: APPLIED MATERIALS, INC.Inventors: Nagarajan Rajagopalan, Meiyee Shek, Kegang Huang, Bok Heon Kim, Hichem M'saad, Thomas Nowak
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Patent number: 7297376Abstract: A method for depositing a low dielectric constant film is provided by positioning a substrate within a processing chamber having a powered electrode, and flowing into the processing chamber an initiation gas mixture of a flow rate of one or more organosilicon compounds and a flow rate of one or more oxidizing gases to deposit an initiation layer by applying an RF power to the electrode. The organosilicon compound flow rate is then ramped-up to a final flow rate to deposit a first transition layer, upon which one or more porogen compounds is introduced and the flow rate porogen compound is ramped up to a final deposition rate while depositing a second transition layer. A porogen doped silicon oxide layer is then deposited by flowing the final porogen and organosilicon flow rates until the RF power is turned off.Type: GrantFiled: July 7, 2006Date of Patent: November 20, 2007Assignee: Applied Materials, Inc.Inventors: Kang Sub Yim, Kelvin Chan, Nagarajan Rajagopalan, Josephine Ju-Hwei Chang Liu, Sang H. Ahn, Yi Zheng, Sang In Yi, Vu Ngoc Tran Nguyen, Alexandros T. Demos
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Patent number: 7229911Abstract: Methods are provided for processing a substrate for depositing an adhesion layer between a conductive material and a dielectric layer. In one aspect, the invention provides a method for processing a substrate including positioning a substrate having a conductive material disposed thereon, introducing a reducing compound or a silicon based compound, exposing the conductive material to the reducing compound or the silicon based compound, and depositing a silicon carbide layer without breaking vacuum.Type: GrantFiled: August 30, 2004Date of Patent: June 12, 2007Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Meiyee Shek, Albert Lee, Annamalai Lakshmanan, Li-Qun Xia, Zhenjiang Cui
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Publication number: 20060093756Abstract: A method for seasoning a deposition chamber wherein the chamber components and walls are densely coated with a material that does not contain carbon prior to deposition of an organo-silicon material on a substrate. An optional carbon-containing layer may be deposited therebetween. A chamber cleaning method using low energy plasma and low pressure to remove residue from internal chamber surfaces is provided and may be combined with the seasoning process.Type: ApplicationFiled: November 3, 2004Publication date: May 4, 2006Inventors: Nagarajan Rajagopalan, Li-Qun Xia, Mihaela Balseanu, Thomas Nowak, Ranjana Shah, Huiwen Xu, Chad Peterson, Derek Witty, Hichem M'Saad
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Publication number: 20060046479Abstract: Methods are provided for processing a substrate for depositing an adhesion layer between a conductive material and a dielectric layer. In one aspect, the invention provides a method for processing a substrate including positioning a substrate having a conductive material disposed thereon, introducing a reducing compound or a silicon based compound, exposing the conductive material to the reducing compound or the silicon based compound, and depositing a silicon carbide layer without breaking vacuum.Type: ApplicationFiled: August 30, 2004Publication date: March 2, 2006Inventors: Nagarajan Rajagopalan, Meiyee Shek, Albert Lee, Annamalai Lakshmanan, Li-Qun Xia, Zhenjiang Cui
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Publication number: 20050233555Abstract: Methods are provided for processing a substrate for depositing an adhesion layer between a conductive material and a dielectric layer. In one aspect, the invention provides a method for processing a substrate including positioning a substrate having a conductive material disposed thereon, introducing a reducing compound or a silicon based compound, exposing the conductive material to the reducing compound or the silicon based compound, and depositing a silicon carbide layer without breaking vacuum.Type: ApplicationFiled: April 19, 2004Publication date: October 20, 2005Inventors: Nagarajan Rajagopalan, Meiyee Shek, Albert Lee, Annamalai Lakshmanan, Li-Qun Xia, Zhenjiang Cui
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Publication number: 20050186339Abstract: Adhesion between a copper metallization layer and a dielectric barrier film may be promoted by stabilizing a flow of a silicon-containing precursor in a divert line leading to the chamber exhaust. The stabilized gas flow is then introduced to the processing chamber to precisely form a silicide layer over the copper. This silicidation step creates a network of strong Cu—Si bonds that prevent delamination of the barrier layer, while not substantially altering the sheet resistance and other electrical properties of the resulting metallization structure.Type: ApplicationFiled: February 20, 2004Publication date: August 25, 2005Applicant: APPLIED MATERIALS, INC., A Delaware corporationInventors: Nagarajan Rajagopalan, Bok Kim, Lester D'Cruz, Zhenjiang Cui, Girish Dixit, Visweswaren Sivaramakrishnan, Hichem M'Saad, Meiyee Shek, Li-Qun Xia
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Publication number: 20040231795Abstract: Unwanted hillocks arising in copper layers due to formation of overlying barrier layers may be significantly reduced by optimizing various process parameters, alone or in combination. A first set of process parameters may be controlled to pre-condition the processing chamber in which the barrier layer is deposited. A second set of process parameters may be controlled to minimize energy to which a copper layer is exposed during removal of CuO prior to barrier deposition. A third set of process parameters may be controlled to minimize the thermal budget after removal of the copper oxide.Type: ApplicationFiled: May 20, 2003Publication date: November 25, 2004Applicant: Applied Materials, IncInventors: Nagarajan Rajagopalan, Meiyee Shek, Kegang Huang, Bok Hoen Kim, Hichem M'saad, Thomas Nowak
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Publication number: 20040235292Abstract: Unwanted hillocks arising in copper layers due to formation of overlying barrier layers may be significantly reduced by optimizing various process parameters, alone or in combination. A first set of process parameters may be controlled to pre-condition the processing chamber in which the barrier layer is deposited. A second set of process parameters may be controlled to minimize energy to which a copper layer is exposed during removal of CuO prior to barrier deposition. A third set of process parameters may be controlled to minimize the thermal budget after removal of the copper oxide.Type: ApplicationFiled: May 20, 2003Publication date: November 25, 2004Applicant: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Meiyee Shek, Kegang Huang, Bok Hoen Kim, Hichem M'Saad, Thomas Nowak
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Patent number: 6656840Abstract: A method for forming a microelectronics device is disclosed. In one embodiment, the method includes depositing a conductive structure on a substrate. A first layer comprising silicon and nitrogen is formed on the substrate. A second layer comprising silicon and nitrogen is then formed on the first layer. The nitrogen to silicon ratio in the first layer is greater than the nitrogen to silicon ratio in the second layer.Type: GrantFiled: April 29, 2002Date of Patent: December 2, 2003Assignee: Applied Materials Inc.Inventors: Nagarajan Rajagopalan, Joe Feng, Christopher S Ngai, Meiyee (Maggie Le) Shek, Suketu A Parikh, Linh H Thanh
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Publication number: 20030203614Abstract: A method for forming a microelectronics device is disclosed. In one embodiment, the method includes depositing a conductive structure on a substrate. A first layer comprising silicon and nitrogen is formed on the substrate. A second layer comprising silicon and nitrogen is then formed on the first layer. The nitrogen to silicon ratio in the first layer is greater than the nitrogen to silicon ratio in the second layer.Type: ApplicationFiled: April 29, 2002Publication date: October 30, 2003Applicant: APPLIED MATERIALS, INC.Inventors: Nagarajan Rajagopalan, Joe Feng, Christopher S. Ngai, Meiyee Shek, Suketu A. Parikh, Linh H. Thanh