Patents by Inventor Nai Hua Yeh
Nai Hua Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6642554Abstract: A memory module structure of the invention is used for being assembled on a locking device. The memory module includes a substrate and a plurality of memories. The substrate has certain long sides and short sides. Notches are formed on the short sides for being secured by the locking device. Each of the plurality of memories has a suitable length and width. Some memories of the plurality of memories are transversely mounted on the substrate with respect to the substrate. The other memories of the plurality of memories are longitudinally mounted on the substrate with respect to the substrate. According to this structure, it is possible to suitably arrange a plurality of memories on the substrate so as to increase the memory capacity of the memory module.Type: GrantFiled: November 21, 2001Date of Patent: November 4, 2003Assignee: Kingpak Technology, Inc.Inventors: Nai Hua Yeh, Chen Pin Peng, Chief Lin, C. S. Cheng, Kuang Yu Fan, Ren Long Kau, Fu Yung Huang, Yves Huang, Wu Hsiang Lee, Chih Hsien Chung, May Chen
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Patent number: 6642137Abstract: A package structure for an integrated circuit includes a substrate, an integrated circuit, an adhesive layer, a plurality of wirings, and a glue layer. The substrate has a first surface and a second surface. The first surface is formed with a plurality of signal input terminals. The second surface is formed with a plurality of signal output terminals for electrically connecting to the circuit board. The integrated circuit has a lower surface and an upper surface. Recesses are formed at two sides of the lower surface, and a plurality of bonding pads are formed on the upper surface. The adhesive layer is used for adhering the lower surface of the integrated circuit to the first surface of the substrate. The wirings are electrically connecting to the bonding pads of the integrated circuit and to the signal input terminals of the substrate. The glue layer is used for sealing the plurality of wirings and the integrated circuits.Type: GrantFiled: May 15, 2002Date of Patent: November 4, 2003Assignee: Kingpak Technology Inc.Inventors: Nai Hua Yeh, Chen Pin Peng, Jichen Wu
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Patent number: 6627983Abstract: A stacked package structure of an image sensor for electrically connecting to a printed circuit board includes a first substrate, a second substrate, an integrated circuit, an image sensing chip, and a transparent layer. The second substrate is mounted on the first substrate so as to a cavity formed between the first substrate and second substrate. The integrated circuit is located within the cavity and electrically connected the first substrate. The image-sensing chip is arranged on the second substrate. The transparent layer covers over the image sensing chip, wherein the image sensing chip receives image signals via the transparent layer and transforms the image signals into electrical signals transmitted to the first substrate. Thus, the image sensing chip of the image sensing product and the integrated circuit can be integrally package.Type: GrantFiled: January 24, 2001Date of Patent: September 30, 2003Inventors: Hsiu Wen Tu, Wen Chuan Chen, Mon Nan Ho, Li Huan Chen, Nai Hua Yeh, Yen Cheng Huang, Yung Sheng Chiu, Jichen Wu, Joe Liu, Wu Hsiang Lee
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Publication number: 20030116817Abstract: The image sensor structure of the invention is used for electrically connecting to a printed circuit board. The image sensor structure includes a substrate, a projecting layer, an image sensing chip, a plurality of wires, and a transparent layer. The substrate has a first surface and a second surface. The first surface is formed with signal output terminals for electrically connecting to the printed circuit board. The projecting layer has an upper surface and a lower surface. The lower surface is adhered to the second surface of the substrate to form a cavity with the substrate. The upper surface is formed with signal input terminals. The image sensing chip is placed within the cavity formed by the substrate and the projecting layer, and is adhered onto the second surface of the substrate. The plurality of wires each has a first terminal and a second terminal. The first terminals are electrically connected to the image sensing chip.Type: ApplicationFiled: December 20, 2001Publication date: June 26, 2003Inventors: Nai Hua Yeh, Chen Pin Peng, Jason Chuang, Hsiu Wen Tu, Kuang Yu Fan, Mon Nan Ho, Fu Yung Huang, Meng Ru Tsai, Allis Chen, Chih Hsien Chung, Chih Cheng Hsu, Yung Sheng Chiu
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Publication number: 20030116846Abstract: A stacked structure of a BGA (Ball Grid Array) integrated circuit package arranged on a printed circuit board includes a lower IC package body, an upper IC package body and glue. The lower IC package body has a first surface and a second surface opposite to the first surface. The first surface is formed with a plurality of first contacts for electrically connecting to the printed circuit board. The second surface is formed with a plurality of second contacts for electrically connecting to the upper IC package body. The upper IC package body is stacked above the lower IC package body and electrically connected to the second contacts on the second surface of the lower IC package body. The glue is provided between the lower IC package body and the upper IC package body for covering and protecting the plurality of second contacts.Type: ApplicationFiled: December 20, 2001Publication date: June 26, 2003Inventors: Nai Hua Yeh, Chen Pin Peng, Rong Fong Ding, Hsiu Wen Tu, Mon Nan Ho
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Publication number: 20030094628Abstract: A memory module structure of the invention is used for being assembled on a locking device. The memory module includes a substrate and a plurality of memories. The substrate has certain long sides and short sides. Notches are formed on the short sides for being secured by the locking device. Each of the plurality of memories has a suitable length and width. Some memories of the plurality of memories are transversely mounted on the substrate with respect to the substrate. The other memories of the plurality of memories are longitudinally mounted on the substrate with respect to the substrate. According to this structure, it is possible to suitably arrange a plurality of memories on the substrate so as to increase the memory capacity of the memory module.Type: ApplicationFiled: November 21, 2001Publication date: May 22, 2003Inventors: Nai Hua Yeh, Chen Pin Peng, Chief Lin, C.S. Cheng, Kuang Yu Fan, Ren Long Kau, Fu Yung Huang, Yves Huang, Wu Hsiang Lee, Chih Hsien Chung, May Chen
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Patent number: 6565008Abstract: A manufacturing method of a module card comprises steps of: providing a base board having a golden finger; mounting a chip on the base board for electrically connecting to the golden finger; and forming a packing layer on the chip for forming the module card. A module card comprises: a base board; a chip mounting on a surface of the base board; a golden finger on the board and electrically connecting to the chip; and a packing layer forming on the chip for covering the chip.Type: GrantFiled: December 4, 2001Date of Patent: May 20, 2003Assignee: Kingpak Technology Inc.Inventors: Mon Nan Ho, Hsiu Wen Tu, Kuo Feng Feng, Yung Sheng Chiu, Joe Liu, Nai Hua Yeh, Wen Chuan Chen, Allis Chen
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Patent number: 6559539Abstract: A stacked package structure of an image sensor used for electrically connecting to a printed circuit board includes a substrate, an image sensing chip, an integrated circuit, and a transparent layer. The substrate has a first surface and a second surface. The first surface is formed with signal input terminals. The second surface is formed with signal input terminals and signal output terminals for electrically connecting to the printed circuit board. The image sensing chip is mounted on the first surface of the substrate and is electrically to the signal input terminals of the substrate. The integrated circuit is arranged on the second surface of the substrate and is electrically connected to the signal input terminals of the substrate. The transparent layer covers over the image sensing chip, which can receive the image signals via the transparent layer and convert the image signals into electrical signals that are to be transmitted to the substrate.Type: GrantFiled: January 24, 2001Date of Patent: May 6, 2003Inventors: Hsiu Wen Tu, Wen Chuan Chen, Mon Nan Ho, Li Huan Chen, Nai Hua Yeh, Yen Cheng Huang, Yung Sheng Chiu, Jichen Wu
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Publication number: 20030071129Abstract: A manufacturing method of a module card comprises steps of: providing a base board having a golden finger; mounting a chip on the base board for electrically connecting to the golden finger; and forming a packing layer on the chip for forming the module card. A module card comprises: a base board; a chip mounting on a surface of the base board; a golden finger on the board and electrically connecting to the chip; and a packing layer forming on the chip for covering the chip.Type: ApplicationFiled: December 4, 2001Publication date: April 17, 2003Inventors: Mon Nan Ho, Hsiu Wen Tu, Kuo Feng Feng, Yung Sheng Chiu, Joe Liu, Nai Hua Yeh, Wen Chuan Chen, Allis Chen
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Patent number: 6501187Abstract: A semiconductor package structure having central leads according to the invention includes a substrate, a semiconductor device, a plurality of wires, and glue. A long slot penetrating through the substrate is formed in the substrate. A plurality of bonding pads formed on the semiconductor device are mounted on substrate. The plurality of bonding pads on the semiconductor device are exposed via the long slot of the substrate. The length of the semiconductor device is smaller than that of the long slot of the substrate so that a channel is formed at one side of the long slot when the semiconductor device is mounted on the substrate. The plurality of wires are arranged within the long slot of the substrate for electrically connecting the plurality of bonding pads on the semiconductor device to the plurality of signal output terminals on the substrate. The glue is provided for sealing the upper surface of the substrate to protect the semiconductor device.Type: GrantFiled: November 21, 2001Date of Patent: December 31, 2002Inventors: Nai Hua Yeh, Chen Pin Peng, Chief Lin, Ching-Shui Cheng, Allis Chen
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Patent number: 6472736Abstract: A stacked structure for memory chips includes a substrate, a lower memory chip, an upper memory chip, and an insulation medium. The substrate has an upper surface, a lower surface and a slot penetrating through the substrate from the upper surface to the lower surface. The lower memory chip has a central portion formed with a plurality of bonding pads. The lower memory chip is arranged on the upper surface of the substrate. The plurality of bonding pads is exposed via the slot of the substrate, and the bonding pads are electrically connected to the lower surface of the substrate via a plurality of wires. The upper memory chip has a central portion formed with a plurality of bonding pads. The upper memory chip is arranged on the lower memory chip in a back-to-back manner with respect to the lower memory chip so that the plurality of bonding pads of the upper memory chip faces upwards. The insulation medium has a central portion formed with a slot.Type: GrantFiled: March 13, 2002Date of Patent: October 29, 2002Assignee: Kingpak Technology Inc.Inventors: Nai Hua Yeh, Chen Pin Peng
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Publication number: 20020151102Abstract: A method for manufacturing films used in semiconductor package, comprising the steps of: providing a frame having an upper surface and a lower surface opposite to the upper surface, a through-hole being formed in the frame; mounting a first covering layer onto the lower surface of the frame in order to covering the through-hole; placing a film into the through-hole of the frame, the film being adhered onto the first covering layer; providing a second covering layer for covering the frame and packing the film, the film being located between the first covering layer and the second covering layer; and cutting the film into a plurality of films each having a predetermined size by a cutting tool. The films after being cut may be placed between the lower semiconductor chip and the upper semiconductor chip, so that the plurality of wirings and the lower semiconductor chip are free from being short-circuited, and the bad signal transmission can be avoided.Type: ApplicationFiled: April 16, 2001Publication date: October 17, 2002Inventors: Jichen Wu, Meng Ru Tsai, Nai Hua Yeh, Chen Pin Peng, C.F. Wang, Wen Tsan Lee
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Publication number: 20020130391Abstract: A package structure for an integrated circuit includes a substrate, an integrated circuit, an adhesive layer, a plurality of wirings, and a glue layer. The substrate has a first surface and a second surface. The first surface is formed with a plurality of signal input terminals. The second surface is formed with a plurality of signal output terminals for electrically connecting to the circuit board. The integrated circuit has a lower surface and an upper surface. Recesses are formed at two sides of the lower surface, and a plurality of bonding pads are formed on the upper surface. The adhesive layer is used for adhering the lower surface of the integrated circuit to the first surface of the substrate. The wirings are electrically connecting to the bonding pads of the integrated circuit and to the signal input terminals of the substrate. The glue layer is used for sealing the plurality of wirings and the integrated circuits.Type: ApplicationFiled: May 15, 2002Publication date: September 19, 2002Inventors: Nai Hua Yeh, Chen Pin Peng, Jichen Wu
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Publication number: 20020096761Abstract: A structure of stacked integrated circuits arranged on a circuit board includes a substrate, a lower integrated circuit, a plurality of wirings, a passivation layer, and an upper integrated circuit. The substrate has a first surface formed with signal input terminals, and a second surface formed with signal output terminals for electrically connecting to the circuit board. The lower integrated circuit has a first surface and a second surface. The first surface of the lower integrated circuit is adhered onto the first surface of the substrate. The second surface of the lower integrated circuit is formed with a plurality of bonding pads. The wirings each includes a first end and a second end opposite to the first end. The first ends of the wirings are electrically connected to the bonding pads of the lower integrated circuit, and the second ends of the wirings are electrically connected to the signal input terminals of the substrate, respectively.Type: ApplicationFiled: January 24, 2001Publication date: July 25, 2002Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, Fu Yung Huang, Chief Lin, C. S. Cheng
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Publication number: 20020096747Abstract: A package structure of an integrated circuit is used for electrically connecting to a printed circuit board includes a substrate, an integrated circuit, a plurality of wires, two molded resins. The substrate has a lower surface formed with signal input terminals and signal output terminals, which are to be connected to the signal input terminals. The signal output terminals are electrically connected to the printed circuit board. The integrated circuit has a lower surface for mounting the integrated circuit to the upper surface of the substrate. The two sides on the lower surface of the integrated circuit formed with a plurality of bonding pads. While the integrated circuit mounted to the substrate, the bonding pads are exposed to the outside. The plurality of wires are electrically connected the bonding pads to the substrate. Thus, the signals from the integrated circuit can be transmitted to the substrate.Type: ApplicationFiled: January 24, 2001Publication date: July 25, 2002Inventors: Nai Hua Yeh, Kuang Yu Fan, Mon Nan Ho, C. S. Cheng, C. H. Chen, Fu Yung Huang, Yung Sheng Chiu
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Publication number: 20020096762Abstract: A structure of stacked integrated circuits for mounting on a circuit board includes a substrate, a lower integrated circuit, a plurality of wirings, a plurality of metallic balls, and an upper integrated circuit. The substrate has a first surface formed with signal input terminals and a second surface formed with signal output terminals for electrically connecting to the circuit board. The lower integrated circuit has a first surface adhered to the first surface of the substrate and a second surface formed with a plurality of bonding pads. Each of the wirings has a first end and a second end away from the first end. The first ends are electrically connected to the bonding pads of the lower integrated circuit. The second ends are electrically connected to the signal input terminals on the first surface of the substrate. The plurality of metallic balls are formed on the second surface of the lower integrated circuit.Type: ApplicationFiled: January 24, 2001Publication date: July 25, 2002Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, Fu Yung Huang, Chief Lin, C. S. Cheng
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Publication number: 20020096751Abstract: An integrated circuit structure having an adhesive agent for adhering to a substrate includes a first surface and a second surface opposite to the first surface. The first surface is formed with a plurality of bonding pads for electrically connecting to the substrate and transmitting signals from the integrated circuit to the substrate. An adhesive agent, which is non-adhesive at the room temperature, is applied onto the second surface. The adhesive agent becomes adhesive under pressing/heating so as to adhere onto the substrate. According to the structure, the problems caused by the overflowed glue can be avoided, the manufacturing processes can be facilitated, and the yield can be improved.Type: ApplicationFiled: January 24, 2001Publication date: July 25, 2002Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Wu Hsiang Lee, Meng Ru Tsai, Hsiu Wen Tu, Jichen Wu
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Publication number: 20020096729Abstract: A stacked package structure of an image sensor for electrically connecting to a printed circuit board includes a substrate, an integrated circuit, an image sensing chip, and a transparent layer. The substrate has a first surface and a second surface opposite to the first surface. The first surface is formed with signal input terminals. The second surface is formed with signal output terminals for electrically connecting the substrate to the printed circuit board. The integrated circuit is mounted on the first surface of the substrate and electrically connected to the signal input terminals of the substrate. The image sensing chip is located above the integrated circuit to form a stacked structure with the integrated circuit for electrically connecting to the signal input terminals of the substrate. The transparent layer covers the image sensing chip.Type: ApplicationFiled: January 24, 2001Publication date: July 25, 2002Inventors: Hsiu Wen Tu, Wen Chuan Chen, Mon Nan Ho, Li Huan Chen, Nai Hua Yeh, Yen Cheng Huang, Yung Sheng Chiu, Wen Tsan Lee, Joe Liu, Wu Hsiang Lee, Meng Ru Tsai
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Publication number: 20020096766Abstract: A package structure for an integrated circuit includes a substrate, an integrated circuit, an adhesive layer, a plurality of wirings, and a glue layer. The substrate has a first surface and a second surface. The first surface is formed with a plurality of signal input terminals. The second surface is formed with a plurality of signal output terminals for electrically connecting to the circuit board. The integrated circuit has a lower surface and an upper surface. Recesses are formed at two sides of the lower surface, and a plurality of bonding pads are formed on the upper surface. The adhesive layer is used for adhering the lower surface of the integrated circuit to the first surface of the substrate. The wirings are electrically connecting to the bonding pads of the integrated circuit and to the signal input terminals of the substrate. The glue layer is used for sealing the plurality of wirings and the integrated circuits.Type: ApplicationFiled: January 24, 2001Publication date: July 25, 2002Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, C. F. Wang, Chen Pin Peng, Wen Tsan Lee, Jichen Wu
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Publication number: 20020096753Abstract: A stacked package structure of an image sensor for electrically connecting to a printed circuit board includes a first substrate, a second substrate, an integrated circuit, an image sensing chip, and a transparent layer. The second substrate is mounted on the first substrate so as to a cavity formed between the first substrate and second substrate. The integrated circuit is located within the cavity and electrically connected the first substrate. The image-sensing chip is arranged on the second substrate. The transparent layer covers over the image sensing chip, wherein the image sensing chip receives image signals via the transparent layer and transforms the image signals into electrical signals transmitted to the first substrate.Type: ApplicationFiled: January 24, 2001Publication date: July 25, 2002Inventors: Hsiu Wen Tu, Wen Chuan Chen, Mon Nan Ho, Li Huan Chen, Nai Hua Yeh, Yen Cheng Huang, Yung Sheng Chiu, Jichen Wu, Joe Liu, Wu Hsiang Lee