Abstract: A package structure for an integrated circuit includes a substrate, an integrated circuit, an adhesive layer, a plurality of wirings, and a glue layer. The substrate has a first surface and a second surface. The first surface is formed with a plurality of signal input terminals. The second surface is formed with a plurality of signal output terminals for electrically connecting to the circuit board. The integrated circuit has a lower surface and an upper surface. Recesses are formed at two sides of the lower surface, and a plurality of bonding pads are formed on the upper surface. The adhesive layer is used for adhering the lower surface of the integrated circuit to the first surface of the substrate. The wirings are electrically connecting to the bonding pads of the integrated circuit and to the signal input terminals of the substrate. The glue layer is used for sealing the plurality of wirings and the integrated circuits.

Abstract: An integrated circuit structure having an adhesive agent for adhering to a substrate includes a first surface and a second surface opposite to the first surface. The first surface is formed with a plurality of bonding pads for electrically connecting to the substrate and transmitting signals from the integrated circuit to the substrate. An adhesive agent, which is non-adhesive at the room temperature, is applied onto the second surface. The adhesive agent becomes adhesive under pressing/heating so as to adhere onto the substrate. According to the structure, the problems caused by the overflowed glue can be avoided, the manufacturing processes can be facilitated, and the yield can be improved.

Abstract: An stacked structure of semiconductor means and method for manufacturing the same, comprises a substrate, a lower semiconductor chip, an adhered glue layer, a plurality of wires and an upper semiconductor chip. The adhered glue layer located between the substrate and the lower semiconductor to adhere the lower semiconductor to the substrate. The overflow glue of the adhered glue layer covered above the periphery of the lower semiconductor chip. The plurality of wires each being electrically connected to the lower semiconductor chip and the substrate, so that each wires are located above the overflow glue. The upper semiconductor chip is located above lower semiconductor chip and electrically connected to the substrate.

Abstract: A stackable integrated circuit for electrically connecting to a circuit board and for a second integrated circuit body to be stacked on. The stackable integrated circuit includes an integrated circuit body, a plurality of first contacts, a projecting layer, and a plurality of second contacts. The integrated circuit body has a first surface and a second surface opposite to the first surface. The first contacts are formed on the first surface of the integrated circuit body for electrically connecting the integrated circuit body to the circuit board. The projecting layer is arranged on the second surface of the integrated circuit body. The second contacts are formed on the projecting layer for electrically connecting the integrated circuit body to a second integrated circuit body.