Patents by Inventor Naiqian Zhang

Naiqian Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160380062
    Abstract: A semiconductor device comprises: a substrate; a semiconductor layer formed on the substrate; a source electrode, a drain electrode and a gate electrode between the source electrode and the drain electrode formed on the semiconductor layer; and a source field plate formed on the semiconductor layer. The source field plate sequentially comprises: a start portion electrically connected to the source electrode; a first intermediate portion spaced apart from the semiconductor layer with air therebetween; a second intermediate portion disposed between the gate electrode and the drain electrode in a horizontal direction, without air between the second intermediate portion and the semiconductor layer; and an end portion spaced apart from the semiconductor layer with air therebetween.
    Type: Application
    Filed: February 17, 2016
    Publication date: December 29, 2016
    Inventors: Naiqian ZHANG, Feihang LIU, Xin JIN, Yi PEI, Xi SONG
  • Publication number: 20160118460
    Abstract: A semiconductor device comprises: a substrate; a multilayer semiconductor layer located on the substrate; a source located on the multilayer semiconductor layer, the source including a first source portion inside an active region and a second source portion inside a passive region; a drain located on the multilayer semiconductor layer, the drain including a first drain portion inside the active region and a second drain region inside the passive region; a gate located on the multilayer semiconductor layer, the gate including a first gate portion inside the active region and a second gate portion inside the passive region, and the first gate portion being in a form of interdigital among the first source portion and the first drain portion; and a heat dissipating layer disposed at one or more of the first source portion, the first drain portion, the first gate portion, the second source portion, the second drain portion and the second gate portion.
    Type: Application
    Filed: October 23, 2015
    Publication date: April 28, 2016
    Inventors: Yi PEI, Mengjie ZHOU, Naiqian ZHANG
  • Publication number: 20160043184
    Abstract: A semiconductor device is disclosed, comprising: a substrate; a semiconductor layer disposed on the substrate; a source electrode and a drain electrode disposed on the semiconductor layer, and a gate electrode disposed between the source electrode and the drain electrode; a dielectric layer disposed on at least a part of the surface of the semiconductor layer which is between the gate electrode and the drain electrode, the dielectric layer having at least a recess therein; and a source field plate disposed on the dielectric layer and at least partially covering the recess, the source field plate being electrically connected to the source electrode through at least a conductive path. A method of manufacturing such a semiconductor device is also disclosed.
    Type: Application
    Filed: February 9, 2015
    Publication date: February 11, 2016
    Applicant: Dynax Semiconductor, Inc.
    Inventors: Naiqian ZHANG, Fengli PEI
  • Publication number: 20150311332
    Abstract: A semiconductor device includes: a substrate having a rear side on which a grounded electrode is disposed; a semiconductor layer disposed on a front side of the substrate and including an active region and an inactive region; a plurality of source electrodes disposed in the active region; a drain electrode including a plurality of first portions disposed in the active region and a second portion disposed in the inactive region; a gate electrode including a plurality of first portions disposed in the active region and a second portion disposed in the inactive region; and a plurality of source electrode pads having the same number as the plurality of source electrodes and disposed in the inactive region and each being connected to a corresponding source electrode directly. A plurality of through holes electrically connecting the plurality of source electrodes and the grounded electrode respectively are disposed in the plurality of source electrode pads.
    Type: Application
    Filed: June 17, 2015
    Publication date: October 29, 2015
    Inventors: Naiqian ZHANG, Fengli PEI
  • Patent number: 8637905
    Abstract: The invention relates to a semiconductor device and a fabrication method thereof. A semiconductor device according to an aspect of the invention comprising: a semiconductor layer on a substrate; an isolation layer on the semiconductor layer; a source and a drain which are in contact with the semiconductor layer, each of the source and the drain comprises multiple fingers, and the multiple fingers of the source intersect the multiple fingers of the drain; and a gate on the isolation layer, the gate is located between the source and the drain and comprises a closed ring structure which encircles the multiple fingers of the source and the drain.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: January 28, 2014
    Assignee: Dynax Semiconductor, Inc.
    Inventor: Naiqian Zhang
  • Publication number: 20120280280
    Abstract: The invention relates to a semiconductor device and a fabrication method thereof. A semiconductor device according to an aspect of the invention comprising: a semiconductor layer on a substrate; an isolation layer on the semiconductor layer; a source and a drain which are in contact with the semiconductor layer, each of the source and the drain comprises multiple fingers, and the multiple fingers of the source intersect the multiple fingers of the drain; and a gate on the isolation layer, the gate is located between the source and the drain and comprises a closed ring structure which encircles the multiple fingers of the source and the drain.
    Type: Application
    Filed: August 18, 2010
    Publication date: November 8, 2012
    Inventor: Naiqian Zhang
  • Patent number: 8304811
    Abstract: A HEMT device and a manufacturing of the HEMT device, the HEMT device includes: a buffer layer (14) on the substrate (12); a semiconductor layer on the buffer layer (14); an isolation layer (16, 17) on the semiconductor layer; a source electrode (22) and a drain electrode (23) contacted with the semiconductor layer; and a gate electrode (24, 104 114) between the source electrode (22) and the drain electrode (23); wherein, a channel, which is located in the semiconductor layer below the gate electrode (24, 104, 114), is pinched off.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: November 6, 2012
    Assignee: Dynax Semiconductor, Inc.
    Inventor: Naiqian Zhang
  • Publication number: 20110089468
    Abstract: A HEMT device and a manufacturing of the HEMT device, the HEMT device includes: a buffer layer (14) on the substrate (12); a semiconductor layer on the buffer layer (14); an isolation layer (16, 17) on the semiconductor layer; a source electrode (22) and a drain electrode (23) contacted with the semiconductor layer; and a gate electrode (24, 104 114) between the source electrode (22) and the drain electrode (23); wherein, a channel, which is located in the semiconductor layer below the gate electrode (24, 104, 114), is pinched off.
    Type: Application
    Filed: March 4, 2009
    Publication date: April 21, 2011
    Inventor: Naiqian Zhang
  • Patent number: 7772682
    Abstract: The present invention provides a substantially hermetically sealed enclosure about an active device area of a semiconductor substrate. The enclosure is created by forming a guard ring around the active device area on the substrate, and forming a metal panel over and in contact with the guard ring to enclose the active device area. The guard ring is a laminate of metal rings formed from alternating metal filled via rings and metal trace rings. The guard ring is formed on an ohmic contact ring on the surface of the substrate. An annealing process may be used to hermetically seal the guard ring to the ohmic contact ring.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: August 10, 2010
    Assignee: RF Micro Devices, Inc.
    Inventors: Naiqian Zhang, John Cody Bailey, Dan Carey, Michael T. Fresina, J. Phillip Conlon