Patents by Inventor Nalin Kumar

Nalin Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5449970
    Abstract: A matrix-addressed diode flat panel display of field emission type is described, utilizing a diode (two terminal) pixel structure. The flat panel display includes a cathode assembly having a plurality of cathodes, each cathode including a layer of cathode conductive material and a layer of a low effective work-function material deposited over the cathode conductive material and an anode assembly having a plurality of anodes, each anode including a layer of anode conductive material and a layer of cathodoluminescent material deposited over the anode conductive material, the anode assembly located proximate the cathode assembly to thereby receive charged particle emissions from the cathode assembly, the cathodoluminescent material emitting light in response to the charged particle emissions.
    Type: Grant
    Filed: December 23, 1992
    Date of Patent: September 12, 1995
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Nalin Kumar, Chenggang Xie
  • Patent number: 5445550
    Abstract: Lateral luminescent field emitter devices for use in flat panel displays and a method of manufacturing are described. The device comprises a flat substrate, an anode disposed on the substrate, and a cathode disposed on the substrate, the cathode providing an electron emission surface capable of emitting electrons laterally across a gap to a major portion of an adjacent surface of the anode.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: August 29, 1995
    Inventors: Chenggang Xie, Nalin Kumar
  • Patent number: 5399238
    Abstract: A method of making sub-micron low work function field emission tips without using photolithography. The method includes physical vapor deposition of randomly located discrete nuclei to form a discontinuous etch mask. In one embodiment an etch is applied to low work function material covered by randomly located nuclei to form emission tips in the low work function material. In another embodiment an etch is applied to base material covered by randomly located nuclei to form tips in the base material which are then coated with low work function material to form emission tips. Diamond is the preferred low work function material.
    Type: Grant
    Filed: April 22, 1994
    Date of Patent: March 21, 1995
    Assignees: Microelectronics and Computer Technology Corporation, SI Diamond Technology, Inc.
    Inventor: Nalin Kumar
  • Patent number: 5382315
    Abstract: A method of forming an etch mask and patterning a substrate. The method includes directing a particle beam at a substrate without using a mask to deposit an etch mask on the substrate which selectively exposes predetermined portions of the substrate, the etch mask consisting of particles mechanically placed on the substrate by the particle beam, and then etching the exposed portions of the substrate through the etch mask to form channels therein. The process is well suited to fabricating high density copper/polyimide multi-chip modules.
    Type: Grant
    Filed: September 13, 1993
    Date of Patent: January 17, 1995
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5380546
    Abstract: A maskless process for forming a protected metal feature in a planar insulating layer of a substrate is disclosed. A first barrier material is disposed in a recess in an insulating layer, a conductive metal is disposed on the first barrier material such that the entire metal feature is positioned within the recess below the top of the recess, a second barrier material is disposed on the metal feature such that the second barrier material occupies the entire portion of the recess above the metal feature and extends above the top surface of the insulating layer, and the second barrier material is then polished until the top of the second barrier material is in and aligned with the top of the insulating layer. As a result, the metal feature is surrounded and protected by the first and second barrier materials, and the substrate is planarized.
    Type: Grant
    Filed: June 9, 1993
    Date of Patent: January 10, 1995
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Ajay Krishnan, Nalin Kumar
  • Patent number: 5341063
    Abstract: A field emitter comprising a conductive metal and a diamond emission tip with negative electron affinity in ohmic contact with and protruding above the metal. The field emitter is fabricated by coating a substrate with an insulating diamond film having negative electron affinity and a top surface with spikes and valleys, depositing a conductive metal on the diamond film, and applying an etch to expose the spikes without exposing the valleys, thereby forming diamond emission tips which protrude a height above the conductive metal less than the mean free path of electrons in the diamond film.
    Type: Grant
    Filed: November 24, 1992
    Date of Patent: August 23, 1994
    Assignee: Microelectronics And Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5331172
    Abstract: Ionized metal cluster beam deposition of metal bumps on substrates such as multi-chip modules and integrated circuit chips is enhanced. The present invention discloses wet etching techniques for removing unwanted metal deposited on the substrate around bumps, multiple sources for depositing alloyed (tin-lead) bumps with constant composition, and single or multiple sources for directing a cluster beam through an aperture to deposit metal on a substrate and directing an ion beam at the aperture to remove metal deposited therein.
    Type: Grant
    Filed: September 29, 1993
    Date of Patent: July 19, 1994
    Assignees: Microelectronics and Computer Technology Corporation, Hughes Aircraft Company
    Inventors: Nalin Kumar, Chenggang Xie, Rama R. Goruganthu, Mohammed K. Ghazi
  • Patent number: 5317006
    Abstract: An improved cathode for a sputtering system includes a metal cylinder and strips of material bonded to the inside of the metal cylinder and/or material sprayed onto the inside of the metal cylinder. The strips may have various specified compositions and/or configurations and/or other characteristics which enhance the ability of the sputtering system to deposit films of high temperature superconductor material on substrates.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: May 31, 1994
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5312514
    Abstract: Method of making a field emitter device with submicron low work function emission tips without using photolithography. The method includes depositing in situ by evaporating or sputtering a discontinuous etch mask comprising randomly located discrete nuclei. In one embodiment an ion etch is applied to a low work function material covered by a discontinuous mask to form valleys in the low work function material with pyramid shaped emission tips therebetween. In another embodiment an ion etch is applied to an electrically conductive base material covered by a discontinuous mask to form valleys in the base material with pyramid shaped base tips therebetween. The base material is then coated with a low work function material to form emission tips thereon.
    Type: Grant
    Filed: April 23, 1993
    Date of Patent: May 17, 1994
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5290732
    Abstract: Ionized metal cluster beam deposition of metal bumps on substrates such as multi-chip modules and integrated circuit chips is enhanced. The present invention discloses wet etching techniques for removing unwanted metal deposited on the substrate around bumps, and multiple sources for depositing alloyed (tin-lead) bumps with constant composition.
    Type: Grant
    Filed: June 9, 1992
    Date of Patent: March 1, 1994
    Assignees: Microelectronics And Computer Technology Corporation, Hughes Aircraft Company
    Inventors: Nalin Kumar, Chenggang Xie, Rama R. Goruganthu, Mohammed K. Ghazi
  • Patent number: 5254493
    Abstract: A process for fabricating integrated resistors in high density interconnect substrates for multi-chip modules. In addition, the resistor material can be converted selectively into an insulator for optionally allowing for the simultaneous fabrication of integrated resistors and capacitors in relatively few steps. The process is well suited for copper/polyimide substrates.
    Type: Grant
    Filed: February 24, 1992
    Date of Patent: October 19, 1993
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5244538
    Abstract: A method of patterning metal on a substrate without photolithography. The steps include providing a dielectric substrate, forming a metal mask in a predetermined pattern on the substrate without using a mask by direct-write deposition using a particle beam such as a liquid metal cluster force to form the mask, dry etching the substrate to form a plurality of channels therein, depositing a conductive metal into the channels, and removing the mask. The top of the substrate can then be planarized by polishing, or alternatively the dielectric between the metal lines can be etched. The invention is well suited for fabricating copper/polyimide substrates.
    Type: Grant
    Filed: July 26, 1991
    Date of Patent: September 14, 1993
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5229358
    Abstract: A superconducting wire which includes a base wire and at least a superconduction layer formed on the base wire. The superconduction layer may be formed by using a sputtering system for depositing a film of high temperature superconductor material on the base wire. The superconducting wire may further include an adhesion layer, a diffusion barrier layer and/or a protection layer. Several superconducting wires may be grouped together in a metal matrix to form a composite superconducting wire.
    Type: Grant
    Filed: December 3, 1990
    Date of Patent: July 20, 1993
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5227013
    Abstract: A method for forming via holes in a multilayer structure in a single step. The invention includes disposing over a base a first layer comprising first metal lines beneath a first dielectric, disposing over the first layer a second layer comprising second metal lines beneath a second dielectric such that a portion of each first metal line is not beneath any second metal line, and forming via holes which extend through the second dielectric to the second metal lines and through the second dielectric and the first dielectric to the portions of the first metal lines. Thereafter conductive metal can be deposited in the via holes. The method is particularly well suited for fabricating copper/polymer substrates.
    Type: Grant
    Filed: July 25, 1991
    Date of Patent: July 13, 1993
    Assignee: Microelectronics And Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5199918
    Abstract: A field emitter device comprising a conductive metal and a diamond emission tip with negative electron affinity in ohmic contact with and protruding above the metal. The device is fabricated by coating a substrate with an insulating diamond film having negative electron affinity and a top surface with spikes and valleys, depositing a conductive metal on the diamond film, and applying an etch to expose the spikes without exposing the valleys, thereby forming diamond emission tips which protrude a height above the conductive metal less than the mean free path of electrons in the diamond film.
    Type: Grant
    Filed: November 7, 1991
    Date of Patent: April 6, 1993
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5196102
    Abstract: A method of applying a compound of a metal and a reactive gas onto a surface by depositing a metal from a liquid metal cluster ion source onto said surface in the presence of a gas on the surface to combine with the deposited metal while isolating the gas from the source of the metal cluster ions.
    Type: Grant
    Filed: August 8, 1991
    Date of Patent: March 23, 1993
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5178743
    Abstract: A system for depositing a film on a substrate includes a sputtering system and means for causing the substrate to move through the sputtering system. Embodiments of the present invention employ a cylindrical hollow cathode magnetron sputtering system, which causes the overall film deposition system to be ideally suited for coating elongate cylindrical substrates such as wires and fibers and the like.
    Type: Grant
    Filed: January 30, 1991
    Date of Patent: January 12, 1993
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5164332
    Abstract: A diffusion barrier which reduces the diffusion of a copper feature into an oxygen containing polymer is provided by a copper metal alloy. The diffusion barrier is fabricated by coating a metal on a copper feature, heating the metal and copper feature to form an alloy of the copper feature and the metal, etching the non-alloyed metal which covers the alloy, and depositing an oxygen containing polymer on the alloy. Preferably the metal is aluminum and a copper aluminum alloy diffusion barrier is at least 300 angstroms thick and contains at least 8 percent aluminum on the surface in contact with the polymer.
    Type: Grant
    Filed: March 15, 1991
    Date of Patent: November 17, 1992
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar
  • Patent number: 5156997
    Abstract: A method of making bonding bumps on the pads of an electrical chip including depositing a layer of metallic adhesion material over the surface, depositing metallic bumps on the metallic adhesion material over each of the pad areas using a focused liquid metal ion source, and chemically etching the layer of metallic adhesion material off the surface outside of the deposited bumps.
    Type: Grant
    Filed: February 11, 1991
    Date of Patent: October 20, 1992
    Assignees: Microelectronics and Computer Technology Corporation, Hughes Aircraft Company
    Inventors: Nalin Kumar, Rama R. Goruganthu, Mohammed K. Ghazi
  • Patent number: 5120572
    Abstract: A process for fabricating integrated resistors in high density interconnect substrates for multi-chip modules. In addition, the resistor material can be connected selectively into an insulator for optionally allowing for the simultaneous fabrication of integrated resistors and capacitors in relatively few steps. The process is well suited for cooper/polyimide substrates.
    Type: Grant
    Filed: October 30, 1990
    Date of Patent: June 9, 1992
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Nalin Kumar