Abstract: Apparatus and methods for identifying a signal on a printed circuit board (‘PCB’) under test, including an integrated circuit mounted on the PCB, the integrated circuit having a test signal generator that transmits a test signal to an output pin of the integrated circuit, with the output pin connected to a test point on the PCB; the integrated circuit also having signal identification logic that inserts into the test signal, an identifier of the signal; a test probe in contact with the test point; and a signal-identifying controller that receives the test signal and the identifier from the test probe and displays, in dependence upon the identifier, the identity of the signal.

Abstract: A technique is provided to increase signal bandwidth of data processing signals by providing a plating stub as a filter using multiple line segments of different widths to filter the reflected high frequency components bouncing from the stub end toward the signal path. This stub-filter shifts the resonance point to a much higher frequency, placing that point of resonance beyond the bandwidth of interest without sacrificing a low frequency loss. Accordingly, there is provided an apparatus comprising a stub filter of a substrate, comprising a multi-segmented stub comprising a plurality of stub portions, where one of the stub portions has a different impedance than another of the stub portions.

Abstract: A printed circuit board is disclosed. The printed circuit board includes a first signal transmission layer, a via and a second signal transmission layer. The via connects the first signal transmission layer to the second signal transmission layer. The via includes a first region made of a first dielectric material having a first dielectric constant, and a second region made of a second dielectric material having a second dielectric constant lower than the first dielectric constant. The via allows AC Component of an electro-magnetic signal to be transmitted from the first signal transmission layer to the second signal transmission layer while blocking any DC component of the electromagnetic signal.

Abstract: An improved electrical connector for connecting bus lines to a card such as a memory card or media card, including a multi-level connector comprising a latching device having a plurality of insertable latch positions that advantageously allows for selectively connecting or isolating an electrical path to an adjoining connector. The connectors of unpopulated DIMM slots are disconnected from the network along with the traces that would normally form a stub with associated undesirable signal reflections that would otherwise disturb the signal transmitted to the receiving end if not properly terminated. The contacts of the edge connector itself are used as a means to selectively connect or disconnect adjacent/downstream cards in a serially cascaded architecture. The burden of the stubs due to unpopulated card slots and the need to place one card at the far end of the network are thus eliminated.

Abstract: A technique is provided to increase signal bandwidth of data processing signals by providing a plating stub as a filter using multiple line segments of different widths to filter the reflected high frequency components bouncing from the stub end toward the signal path. This stub-filter shifts the resonance point to a much higher frequency, placing that point of resonance beyond the bandwidth of interest without sacrificing a low frequency loss. Accordingly, there is provided an apparatus comprising a stub filter of a substrate, comprising a multi-segmented stub comprising a plurality of stub portions, where one of the stub portions has a different impedance than another of the stub portions.

Abstract: An improved electrical connector for connecting bus lines to a card such as a memory card or media card, including a multi-level connector comprising a latching device having a plurality of insertable latch positions that advantageously allows for selectively connecting or isolating an electrical path to an adjoining connector. The connectors of unpopulated DIMM slots are disconnected from the network along with the traces that would normally form a stub with associated undesirable signal reflections that would otherwise disturb the signal transmitted to the receiving end if not properly terminated. The contacts of the edge connector itself are used as a means to selectively connect or disconnect adjacent/downstream cards in a serially cascaded architecture. The burden of the stubs due to unpopulated card slots and the need to place one card at the far end of the network are thus eliminated.

Abstract: A digital memory system includes a memory controller having a driver configured for generating a digital signal. A memory module has a receiver in communication with the driver. The driver is configured for selectively directing the digital signal to the receiver of the memory module. A voltage control module is configured for determining a traffic intensity at which the digital signal is directed to the receiver and dynamically adjusting the reference voltage as a function of the traffic intensity at which the digital signal is directed to the receiver.

Abstract: A device and method are disclosed wherein a receiver signal line within an integrated circuit may be selected for probing. In one embodiment, a plurality of signal pads and a test pad are provided on an external surface of an integrated circuit chip. A plurality of signal lines extends through the integrated circuit chip to the signal pads. A multiplexer on the integrated circuit chip is configured for individually selecting any of the signal lines. An amplifier on the integrated circuit chip amplifies a selected signal and communicates the amplified signal to an externally-accessible test pad to be probed.

Abstract: Identifying a signal on a printed circuit board (‘PCB’) under test, including a test probe with a radio transmitter and transmitter antenna, the test probe positioned with the transmitter antenna at a test point on the PCB, the test probe transmitting a radio signal; at least two radio receivers, each receiver having a receiver antenna, each receiver antenna positioned at predetermined, separate physical locations with respect to the PCB, the receivers coupled to at least one signal strength meter, each receiver receiving the transmitted radio signal; and a signal-identifying controller connected to the signal strength meter, the signal-identifying controller reading, from the signal strength meter, signal strengths of the transmitted radio signal as received at the radio receivers; determining, in dependence upon the read signal strengths, a test signal identifier; and displaying the test signal identifier.

Abstract: A cable for high speed data communications that includes a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The inner conductors and the dielectric layers are disposed within the cable in parallel with a longitudinal axis of the cable. The cable also includes drain conductors disposed within the cable laterally to the inner conductors adjacent to the dielectric layers along the longitudinal axis of the cable and within thirty degrees of a horizontal axis through the inner conductors. The cable also includes a conductive shield composed of a strip of conductive shield material wrapped in a rotational direction along and about the longitudinal axis around the inner conductors, the dielectric layers, and the drain conductors.

Abstract: A circuit board includes layers, a pair of vias filled with a conductive material and extending through the layers, first and second pairs of conductive signal paths, and holes extending at least partially through the layers and located between the pair of vias. The first pair of conductive paths is connected to the pair of vias within a first layer; the second pair of conductive paths is connected to the pair of vias within a second layer. The pair of vias has a pair of via stubs defined between the second layer and a bottom layer. A differential signal is to be transmitted between the first and second pairs of conductive signal paths via the pair of vias. The holes have a lower dielectric constant than the layers to increase a resonant frequency of the pair of via stubs beyond the frequency of the differential signal.

Abstract: A circuit board includes layers, a pair of vias filled with a conductive material and extending through the layers, first and second pairs of conductive signal paths, and holes extending at least partially through the layers and located between the pair of vias. The first pair of conductive paths is connected to the pair of vias within a first layer; the second pair of conductive paths is connected to the pair of vias within a second layer. The pair of vias has a pair of via stubs defined between the second layer and a bottom layer. A differential signal is to be transmitted between the first and second pairs of conductive signal paths via the pair of vias. The holes have a lower dielectric constant than the layers to increase a resonant frequency of the pair of via stubs beyond the frequency of the differential signal.

Abstract: A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.

Abstract: A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.

Abstract: A method provides improved signal quality in a computer memory system. In one embodiment, a digital signal is generated having a voltage interpreted with respect to a reference voltage. The reference voltage is dynamically adjusted as a function of the traffic intensity at which the digital signal is directed to a particular receiver. A training phase may be performed for each DIMM of the memory system, to construct a lookup table correlating suitable reference voltages with different traffic intensities. The lookup table may be referenced during a subsequent execution phase, to dynamically select a reference voltage according to changing traffic intensity. The dynamically selected reference voltage value may be enforced by using transistors to selectively recruit resistors of a resistor network.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.

Abstract: A printed circuit board (‘PCB’) with reduced dielectric loss, including conductive traces disposed upon layers of dielectric material, the layers of dielectric material including core layers and prepreg layers, one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.

Abstract: A printed circuit board (‘PCB’) with reduced dielectric loss, including conductive traces disposed upon layers of dielectric material, the layers of dielectric material including core layers and prepreg layers, one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB.

Abstract: Measuring control signal timing for synchronous dynamic random access memory (‘SDRAM’), including combining into a trigger signal for an oscilloscope display control signals of an SDRAM under test, the control signals derived only from a single type of memory operations; and driving, continually during both READ and WRITE operations to and from the SDRAM under test, the oscilloscope display with a memory bus data signal (‘DQ’) and a memory bus clock signal (‘DQS’) from the SDRAM under test.