Abstract: A semiconductor package includes a package substrate, a plurality of semiconductor devices stacked on the package substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the package substrate and the plurality of semiconductor devices, and a molding resin at least partially surrounding the plurality of semiconductor devices and the plurality of underfill fillets. The plurality of underfill fillets include a plurality of protrusions that protrude from spaces between each of the plurality of semiconductor devices or between the package substrate and each of the plurality of semiconductor devices. At least two neighboring underfill fillet protrusions of the plurality of protrusions form one continuous structure without an interface therebetween.

Abstract: A display device comprises a display panel comprising an image display area and a non-display area, display pixels comprising light-emitting elements in the image display area and pixel driving units connected to the light-emitting elements, light-sensing pixels comprising photo-detecting units in a fingerprint sensing area in the image display area, and sense driving units connected to the photo-detecting units, a light-sensing reset driver configured to supply reset signals to the sense driving units of the light-sensing pixels for at least each horizontal line among the light-sensing pixels in response to a line select signal from a display driving circuit; and a fingerprint scan driver configured to sequentially supply a fingerprint scan signal to the sense driving units of the light-sensing pixels in response to a fingerprint scan control signal from the display driving circuit.

Abstract: Disclosed herein are an adhesive protective film, an optical member including the same, and an optical display including the same. An adhesive protective film is formed of a composition including a (meth)acrylic binder derived from a monomer mixture including: an alkyl group-containing (meth)acrylic monomer; and at least one selected from among a hydroxyl group-containing (meth)acrylic monomer, a carboxyl group-containing (meth)acrylic monomer, and a polysiloxane (meth)acrylate, the adhesive protective film having an initial peel strength of about 100 gf/inch or less and a peel strength decrease rate of about 50% or less, as calculated according to Equation 1.

Abstract: A deposition mask for manufacturing a display panel includes a metallic base having a thickness of about 50 micrometers to about 200 micrometers and a plurality of openings defined therein, wherein at least some of the openings include a first opening having a first width and a second opening having a second width smaller than the first width respectively defined along a thickness direction of the metallic base, and wherein the metallic base includes a first part in which the first opening is defined, and a second part in which the second opening is defined, the second part having a width that increases in a direction downward from a top surface of the metallic base along the thickness direction of the metallic base.

Abstract: Systems and methods for executing a simulation of a mold notching machine for secondary battery production by one or more processors to perform operations. The operations include executing an apparatus operating unit including a 3D mold notching machine related to secondary battery production, executing a facility operating unit including a plurality of adjustment parameters for determining an operation of the 3D mold notching machine, executing a quality checking unit including quality information related to quality of a material generated by the 3D mold notching machine, obtaining at least one of first user action information obtained through the apparatus operating unit or first user condition information obtained through the facility operating unit, determining operation of the 3D mold notching machine based on at least one of the first user action information or the first user condition information, and punching out electrodes based on the operation of the 3D mold notching machine.

Abstract: The present disclosure relates to a simulation apparatus for secondary battery production.

Abstract: Provided is a neural processing unit that performs application-work including a first neural network operation, the neural processing unit includes a first processing core configured to execute the first neural network operation, a hardware block reconfigurable as a hardware core configured to perform hardware block-work, and at least one processor configured to execute computer-readable instructions to distribute a part of the application-work as the hardware block-work to the hardware block based on a first workload of the first processing core.

Abstract: Provided is a neural processing unit that performs application-work including a first neural network operation, the neural processing unit includes a first processing core configured to execute the first neural network operation, a hardware block reconfigurable as a hardware core configured to perform hardware block-work, and at least one processor configured to execute computer-readable instructions to distribute a part of the application-work as the hardware block-work to the hardware block based on a first workload of the first processing core.

Abstract: Provided is a memory device that includes a memory bank including a plurality of memory cells arranged in a region where a plurality of word lines and a plurality of bit lines of the memory device intersect each other, a sense amplifier configured to amplify a signal transmitted through selected bit lines among the plurality of bit lines, and an arithmetic circuit configured to receive a first operand from the sense amplifier, receive a second operand from outside the memory device, and perform an arithmetic operation by using the first operand and the second operand, based on an internal arithmetic control signal generated in the memory device.

Abstract: An electronic component is disclosed. The electronic component includes: a capacitor body; first and second external electrodes on a mounting surface of the capacitor body; first and second connection terminals respectively connected to the first and second external electrodes; a first bonding portion between the first external electrode and the first connection terminal, and including a first-2-th region and a first-1-th region, the first-2-th region being adjacent to a center of the capacitor body and including a conductive resin, and the first-1-th region being adjacent to one end of the capacitor body and including a high melting point solder; and a second bonding portion between the second external electrode and the second connection terminal, and including a second-2-th region and a second-1-th region, the second-2-th region being adjacent to the center of the capacitor body and the second-1-th region being adjacent to the other end of the capacitor body.

Abstract: The present invention relates to a polypropylene composite resin light diffusion plate. The polypropylene composite resin light diffusion plate obtained by mixing hollow spheres made of an inorganic material with an eco-friendly, inexpensive, low specific gravity polypropylene composite resin can improve thermal expansion characteristic (area expansion rate) to a level equal to or superior to those of polycarbonate (PC) and polystyrene (PS), enhance optical characteristics (transmittance, shielding rate), and reduce manufacturing costs. The polypropylene composite resin light diffusion plate according to the present invention is manufactured in a flat plate shape by mixing a plurality of hollow spheres with a polymer resin containing a polypropylene (PP) resin and has an area expansion rate of 0.4-0.7% at 60° C., relative to an area at room temperature, due to mutual bonding of the polypropylene (PP) resin and the plurality of hollow spheres by covalent bonding therebetween.

Abstract: Provided is a memory device that includes a memory bank including a plurality of memory cells arranged in a region where a plurality of word lines and a plurality of bit lines of the memory device intersect each other, a sense amplifier configured to amplify a signal transmitted through selected bit lines among the plurality of bit lines, and an arithmetic circuit configured to receive a first operand from the sense amplifier, receive a second operand from outside the memory device, and perform an arithmetic operation by using the first operand and the second operand, based on an internal arithmetic control signal generated in the memory device.

Abstract: Provided is a neural processing unit that performs application-work including a first neural network operation, the neural processing unit includes a first processing core configured to execute the first neural network operation, a hardware block reconfigurable as a hardware core configured to perform hardware block-work, and at least one processor configured to execute computer-readable instructions to distribute a part of the application-work as the hardware block-work to the hardware block based on a first workload of the first processing core.

Abstract: A method of fabricating a semiconductor device is provided. The method includes forming semiconductor patterns on a semiconductor substrate, such that sides are surrounded by a lower interlayer insulating layer. A lower insulating layer is formed that covers the semiconductor patterns and the lower interlayer insulating layer. A contact structure is formed that penetrates the lower insulating layer and the lower interlayer insulating layer and is spaced apart from the semiconductor patterns. The contact structure has an upper surface higher than the semiconductor patterns. An upper insulating layer is formed covering the contact structure and the lower insulating layer. The upper and lower insulating layers form insulating patterns exposing the semiconductor patterns and covering the contact structure, and each of the insulating patterns includes a lower insulating pattern and an upper insulating pattern sequentially stacked.

Abstract: A multilayer ceramic capacitor includes: a ceramic body including a plurality of dielectric layers and a plurality of first and second internal electrodes stacked in a width direction; a pair of first external electrodes disposed on a mounting surface of the ceramic body to be spaced apart from one another and connected to the plurality of first internal electrodes; a second external electrode disposed between the pair of first external electrodes on the mounting surface of the ceramic body and connected to the plurality of second internal electrodes; and a dummy electrode disposed on a surface of the ceramic body opposing the mounting surface of the ceramic body.

Abstract: Disclosed herein are a printed circuit board having an embedded electronic device and a method of manufacturing the same. According to a preferred embodiment of the present invention, the printed circuit board having an embedded electronic device includes: a core substrate having circuit layers formed on both surfaces thereof; a taper-shaped cavity formed on the core substrate; and an electronic device embedded in the cavity.

Abstract: Disclosed herein are a system of measuring a warpage and a method of measuring a warpage. The system of measuring a warpage of a sample by analyzing an image photographed by the camera using light that is diffused from a light source and reflected on a surface of a sample and is arrived at the camera through a reference grating part, the system includes: an intake part that removes a fume generated from the sample. By this configuration, it is possible to measure the warpage while effectively removing the fume generated from the sample according to the increase in the temperature of the sample at the time of measuring the warpage, thereby improving the accuracy of the warpage measurement.

Abstract: The present invention relates to an optically transparent composite film for a display, comprising: a polymer substrate containing a transparent thermoplastic base resin; a plasma surface treatment layer formed on one surface of the polymer substrate and surface-modified through plasma treatment; an inorganic gas barrier layer formed on the upper surface of the plasma surface treatment layer; an organic-inorganic hybrid overcoating layer formed on the upper surface of the inorganic gas barrier layer and including a curable product of a curable sol solution; and an inorganic rear layer formed on the other surface of the polymer substrate.

Abstract: Disclosed herein is a method for manufacturing a semiconductor package. According to a preferred embodiment of the present invention, a method for manufacturing a semiconductor package includes: preparing a rectangular frame having a plurality of quadrangular holes; attaching a plurality of semiconductor chips and the frame on one surface of a tape; forming a molding part on the tape to cover the semiconductor chip and the frame; peeling the tape; forming a resin layer at a portion at which the tape is peeled; and forming a wiring on the resin layer to be connected to the semiconductor chip.

Abstract: A multilayer ceramic capacitor includes: a ceramic body including a plurality of dielectric layers and a plurality of first and second internal electrodes stacked in a width direction; a pair of first external electrodes disposed on a mounting surface of the ceramic body to be spaced apart from one another and connected to the plurality of first internal electrodes; a second external electrode disposed between the pair of first external electrodes on the mounting surface of the ceramic body and connected to the plurality of second internal electrodes; and a dummy electrode disposed on a surface of the ceramic body opposing the mounting surface of the ceramic body.