Abstract: Disclosed according to various embodiments is a thermoelectric material for colossal Seebeck coefficients comprising an Mg-poor Mg2Sn crystal and Secondary Sn phase.

Abstract: This disclosure relates to deep trench capacitors embedded in a package substrate on which an integrated circuit is mounted. In some aspects, a chip package includes an integrated circuit die that has a power distribution circuit for one or more circuits of the integrated circuit. The chip package also includes a substrate different from the integrated circuit and having a first surface on which the integrated circuit die is mounted and a second surface opposite the first surface. The substrate includes one or more cavities formed in at least one of the first surface or the second surface. The chip package also includes one or more deep trench capacitors disposed in at least one of the one or more cavities. Each deep trench capacitor is connected to the power distribution circuit by conductors.

Abstract: An impeller includes a hub, and a vain unit provided radially at a position spaced apart by a predetermined distance based on the hub. The vane unit is configured to begin at a position spaced apart by a predetermined radius based on the hub and to end to be formed into a streamlined shape in which a beginning portion becomes narrower in width than an end portion. The vane unit includes “n” first vanes radially configured at positions spaced apart by a radius r1 based on the hub and having a first length, where “n” is a natural number equal to or greater than 3; and “n” second vanes disposed between the first vanes, the second vanes having a second length that is less than the first length of the first vanes.

Abstract: This disclosure relates to deep trench capacitors embedded in a package substrate on which an integrated circuit is mounted. In some aspects, a chip package includes an integrated circuit die that has a power distribution circuit for one or more circuits of the integrated circuit. The chip package also includes a substrate different from the integrated circuit and having a first surface on which the integrated circuit die is mounted and a second surface opposite the first surface. The substrate includes one or more cavities formed in at least one of the first surface or the second surface. The chip package also includes one or more deep trench capacitors disposed in at least one of the one or more cavities. Each deep trench capacitor is connected to the power distribution circuit by conductors.

Abstract: A microelectronic package assembly is disclosed that implements a capacitor carrier capable of providing package warpage control and that eliminates the need to only bond chip capacitors directly to a surface of the package substrate. The capacitor carrier may be composed of a material that has a high coefficient of thermal expansion and a high Young's modulus. A capacitor carrier with these characteristics can eliminate the need for a traditional stiffener in the chip package.

Abstract: According to an aspect of the technology disclosed by the present application, the present invention relates to a pharmaceutical composition for preventing or treating a tumor, including a low-molecular kinase inhibitor which blocks the signaling pathway of transforming growth factor-? (TGF-?), in which, by administration of the low-molecular kinase that blocks the TGF-? signaling pathway, in combination with at least one of an immune checkpoint regulator and a receptor tyrosine kinase inhibitor, a tumor therapeutic or tumor growth inhibitory effect is excellent in a patient who needs tumor therapy or tumor growth inhibition, compared to when the low-molecular kinase inhibitor, immune checkpoint regulator, or receptor tyrosine kinase inhibitor is administered alone.

Abstract: Disclosed is an electronic device. The electronic device includes a processor configured to execute one or more instructions stored in a memory to: control a receiver to receive a speech signal; determine whether the received speech signal includes speech signals of a plurality of different speakers; when the received speech signal includes the speech signals of the plurality of different speakers, detect feature information from a speech signal of each speaker; determine relations between pieces of speech content of the plurality of different speakers, based on the detected feature information; determine a response method based on the determined relations between the pieces of speech content; and control the electronic device such that an operation of the electronic device is performed according to the determined response method.

Abstract: The present invention relates to a nanowire-based immunofluorescence kit for detecting a SARS coronavirus 2 antibody, and a use thereof, and more specifically, to a zinc oxide nanowire-based immunofluorescence kit for detecting a SARS coronavirus 2 antibody, and a use thereof, the kit comprising a step of growing nanowires on a substrate, introducing a functional group on the grown nanowires, and fixing a SARS coronavirus 2 antigen. The nanowire array of the present invention has enhanced detection sensitivity to enable more accurate diagnosis of whether or not a SARS coronavirus 2 antibody is produced.

Abstract: Proposed are copper sulfide nanoparticles having a core-shell structure included in a coating composition for blocking near-infrared light, and a method of manufacturing the same. More particularly, a method of manufacturing copper sulfide nanoparticles having a core-shell structure includes manufacturing CuS nanoparticles, manufacturing Cu2-xS nanoparticles by heating a mixed solution of the CuS nanoparticles, a reducing agent, and a solvent, and manufacturing Cu2-xS@Cu2-yO core-shell nanoparticles by heating a mixed solution of the Cu2-xS nanoparticles, an oxidizing agent, and a solvent.

Abstract: A method of controlling engine torque according to transmission hydraulic pressure is performed by an engine torque control system of a vehicle. The method includes connecting an engine torque converter to an engine and an automatic transmission of the vehicle, calculating a required turbine torque after confirming an engine torque control condition, deriving and storing a value of turbine torque factor learning through turbine torque factor learning according to shift type and shift time, converting the stored value of turbine torque factor learning into an engine torque control value, and requesting the engine torque control value to be applied to engine output, by an engine torque controller during shifting of the automatic transmission, so that a new turbine torque calculation is performed through a hydraulic pressure reference at the beginning of physical shifting, thereby preventing a shift shock and transmission damage caused by unreasonably excessive or insufficient engine torque.

Abstract: An integrated circuit package including a substrate configured to receive one or more high-bandwidth memory (HBM) stacks on the substrate, an interposer positioned on the substrate and configured to receive a logic die on the interposer, a plurality of interposer channels formed in the interposer and connecting the logic die to the one or more HBM stacks, and a plurality of substrate traces formed in the substrate and configured to interface the plurality of interposer channels to the one or more HBM stacks.

Abstract: Proposed are copper sulfide nanoparticles having a core-shell structure included in a coating composition for blocking near-infrared light, and a method of manufacturing the same. More particularly, a method of manufacturing copper sulfide nanoparticles having a core-shell structure includes manufacturing CuS nanoparticles, manufacturing Cu2-xS nanoparticles by heating a mixed solution of the CuS nanoparticles, a reducing agent, and a solvent, and manufacturing Cu2-xS@Cu2-yO core-shell nanoparticles by heating a mixed solution of the Cu2-xS nanoparticles, an oxidizing agent, and a solvent.

Abstract: The technology relates to an integrated circuit (IC) package. The IC package may include a substrate. An IC die may be mounted to the substrate. One or more photonic modules may be attached to the substrate and one or more serializer/deserializer (SerDes) interfaces may connect the IC die to the one or more photonic modules. The IC die may be an application specific integrated circuit (ASIC) die and the one or more photonic modules may include a photonic integrated circuit (PIC) and fiber array. The one or more photonic modules may be mounted to one or more additional substrates which may be attached to the substrate via one or more sockets.

Abstract: An integrated circuit package including a substrate configured to receive one or more high-bandwidth memory (HBM) stacks on the substrate, an interposer positioned on the substrate and configured to receive a logic die on the interposer, a plurality of interposer channels formed in the interposer and connecting the logic die to the one or more HBM stacks, and a plurality of substrate traces formed in the substrate and configured to interface the plurality of interposer channels to the one or more HBM stacks.

Abstract: A voltage regulator having a multiple of main stages and at least one accelerated voltage regulator (AVR) bridge is provided. The main stages may respond to low frequency current transients and provide DC output voltage regulation. The AVR bridges are switched much faster than the main stages and respond to high frequency current transients without regulating the DC output voltage. The AVR bridge frequency response range can overlap with the main stage frequency response range, and the lowest frequency to which the AVR bridges respond may be set lower than the highest frequency to which the main stages respond.

Abstract: A microelectronic system may include a microelectronic component having electrically conductive elements exposed at a first surface thereof, a socket mounted to a first surface of the microelectronic component and including a substrate embedded therein, one or more microelectronic elements each having active semiconductor devices therein and each having element contacts exposed at a front face thereof, and a plurality of socket pins mounted to and extending above the substrate, the socket pins being ground shielded coaxial socket pins. The one or more microelectronic elements may be disposed at least partially within a recess defined within the socket. The socket may have a land grid array comprising top surfaces of the plurality of the socket pins or electrically conductive pads mounted to corresponding ones of the socket pins, and the element contacts of the one or more microelectronic elements may be pressed into contact with the land grid array.

Abstract: Proposed are counter-based selective row hammer refresh apparatus and method for row hammer prevention and, more particularly, proposed are an apparatus and a method for reducing energy consumption of dynamic random access memory (DRAM) by improving counter-based algorithms for solving a row hammer problem when applying a refresh management (RFM) command that is a new command applied to the latest DRAM standards, such as DDR5, LPDDR5, and the like.

Abstract: Disclosed according to various embodiments is a thermoelectric material for colossal Seebeck coefficients comprising an Mg-poor Mg2Sn crystal and Secondary Sn phase.

Abstract: A method and system for controlling clutch friction elements of an automatic transmission is provided. The method includes retrieving information about shift clutches from a data storage unit and acquiring information required to predict a temperature of a friction element for each shift clutch, deriving a predicted temperature value of a friction element for each shift clutch by using the information about the shift clutches and the information required to predict the temperature of the friction element, predicting whether or not overheating occurs for each shift clutch by comparing the derived predicted temperature value of the friction element for each shift clutch with an allowable temperature set for each shift clutch, and determining a target shift stage while avoiding the overheating clutch with a predicted temperature value exceeding the allowable temperature, through switching to an avoidance shift mode.

Abstract: The present invention provides an apparatus for sensing rotor location, the apparatus comprising: a central shaft; a magnet coupled to the central shaft; a sensor portion is disposed correspond to the magnet; wherein the sensor portion comprising a substrate, a first group including a first Hall sensor and a third Hall sensor disposed on the substrate, and a second group including a second Hall sensor and a fourth Hall sensor, the first Hall sensor and the third Hall sensor are arranged to overlap in a radial direction about the central shaft and the second Hall sensor and the fourth Hall sensor are arranged to overlap in a radial direction about the central shaft.