Abstract: A semiconductor package includes a first substrate, a first conductive layer, a first surface mount device (SMD) and a first bonding wire. The first substrate has a first top surface. The first conductive layer is formed on the first top surface and has a first conductive element and a second conductive element separated from each other. The first SMD is mounted on the first top surface, overlapping with but electrically isolated from the first conductive element. The first bonding wire electrically connects the first SMD with the first conductive layer.

Abstract: A semiconductor package includes a die pad, a semiconductor die mounted on the die pad, a plurality of leads including a power lead disposed along a peripheral edge of the die pad, at least one connecting bar connecting the die pad, a power bar disposed on one side of the connecting bar, and a surface mount device (SMD) having a first terminal and a second terminal. The first terminal is electrically connected to the ground level through a first bond wire. The second terminal is electrically connected a power level through a second bond wire.

Abstract: A printed circuit board is disclosed. The printed circuit board comprises a substrate having a top surface and a bottom surface. A ground plane is on the bottom surface. A signal trace is on the top surface along a first direction. At least two isolated power planes are on the top surface adjacent to opposite sides of the signal trace, respectively. A conductive connection along a second direction couples to the two power planes, across the signal trace without electrically connecting to the signal trace, wherein the signal trace doesn't pass over any split of the ground plane.

Abstract: Techniques and implementations pertaining to improvements in power delivery for multi-core processors are described. A method may involve determining whether one or more processing units of a plurality of processing units are starting. The method may also involve increasing power provided to the plurality of processing units before the one or more processing units are started responsive to a determination that the one or more processing units are starting.

Abstract: A semiconductor package includes a die pad, wherein a semiconductor die is mounted on the die pad; a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad; at least one connecting bar connecting with the die pad; and a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead. A capacitor is mounted between the power bar and the connecting bar.

Abstract: A semiconductor package includes a substrate, a first conductive layer, a second conductive layer, a first surface mount device, a second surface mount device and a connection element. The first conductive layer is formed on the substrate and has a first pad and a second pad separated from the first pad. The second conductive layer is formed on the substrate and has a third pad and a fourth pad electrically connected with the third pad through the second conductive layer. The first surface mount device is mounted on the first pad and the third pad. The second surface mount device is mounted on the second pad and the fourth pad. The connection element electrically connects the first pad with the second pad.

Abstract: A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.

Abstract: A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.

Abstract: A semiconductor package includes a substrate, a first conductive layer, a second conductive layer, a first surface mount device, a second surface mount device and a connection element. The first conductive layer is formed on the substrate and has a first pad and a second pad separated from the first pad. The second conductive layer is formed on the substrate and has a third pad and a fourth pad electrically connected with the third pad through the second conductive layer. The first surface mount device is mounted on the first pad and the third pad. The second surface mount device is mounted on the second pad and the fourth pad. The connection element electrically connects the first pad with the second pad.

Abstract: A semiconductor package is provided. The semiconductor package includes a substrate, a first pad, a second, a first conductive element, a surface mount device, a first bonding wire and a molding compound layer. The first pad, the second pad, and the first conductive element are formed on the substrate. The surface mount device is mounted on the first pad and the second pad. The first bonding wire electrically connects the first conductive element and the first pad. The molding compound layer encapsulates the substrate, the first pad, the second pad, the first conductive element, the bonding wire and the surface mount device.

Abstract: A semiconductor package is provided. The semiconductor package includes a substrate, a first pad, a second, a first conductive element, a surface mount device, a first bonding wire and a molding compound layer. The first pad, the second pad, and the first conductive element are formed on the substrate. The surface mount device is mounted on the first pad and the second pad. The first bonding wire electrically connects the first conductive element and the first pad. The molding compound layer encapsulates the substrate, the first pad, the second pad, the first conductive element, the bonding wire and the surface mount device.

Abstract: A semiconductor package includes a die pad, wherein a semiconductor die is mounted on the die pad; a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad; at least one connecting bar connecting with the die pad; and a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead. A capacitor is mounted between the power bar and the connecting bar.

Abstract: A semiconductor package includes a die pad, at least one semiconductor die mounted on the die pad, a plurality of leads disposed along peripheral edges of the die pad, at least one connecting bar for supporting the die pad, a first power bar disposed on one side of the connecting bar, a second power bar disposed on the other side of the connecting bar, and a connection member traversing the connecting bar and electrically connecting the first power bar with the second power bar.

Abstract: A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.

Abstract: A semiconductor package includes a die pad; a semiconductor die mounted on the die pad; a plurality of leads disposed along peripheral edges of the die pad; a ground bar between the leads and the die pad; and a plurality of bridges connecting the ground bar with the die pad, wherein a gap between two adjacent bridges has a length that is equal to or less than 3 mm.

Abstract: A leadframe package includes a die pad with four unitary, outwardly extending slender bars; a plurality of leads arranged along periphery of the die pad; a separate pad segment separated from the die pad and isolated from the plurality of leads; a semiconductor die mounted on an upper side of the die pad, wherein the semiconductor die contains first bond pads wire-bonded to respective the plurality of leads and a second bond pad wire-bonded to the separate pad segment; and a molding compound encapsulating the semiconductor die, the upper side of the die pad, the first suspended pad segment and inner portions of the plurality of leads.

Abstract: A semiconductor chip package is provided. The semiconductor chip package includes a lead frame having a chip carrier. A semiconductor chip is mounted on the chip carrier, having a plurality of bonding pads thereon. A package substrate has a cavity therein to accommodate the chip carrier and the semiconductor chip, wherein at least one of the bonding pads of the semiconductor chip is electrically coupled to the package substrate.

Abstract: An electronic package is provided. The electronic package comprises a die pad having a die attached thereon. A plurality of leads surrounds the die pad and spaced therefrom to define a ring gap therebetween. At least one first common electrode bar is in the ring gap and substantially coplanar to the die pad, in which at least one of the plurality of leads extends to the first common electrode bar. A molding compound partially encapsulates the die pad and the first common electrode bar, such that the bottom surfaces of the die pad and the first common electrode bar are exposed. A length of the first common electrode bar is substantially equal to a predetermined distance between two pads among a plurality of power or ground pads on a side of the die facing the first common electrode bar. An electronic device with the electronic package is also disclosed.

Abstract: A printed circuit board (PCB) is disclosed. The PCB includes a substrate have a top surface and a bottom surface. A first conductive layer is disposed on the top surface of the substrate. The first conductive layer comprises a first signal net and a second signal net. An outermost insulating layer is disposed on the top surface of the substrate to cover the substrate and the first conductive layer. The outmost insulating layer comprises an opening to expose a portion of the second signal net. And, a second conductive layer is disposed on the outermost insulating layer and substantially covering at least a portion of the first signal net. The second conductive layer is filled into the opening to electrically connect to the second signal net which is able to provide one of a ground potential and a power potential.

Abstract: An electronic apparatus is provided. A PCB has first and second signal paths therein. First and second fingers are disposed on the first and second signal paths, respectively. A controller is coupled to a first memory via the first finger and a second memory via the second finger, and accesses the first and second memories through the first and second signal paths, respectively. The first and second signal paths share a common segment between the controller and a branch point. First and second components are disposed between the first finger and the branch point and between the second finger and the branch point, respectively. The distances between the first component and the branch point and between the second component and the branch point are smaller than or equal to the distance between the first component and the first finger and between the second component and the second finger, respectively.