Abstract: An immersion cooling device includes a housing defining a chamber, a working liquid received in the chamber, a condenser received in the chamber and located outside the working liquid, and at least one support plate received in the chamber. Each of the at least one support plate includes a first portion and a second portion connected to the first portion. The first portion is immersed in the working liquid and configured to hold an electronic device. The second portion protrudes from the working liquid. The second portion defines a slot extending through the second portion, and an opening of the slot faces the condenser.

Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.

Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.

Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.

Abstract: A rotor includes a rotor core that is made of electromagnetic steel sheets rotating around a central axis and laminated in an axial direction, and that has multiple flux barriers penetrating the electromagnetic steel sheets along the axial direction. At least some of the multiple flux barriers are provided with a first penetrating portion and a second penetrating portion arranged in the radial direction, the first penetrating portion housing a magnet and the second penetrating portion housing a conductive non-magnetic conductor.

Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, the 3D IC comprises a first IC die comprising a first substrate, a first interconnect structure disposed over the first substrate, and a first through substrate via (TSV) disposed through the first substrate. The 3D IC further comprises a second IC die comprising a second substrate, a second interconnect structure disposed over the second substrate, and a second TSV disposed through the second substrate. The 3D IC further comprises a bonding structure arranged between back sides of the first IC die and the second IC die opposite to corresponding interconnect structures and bonding the first IC die and the second IC die. The bonding structure comprises conductive features disposed between and electrically connecting the first TSV and the second TSV.

Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.

Abstract: A system includes a first printed circuit board (PCB), a temperature sensor, a switching circuit provided on the first PCB, and a controller. The temperature sensor is configured to measure temperature of at least an area of the first PCB. The controller is configured to trigger the switching circuit to turn off power to the first PCB, based at least in part on the temperature sensor detecting a temperature above a temperature threshold. The system is able to disrupt power much faster than conventional methods of power protection which may have a blind spot to certain areas of the first PCB, since these methods rely on power disruption when a maximum power is sensed.

Abstract: An optical system applied to an optical biometer is disclosed. The optical system includes a light source, first and second switchable reflectors, and first and second fixed reflectors. The first switchable reflector is disposed corresponding to the light source. The second switchable reflector is disposed corresponding to an eye. In a first mode, the first and second switchable reflectors are switched to a first state, and the incident light emitted by the light source is reflected by the first fixed reflector along a first optical path and then emitted to a first position of the eye. In a second mode, the first and second switchable reflectors are switched to a second state, and the incident light is sequentially reflected by the first switchable reflector, the second fixed reflector and the second switchable reflector along a second optical path and then emitted to a second position of the eye.

Abstract: A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, and a second encapsulant. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die.

Abstract: An IC device includes first and second circuits adjacent each other and over a substrate. The first circuit includes a first IO pattern along a first track among a plurality of tracks in a first metal layer, the plurality of tracks elongated along a first axis and spaced from each other along a second axis. The second circuit includes a plurality of conductive patterns along corresponding different tracks among the plurality of tracks in the first metal layer, each of the plurality of conductive patterns being an IO pattern of the second circuit or a floating conductive pattern. The first metal layer further includes a first connecting pattern along the first track and connecting the first IO pattern and a second IO pattern of the second circuit. The second IO pattern is one of the plurality of conductive patterns of the second circuit and is along the first track.

Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.

Abstract: An auxiliary staring and imaging focusing device includes an illumination system, an imaging system, a staring device and a focusing device. The illumination system has an illumination optical-path to project a detection light to illuminate a fundus of a subject's eye. The imaging system has an imaging optical-path for receiving a reflected light and a fundus image of subject and imaging the reflected light and fundus image on an image display. The staring device is located in the illumination optical-path and forms a staring surface provided with staring points contrast with a detection light for the subject to watch. The focusing device is provided with a split-image screen in the illumination optical-path. The split-image screen has a shutter with a default size, and two facing prisms are disposed on the shutter and a light-transmitting space is formed between two prisms for a center staring point to pass through.

Abstract: Methods of determining the risk of developing osteoarthritis (OA) and/or progression to total joint replacement (TJR) and determining the treatment response to an NGF antagonist or NSAID treatment in a subject by determination of an OA proteomic risk score for the subject are presented herein.

Abstract: A frame interpolation method generates an interpolated frame that is temporally between a first frame and a second frame. A first and a second interpolated frames are generated using motion vectors from a first motion estimator and a second motion estimator, respectively. A weighting map is generated based on indications from the first motion estimator. First pixel locations and second pixel locations in the weighting map are assigned weight values of 1 and 0, respectively. A weighted combination is calculated using the weighting map to produce the interpolated frame output, which includes the first pixel locations from the first interpolated frame and the second pixel locations from the second interpolated frame. The first and the second motion estimators may be an optical flow estimator and the game engine renderer, respectively. Alternatively, the first and the second motion estimators may be the game engine renderer and the optical flow estimator, respectively.

Abstract: In a method, cell placement is performed to place a plurality of cells into a region of an integrated circuit (IC). A thermal analysis is performed to determine whether the region of the IC is thermally stable at an operating condition. In response to a determination that the region of the IC is thermally unstable, at least one of a structure or the operating condition of the region of the IC is changed. After the thermal analysis, routing is performed to route a plurality of nets interconnecting the placed cells. At least one of the cell placement, the thermal analysis, the changing or the routing is executed by a processor.

Abstract: Disclosed is a light-emitting array structure having a substrate, a plurality of light-emitting pixel units, a plurality of first and second signal wires, and an encapsulating layer. The light-emitting pixel units are arranged in array on the substrate. Each light-emitting pixel unit includes a driving chip, a first flat layer, a first redistribution layer, a second flat layer, a second redistribution layer, and a light-emitting diode. Each first signal wire is electrically connected to a corresponding one of the first redistribution layers and extends in a first direction. The second signal wires extend in a level different from the first signal wires. Each second signal wire is electrically connected to a corresponding one of the second redistribution layers and extends in a second direction different from the first direction. The encapsulating layer covers the light-emitting pixel units, the first and second signal wires, and the substrate.

Abstract: A laminated composite component is provided in this disclosure. The laminated composite component comprises a foam material layer, a first laminated sheet group and a second laminated sheet group. The foam material layer has a first surface and a second surface opposite to each other. The first laminated sheet group is disposed on the first surface. The second laminated sheet group is disposed on the second surface. The first laminated sheet group includes a plurality of first sheets. The second laminated sheet group includes a plurality of second sheets. The foam material layer, the first sheets of the first laminated sheet group, and the second sheets of the second laminated sheet group are laminated and pressed to form in one piece.

Abstract: A method for manufacturing nitride catalyst is provided, which includes putting a Ru target and an M target into a nitrogen-containing atmosphere, in which M is Ni, Co, Fe, Mn, Cr, V, Ti, Cu, or Zn. The method also includes providing powers to the Ru target and the M target, respectively. The method also includes providing ions to bombard the Ru target and the M target for depositing MxRuyN2 on a substrate by sputtering, wherein 0<x<1.3, 0.7<y<2, and x+y=2, wherein MxRuyZ2 is cubic crystal system or amorphous.

Abstract: An antenna device is provided, which includes a first substrate, and a second substrate facing and spaced with the first substrate in a distance. At least one working element disposed between the first substrate and the second substrate, wherein the at least one working element is filled with a modulation material. At least one buffer element is connected with the at least one working element for adjusting the amount of the modulation material in the at least one working element.