Abstract: A method includes depositing an etch stop layer over a first conductive feature, performing a first treatment to amorphize the etch stop layer, depositing a dielectric layer over the etch stop layer, etching the dielectric layer to form an opening, etching-through the etch stop layer to extend the opening into the etch stop layer, and filling the opening with a conductive material to form a second conductive feature.

Abstract: A transmitter device adapted to be coupled to an image providing device and a receiver device includes first and second conversion units, a wireless module, and a processing unit. The first conversion unit and the second conversion unit are configured to be coupled to the image providing device through an HDMI transmission cable and a Type-C transmission cable, respectively, so as to respectively receive a first video and audio stream and a second video and audio stream provided by the image providing device. The wireless module is connected to the receiver device through wireless communication. The processing unit preferentially selects the first conversion unit to receive a first video and audio signal output by converting the first video and audio stream by the first conversion unit and transmits the first video and audio signal to the receiver device through the wireless module.

Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.

Abstract: A rotor includes a stack of electromagnetic steel plates each including through-hole groups with through-holes extending through the respective electromagnetic steel plates. In each of the through-hole groups, at least one of the through-holes accommodates a magnet and at least a portion of the through-holes that does not accommodate any magnet is filled with an electrically conductive material. When the rotor is seen axially, at two circumferential sides of a magnetic flux passage that is adjacent to the magnet, a width of the magnetic flux passage adjacent a first side of the magnet is larger than a width of the magnetic flux passage near a second side of the magnet.

Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and located between the first semiconductor structure and the second semiconductor structure. Each semiconductor pair includes a barrier layer and a well layer and includes the first dopant. The active region does not include a nitrogen element. A doping concentration of the first dopant in the first semiconductor structure is higher than a doping concentration of the first dopant in the active region.

Abstract: A wire-wound inductor using magnetic cores with three air gaps, which comprises a magnetic housing cores, an inner magnetic cores, and coils, characterized in that: multiple size combination of inner magnetic cores can be accepted in the magnetic housing cores with the same size; the magnetic housing cores and the inner magnetic cores can be made of different magnetic materials; the size and the material of the two magnetic parts of the inductor can be selected to meet the requirement of application frequency and power. The inductor adopts the magnetic cores with the air gaps in the mating areas between the magnetic housing core and the inner magnetic core as well as the two inner magnetic cores to form three air gaps. The types of the magnetic cores of the inductors are categorized as PM, RM and PQ by IEC standard. The inductors perform larger saturation current, higher inductance value and lower core loss.

Abstract: A circuit board detection device includes a base, a stage assembly, a first gantry support, and a first probe assembly. The stage assembly is arranged on the base and includes a linear drive module, a rotary motor, and a platform. The platform is configured to carry a circuit board and can be driven by the linear drive module to move along a first axial direction. The platform can also be driven by the rotary motor to rotate relative to a first rotation axis. The first gantry support is fixed on the base and includes a first beam. The first beam extends along a second axial direction perpendicular to the first axial direction to span over the linear drive module, and includes a first probe guide rail. The first probe assembly is arranged on the first probe guide rail to be movable along the second axial direction.

Abstract: Disclosed are apparatuses, systems, and techniques to render images with global illumination using efficient ray tracing, light source identification, and reservoir resampling that deploys temporal and spatial reservoirs.

Abstract: A data report rate adjustment method for use between a computer host and a peripheral device is provided. According to the actual workload level of the computer host and/or the amount of the input data of the peripheral device, the priority or the report rate of the data to be transmitted from the peripheral device can be dynamically adjusted or set. More especially, the unnecessary data report can be avoided. Consequently, the workload of the computer host can be effectively reduced, and the power consumption of the peripheral device can be saved.

Abstract: Disclosed is an illumination source comprising a gas delivery system comprising a gas nozzle. The gas nozzle comprises an opening in an exit plane of the gas nozzle. The gas delivery system is configured to provide a gas flow from the opening for generating an emitted radiation at an interaction region. The illumination source is configured to receive a pump radiation having a propagation direction and to provide the pump radiation in the gas flow. A geometry shape of the gas nozzle is adapted to shape a profile of the gas flow such that gas density of the gas flow first increases to a maximum value and subsequently falls sharply in a cut-off region along the propagation direction.

Abstract: A wireless briefing device includes a first antenna, a second antenna, and a ground plane. Each of the first antenna and the second antenna couples out a frequency band. A distance between the first antenna and the ground plane is between 0.2 and 0.3 times of a wavelength of the frequency band, and a distance between the second antenna and the ground plane is between 0.2 and 0.3 times of the wavelength of the frequency band.

Abstract: An optoelectronic semiconductor device is provided. The optoelectronic semiconductor device includes a substrate, a semiconductor stack located on the substrate; a first trench and a second trench provided in the semiconductor stack; a first insulating layer filling in the first trench and covering the semiconductor stack; a first metal layer covering the first insulating layer; a second metal layer covering the first insulating layer; and a second insulating layer located between the first metal layer and the first insulating layer, and between the second metal layer and the first insulating layer. A part of the second trench is uncovered by the first insulating layer and the second insulating layer.

Abstract: A method includes: providing a passivation layer with an embedded MIM capacitor; forming a redistribution layer (RDL) above the passivation layer; and forming an opening in the RDL above the MIM capacitor, wherein the opening separates the RDL into first and second RDL structures, wherein each of the first and second RDL structures has a convex-shaped profile on a sidewall that defines the opening that separates the first RDL structure from the second RDL structure, and wherein the convex-shaped profile on the sidewalls resists stress migration from the RDL to the MIM capacitor to resist stress migration induced cracks forming in the MIM capacitor. The forming an opening includes: removing a portion of the RDL to a first depth using first etching operations; and removing a portion of the RDL to a second depth by laterally etching sidewalls of the first and second RDL structures.

Abstract: An electronic device includes multiple networking devices arranged in a stack. The networking devices may include configurable ports, where a given configurable port in the configurable ports may be configured as a data port or a stacking port. During operation, a networking device in the stack may be designated as a master in the stack. In response, the networking device may provide one or more probe messages to determine a state of the networking devices, where the state includes one or more connections among the networking devices. Then, the networking device may verify that the one or more connections are correct. When the one or more connections are correct, the networking device may define a subset of the configurable ports in the networking devices as stacking ports.

Abstract: An electronic package is provided, in which an electronic module including a first electronic element and a second electronic element is disposed on a carrier structure embedded with a third electronic element, and the third electronic element is a photonic chip electrically connected to the electronic module. Therefore, with this configuration, it is beneficial to reduce a layout area of the carrier structure to meet the requirement of miniaturization.

Abstract: A computing system performs artificial-intelligence (AI) super-resolution (SR). The computing system includes multiple processors, which further includes a graphics processing unit (GPU) and an AI processing unit (APU). The computing system also includes a memory to store AI models. When detecting an indication that the loading of the GPU exceeds a threshold, the processors reduce the resolution of a video output from the GPU in response to the indication. One of the AI models is selected based on graphics scenes in the video and the respective power consumption estimates of the AI models. The processors then perform AI SR operations on the video using the selected AI model to restore the resolution of the video for display.

Abstract: Methods and semiconductor devices are provided. A method includes determining a location of a polyimide opening (PIO) corresponding to an under-bump metallization (UBM) feature in a die. The die includes a substrate and an interconnect structure over the substrate. The method also includes determining a location of a stacked via structure in the interconnect structure based on the location of the PIO. The method further includes forming, in the interconnect structure, the stacked via structure comprising at most three stacked contact vias at the location of the PIO.

Abstract: A semiconductor device includes a substrate, an interconnect structure, and conductive vias. The substrate has a first side, a second side and a sidewall connecting the first side and the second side, wherein the sidewall includes a first planar sidewall of a first portion of the substrate, a second planar sidewall of a second portion of the substrate and a curved sidewall of a third portion of the substrate, where the first planar sidewall is connected to the second planar sidewall through the curved sidewall. The interconnect structure is located on the first side of the substrate, where a sidewall of the interconnect structure is offset from the second planar sidewall. The conductive vias are located on the interconnect structure, where the interconnect structure is located between the conductive vias and the substrate.

Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.

Abstract: A method includes depositing an etch stop layer over a first conductive feature, performing a first treatment to amorphize the etch stop layer, depositing a dielectric layer over the etch stop layer, etching the dielectric layer to form an opening, etching-through the etch stop layer to extend the opening into the etch stop layer, and filling the opening with a conductive material to form a second conductive feature.