Abstract: A device includes a non-volatile analog resistive memory cell. The non-volatile analog resistive memory device includes a resistive memory device and a select transistor. The resistive memory device includes a first terminal and a second terminal. The resistive memory device has a tunable conductance. The select transistor is a ferroelectric field-effect transistor (FeFET) device which includes a gate terminal, a source terminal, and a drain terminal. The gate terminal of the FeFET device is connected to a word line. The source terminal of the FeFET device is connected to a source line. The drain terminal of the FeFET device is connected to the first terminal of the resistive memory device. The second terminal of the resistive memory device is connected to a bit line.

Abstract: A multi-level cell (MLC) one-selector-one-resistor (1S1R) three-dimensional (3D) cross-point memory system includes at least one MLC 1S1R structure including a stacked arrangement of a phase change memory (PCM) cell and a threshold switch selector. An electrically conductive bit line is in electrical communication with the OTS selector, and an electrically conductive word line is in electrical communication with the PCM cell. A controller is in electrical communication with the bit line and the word line. The controller is configured to select at least one voltage pulse from a group of different voltage pulses comprising a read pulse, a partial set pulse, a set pulse, a partial reset pulse, and a reset pulse, and configured to deliver the selected at least one voltage pulse to the at least one MLC 1S1R structure.

Abstract: Methods and structures for fabricating a semiconductor device that includes a reduced programming current phase change memory (PCM) are provided. The method includes forming a bottom electrode. The method further includes forming a PCM and forming a conductive bridge filament in a dielectric to serve as a heater for the PCM. The method also includes forming a top electrode.

Abstract: Fabrication of a physically unclonable function containing semiconductor device by fabricating a first electrode of the semiconductor device, randomly nucleating material regions upon a surface of the first electrode and forming a second electrode upon the first electrode and at least a portion of the randomly nucleated regions.

Abstract: Methods and structures for fabricating a semiconductor device that includes a reduced programming current phase change memory (PCM) are provided. The method includes forming a bottom electrode. The method further includes forming a PCM and forming a conductive bridge filament in a dielectric to serve as a heater for the PCM. The method also includes forming a top electrode.

Abstract: A multi-level cell (MLC) one-selector-one-resistor (1S1R) three-dimensional (3D) cross-point memory system includes at least one MLC 1S1R structure including a stacked arrangement of a phase change memory (PCM) cell and a threshold switch selector. An electrically conductive bit line is in electrical communication with the OTS selector, and an electrically conductive word line is in electrical communication with the PCM cell. A controller is in electrical communication with the bit line and the word line. The controller is configured to select at least one voltage pulse from a group of different voltage pulses comprising a read pulse, a partial set pulse, a set pulse, a partial reset pulse, and a reset pulse, and configured to deliver the selected at least one voltage pulse to the at least one MLC 1S1R structure.

Abstract: A method is presented for temperature assisted programming of flash memory for neuromorphic computing. The method includes training a chip in an environment having a first temperature, adjusting the first temperature to a second temperature in the environment, and employing the chip for inference in the second temperature environment. The first temperature is about 125° C. or higher and the second temperature is about 50° C. or lower.

Abstract: Fabrication of a physically unclonable function containing semiconductor device by fabricating a first electrode of the semiconductor device, randomly nucleating material regions upon a surface of the first electrode and forming a second electrode upon the first electrode and at least a portion of the randomly nucleated regions.

Abstract: A multi-level cell (MLC) one-selector-one-resistor (1S1R) three-dimensional (3D) cross-point memory system includes at least one MLC 1S1R structure including a stacked arrangement of a phase change memory (PCM) cell and a threshold switch selector. An electrically conductive bit line is in electrical communication with the OTS selector, and an electrically conductive word line is in electrical communication with the PCM cell. A controller is in electrical communication with the bit line and the word line. The controller is configured to select at least one voltage pulse from a group of different voltage pulses comprising a read pulse, a partial set pulse, a set pulse, a partial reset pulse, and a reset pulse, and configured to deliver the selected at least one voltage pulse to the at least one MLC 1S1R structure.

Abstract: Phase change memory devices and methods of forming the same include forming a fin structure from a first material. A phase change memory cell is formed around the fin structure, using a phase change material that includes two solid state phases at an operational temperature.

Abstract: A method for fabricating a semiconductor device includes forming first contacts to a heater for programming, and forming second contacts to a phase-change material layer for resistance readout. The phase-change material layer is formed in proximity to the heater, and the first contacts are electrically isolated from the second contacts to provide separate programming and resistance readout control.

Abstract: Methods and structures for fabricating a semiconductor device that includes a reduced programming current phase change memory (PCM) are provided. The method includes forming a bottom electrode. The method further includes forming a PCM and forming a conductive bridge filament in a dielectric to serve as a heater for the PCM. The method also includes forming a top electrode.

Abstract: A method for fabricating a semiconductor device includes forming first contacts to a heater for programming, and forming second contacts to a phase-change material layer for resistance readout. The phase-change material layer is formed in proximity to the heater, and the first contacts are electrically isolated from the second contacts to provide separate programming and resistance readout control.

Abstract: A system includes an analog memory architecture for performing differential reading. The analog memory architecture includes a weight array including first cross-point devices located at intersections of a first set of conductive column wires and a first set of conductive row wires, and a reference array operatively coupled to the weight array and including second cross-point devices located at intersections of a second set of conductive column wires and a second set of conductive row wires. The second cross-point devices include differential unipolar switching memory devices configured to enable zero-value shifting of the outputs of the first cross-point devices.

Abstract: A method is presented for forming a cell structure. The method includes constructing a resistive random access memory (RRAM) device, constructing a phase change memory (PCM) device in series with the RRAM device such that one of the electrodes of the PCM device is connected to a reactive electrode of the RRAM device, and connecting a complementary metal oxide semiconductor (CMOS) inverter to the RRAM and PCM devices to individually control switching behaviors of the RRAM and PCM devices.