Patents by Inventor Naoaki Yamaguchi
Naoaki Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20040256621Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.Type: ApplicationFiled: July 20, 2004Publication date: December 23, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshimitsu Konuma, Akira Sugawara, Yukiko Uehara, Hongyong Zhang, Atsunori Suzuki, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi, Yasuhiko Takemura
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Publication number: 20040191945Abstract: In an annealing process in which laser light is irradiated to a semiconductor thin film, a refractive index of the semiconductor thin film after laser light irradiation is measured and conditions for the next laser light irradiation are adjusted based on the measured refractive index value. For example, laser light irradiation conditions are adjusted so that semiconductor thin films always have the same refractive index. As a result, the annealing can be performed under the same conditions at every laser light irradiation even if the laser light irradiation conditions vary unavoidably.Type: ApplicationFiled: April 5, 2004Publication date: September 30, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Naoaki Yamaguchi, Koichiro Tanaka, Satoshi Teramoto
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Patent number: 6791111Abstract: The present invention relates to a display device. In particular, the display device of the present invention has a gate electrode over a substrate, the gate electrode has a lamination of a first conductive layer over the substrate and a second conductive layer on the first conductive layer; a semiconductor layer over the gate electrode with a gate insulating film interposed between; an insulating film in contact with a portion of the semiconductor layer; and at least one of source and drain electrodes formed in contact with a portion of the insulating film, where the first conductive layer does not have a tapered cross section, and the second conductive layer has a tapered cross section.Type: GrantFiled: December 20, 2002Date of Patent: September 14, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Naoaki Yamaguchi, Setsuo Nakajima
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Patent number: 6777763Abstract: In a thin film transistor (TFT), a mask is formed on a gate electrode, and a porous anodic oxide is formed in both sides of the gate electrode using a relatively low voltage. A barrier anodic oxide is formed between the gate electrode and the porous anodic oxide and on the gate electrode using a relatively high voltage. A gate insulating film is etched using the barrier anodic oxide as a mask. The porous anodic oxide is selectively etched after etching barrier anodic oxide, to obtain a region of an active layer on which the gate insulating film is formed and the other region of the active layer on which the gate insulating film is not formed. An element including at least one of oxygen, nitrogen and carbon is introduced into the region of the active layer at high concentration in comparison with a concentration of the other region of the active layer. Further, N- or P-type impurity is introduced into the active layer.Type: GrantFiled: November 12, 1998Date of Patent: August 17, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Hideto Ohnuma, Naoaki Yamaguchi, Yasuhiko Takemura
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Patent number: 6773971Abstract: There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.Type: GrantFiled: September 3, 1997Date of Patent: August 10, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Yasuhiko Takemura, Toshimitsu Konuma, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi
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Patent number: 6743667Abstract: An amorphous semiconductor film comprising silicon is provided with a metal element which is capable of promoting a crystallization of silicon. Then, the semiconductor film is crystallized by hating at a relatively low temperature. After introducing impurity ions into source and drain regions of the semiconductor film, the source and drain regions are recrystallized by heating. During the recrystallization, the channel region having crystallinity functions as crystalline nuclei. Accordingly, it is possible to avoid defects occurring in the boundary regions between the channel region and source/drain regions.Type: GrantFiled: February 2, 2001Date of Patent: June 1, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masamitsu Hiroki, Yasuhiko Takemura, Mutsuo Yamamoto, Naoaki Yamaguchi, Satoshi Teramoto
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Patent number: 6723590Abstract: A linear laser light which has an energy and is to be scanned is irradiated to a semiconductor device formed on a substrate, and then the substrate is rotated to irradiate to the semiconductor device a linear laser light which has a higher energy than that of the irradiated linear laser light and is to be scanned. Also, in a semiconductor device having an analog circuit region and a remaining circuit region wherein the analog circuit region is smaller than the remaining circuit region, a linear laser light having an irradiation area is irradiated to the analog circuit region without moving the irradiation area so as not to overlap the laser lights by scanning. On the other hand, the linear laser light to be scanned is irradiated to the remaining circuit region.Type: GrantFiled: July 13, 2000Date of Patent: April 20, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
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Patent number: 6716283Abstract: In an annealing process in which laser light is irradiated to a semiconductor thin film, a refractive index of the semiconductor thin film after laser light irradiation is measured and conditions for the next laser light irradiation are adjusted based on the measured refractive index value. For example, laser light irradiation conditions are adjusted so that semiconductor thin films always have the same refractive index. As a result, the annealing can be performed under the same conditions at every laser light irradiation even if the laser light irradiation conditions vary unavoidably.Type: GrantFiled: January 4, 2002Date of Patent: April 6, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Naoaki Yamaguchi, Koichiro Tanaka, Satoshi Teramoto
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Patent number: 6709906Abstract: In producing a semiconductor device such as a thin film transistor (TFT), a silicon semiconductor film is formed on a substrate having an insulating surface, such as a glass substrate, and then a silicon nitride film is formed on the silicon semiconductor film. After that, a hydrogen ion, fluorine ion, or chlorine ion is introduced into the silicon semiconductor film through the silicon nitride film, and then the silicon semiconductor film into which an ion is introduced is heated in an atmosphere containing hydrogen, fluorine, chlorine or these mixture, to neutralize dangling bonds in the silicon semiconductor film and reduce levels in the silicon semiconductor film.Type: GrantFiled: December 19, 2000Date of Patent: March 23, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Naoaki Yamaguchi, Hongyong Zhang, Satoshi Teramoto, Hideto Ohnuma
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Patent number: 6617612Abstract: The present invention relates to a semiconductor device and a semiconductor integrated circuit. The semiconductor device comprises a semiconductor layer comprising a channel region, a source and a drain regions and at least one lower impurity concentration region interposed between the channel region and the source or the drain region. The source and the drain regions comprise metal silicide region. The lower impurity concentration region is not covered with the metal silicide region. The operational speed of the circuit can be improved, and the leak current of the transistor can be reduced.Type: GrantFiled: January 26, 2001Date of Patent: September 9, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
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Publication number: 20030127648Abstract: Disclosed is a technique of improving the heat resistance of the aluminum gate electrode in bottom-gate-type TFT of which the active layer is made of a crystalline silicon film. A pattern of a laminate of a titanium film 102 and an aluminum film 103 is formed on a glass substrate 101. The pattern is to give a gate electrode 100. Then, the titanium film 102 is side-etched. Next, the layered substrate is heated to thereby intentionally form hillocks and whiskers-on the surface of the aluminum pattern 103. Next, the aluminum pattern 103 acting as an anode is subjected to anodic oxidation to form an oxide film 105 thereon. The anodic oxidation extends to the lower edge of the aluminum pattern 103, at which the titanium layer was side-etched. Next, a gate-insulating film 106 and an amorphous silicon film are formed. A mask is formed over the pattern, which is to give the gate electrode, and then a nickel acetate solution is applied to the layered structure.Type: ApplicationFiled: December 20, 2002Publication date: July 10, 2003Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Naoaki Yamaguchi, Setsuo Nakajima
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Publication number: 20030100152Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.Type: ApplicationFiled: September 16, 1994Publication date: May 29, 2003Inventors: TOSHIMITSU KONUMA, AKIRA SUGAWARA, YUKIKO UEHARA, HONGYONG ZHANG, ATSUNORI SUZUKI, HIDETO OHNUMA, NAOAKI YAMAGUCHI, HIDEOMI SUZAWA, HIDEKI UOCHI, YASUHIKO TAKEMURA
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Publication number: 20030047783Abstract: An auxiliary capacitor for a pixel of an active matrix type liquid crystal display is provided without decreasing the aperture ratio. A transparent conductive film for a common electrode is formed under a pixel electrode constituted by a transparent conductive film with an insulation film provided therebetween. Further, the transparent conductive film for the common electrode is maintained at fixed potential, formed so as to cover a gate bus line and a source bus line, and configured such that signals on each bus line are not applied to the pixel electrode. The pixel electrode is disposed so that all edges thereof overlap the gate bus line and source bus line. As a result, each of the bus lines serves as a black matrix. Further, the pixel electrode overlaps the transparent conductive film for the common electrode to form a storage capacitor.Type: ApplicationFiled: October 8, 2002Publication date: March 13, 2003Applicant: Semiconductor Energy Laboratory Co. Ltd., a Japanese corporationInventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
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Patent number: 6509212Abstract: A linear laser light which has an energy and is to be scanned is irradiated to a semiconductor device formed on a substrate, and then the substrate is rotated to irradiate to the semiconductor device a linear laser light which has a higher energy than that of the irradiated linear laser light and is to be scanned. Also, in a semiconductor device having an analog circuit region and a remaining circuit region wherein the analog circuit region is smaller than the remaining circuit region, a linear laser light having an irradiation area is irradiated to the analog circuit region without moving the irradiation area so as not to overlap the laser lights by scanning. On the other hand, the linear laser light to be scanned is irradiated to the remaining circuit region.Type: GrantFiled: January 26, 1999Date of Patent: January 21, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
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Patent number: 6507069Abstract: There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.Type: GrantFiled: March 15, 2000Date of Patent: January 14, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Yasuhiko Takemura, Toshimitsu Konuma, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi
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Patent number: 6501094Abstract: A semiconductor device includes a bottom gate type thin film transistor, wherein the bottom gate type thin film transistor is characterized in that a gate electrode is composed of a first layer comprising titanium and a second layer comprising aluminum formed on the first layer.Type: GrantFiled: June 9, 1998Date of Patent: December 31, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Naoaki Yamaguchi, Setsuo Nakajima
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Patent number: 6475837Abstract: An auxiliary capacitor for a pixel of an active matrix type liquid crystal display is provided without decreasing the aperture ratio. A transparent conductive film for a common electrode is formed under a pixel electrode constituted by a transparent conductive film with an insulation film provided therebetween. Further, the transparent conductive film for the common electrode is maintained at fixed potential, formed so as to cover a gate bus line and a source bus line, and configured such that signals on each bus line are not applied to the pixel electrode. The pixel electrode is disposed so that all edges thereof overlap the gate bus line and source bus line. As a result, each of the bus lines serves as a black matrix. Further, the pixel electrode overlaps the transparent conductive film for the common electrode to form a storage capacitor.Type: GrantFiled: May 7, 2001Date of Patent: November 5, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
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Patent number: 6475839Abstract: A method of manufacturing a semiconductor device comprises the steps of forming a first insulating film on a semiconductor layer, forming a gate electrode on the insulating film, pattering the first insulating film into a second insulating film so that a portion of the semiconductor layer is exposed while the second insulating film has extensions which extend beyond the side edges of the gate electrode, and performing ion introduction for forming impurity regions using the gate electrode and extensions of the gate insulating film as a mask. The condition of the ion introduction is varied in order to control the regions of the semiconductor layer to be added with the impurity and the concentration of the impurity therein.Type: GrantFiled: February 9, 2001Date of Patent: November 5, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
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Publication number: 20020059896Abstract: In an annealing process in which laser light is irradiated to a semiconductor thin film, a refractive index of the semiconductor thin film after laser light irradiation is measured and conditions for the next laser light irradiation are adjusted based on the measured refractive index value. For example, laser light irradiation conditions are adjusted so that semiconductor thin films always have the same refractive index. As a result, the annealing can be performed under the same conditions at every laser light irradiation even if the laser light irradiation conditions vary unavoidably.Type: ApplicationFiled: January 4, 2002Publication date: May 23, 2002Inventors: Naoaki Yamaguchi, Koichiro Tanaka, Satoshi Teramoto
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Patent number: 6336969Abstract: In an annealing process in which laser light is irradiated to a semiconductor thin film, a refractive index of the semiconductor thin film after laser light irradiation is measured and conditions for the next laser light irradiation are adjusted based on the measured refractive index value. For example, laser light irradiation conditions are adjusted so that semiconductor thin films always have the same refractive index. As a result, the annealing can be performed under the same conditions at every laser light irradiation even if the laser light irradiation conditions vary unavoidably.Type: GrantFiled: April 11, 2000Date of Patent: January 8, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Naoaki Yamaguchi, Koichiro Tanaka, Satoshi Teramoto