Patents by Inventor Naohiro Kimura

Naohiro Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110122749
    Abstract: An address format for appropriately controlling the recording linear density and the number of information recording layers is provided in order to increase the recording capacity of an information recording medium such as an optical disc or the like in a range in which a necessary S/N ratio can be guaranteed. An optical disc includes an information recording layer having a concentric or spiral track, and has a format for describing a track address, which is pre-recorded on the track or is to be added to data that is to be recorded on the information recording layer. The format includes layer information regarding the information recording layer and address information regarding the track address.
    Type: Application
    Filed: January 27, 2011
    Publication date: May 26, 2011
    Inventors: Kohei Nakata, Naohiro Kimura, Harumitsu Miyashita, Hiroshi Ueda, Yoshikazu Yamamoto
  • Patent number: 7903505
    Abstract: An address format for appropriately controlling the recording linear density and the number of information recording layers is provided in order to increase the recording capacity of an information recording medium such as an optical disc or the like in a range in which a necessary S/N ratio can be guaranteed. An optical disc includes an information recording layer having a concentric or spiral track, and has a format for describing a track address, which is pre-recorded on the track or is to be added to data that is to be recorded on the information recording layer. The format includes layer information regarding the information recording layer and address information regarding the track address.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: March 8, 2011
    Assignee: Panasonic Corporation
    Inventors: Kohei Nakata, Naohiro Kimura, Harumitsu Miyashita, Hiroshi Ueda, Yoshikazu Yamamoto
  • Publication number: 20110002201
    Abstract: An address format for appropriately controlling the recording linear density and the number of information recording layers is provided in order to increase the recording capacity of an information recording medium such as an optical disc or the like in a range in which a necessary S/N ratio can be guaranteed. An optical disc includes an information recording layer having a concentric or spiral track, and has a format for describing a track address, which is pre-recorded on the track or is to be added to data that is to be recorded on the information recording layer. The format includes layer information regarding the information recording layer and address information regarding the track address.
    Type: Application
    Filed: September 14, 2010
    Publication date: January 6, 2011
    Inventors: Kohei NAKATA, Naohiro Kimura, Harumitsu Miyashita, Hiroshi Ueda, Yoshikazu Yamamoto
  • Patent number: 7830753
    Abstract: In an optical disc, a track on which data is recordable is divided into a plurality of blocks, and each block includes L pieces of sub blocks. On each sub block, M-bit first digital information specifying a block address of a block including the each sub block and N-bit second digital information capable of representing a numerical value equal to or larger than L are recorded.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: November 9, 2010
    Assignee: Panasonic Corporation
    Inventors: Kohei Nakata, Naohiro Kimura, Harumitsu Miyashita, Hiroshi Ueda, Yoshikazu Yamamoto
  • Publication number: 20100169730
    Abstract: A phase error detection device detects a phase error, based on an output from an A/D conversion section that performs A/D conversion on an analog input signal in accordance with a sampling clock to generate a digital reproduction signal. The phase error detection device includes a phase error generation section that generates the phase error from the output from the A/D conversion section, and a phase error correction section that corrects the phase error. Herein, the phase error correction section determines a phase error detection range from past phase errors and, when the phase error generated by the phase error generation section is out of the phase error detection range, corrects the phase error.
    Type: Application
    Filed: December 17, 2009
    Publication date: July 1, 2010
    Inventor: Naohiro KIMURA
  • Publication number: 20100128102
    Abstract: A thermosensitive recording printer is provided with semiconductor lasers 1a to 1c, a polygon mirror 7 for condensing laser light emitted from the semiconductor laser 1a to 1c as condensed spots on a recording medium 10 to perform scanning in a main scanning direction, and a control unit 9 for controlling the output of the laser light. If a ratio of a spot diameter D1 of the condensed spots in the main scanning direction and a spot diameter D2 in a sub scanning direction satisfy a relationship of D1/D2?½ at the time of forming an image composed of a plurality of pixels on the recording medium 10 using laser light, high-speed thermosensitive recording and a recording method with an uncomplicated power control are realized without reducing the power density of the condensed spots.
    Type: Application
    Filed: April 21, 2008
    Publication date: May 27, 2010
    Inventors: Fumitomo Yamasaki, Joji Anzai, Naohiro Kimura, Takashi Nishihara
  • Patent number: 7623586
    Abstract: A frequency and phase control apparatus includes an analog/digital conversion section for converting a reproduction signal into a multiple bit digital signal based on a clock signal; a maximum likelihood decoding section for converting the multiple bit digital signal into a binary signal; a pattern detection section for detecting a pattern of the binary signal; and a determination section for determining whether or not the multiple bit digital signal and the clock signal are in synchronization with each other based on the detection result. When the determination result of the determination section indicates that the multiple bit digital signal and the clock signal are in synchronization with each other, the maximum likelihood decoding section generates a binary signal based on a first state transition rule; otherwise, the maximum likelihood decoding section generates a binary signal based on a second state transition rule.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: November 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Harumitsu Miyashita, Takeshi Nakajima, Naohiro Kimura
  • Publication number: 20090225639
    Abstract: A signal evaluation method according to the present invention is a method for evaluating a read signal, retrieved from an information recording medium, based on a binarized signal generated from the read signal by a PRML method.
    Type: Application
    Filed: February 27, 2009
    Publication date: September 10, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Harumitsu MIYASHITA, Kohei NAKATA, Yasumori HINO, Naohiro KIMURA
  • Patent number: 7584315
    Abstract: An integrated circuit includes: a signal processor, which receives an input signal and generates a processed signal, representing processing information obtained by subjecting the input signal to predetermined processing, and at least one type of internal signal including internal information obtained during the processing; at least one memory storing the processing information; an interface exchanges signals with an external device; and a controller controlling the signal processor, memory and interface. On receiving a first instruction from the external device through the interface, the controller controls the signal processor and memory such that the processing information is once stored in the memory and then output to the external device via the interface. In response to a second instruction, the controller controls the signal processor and memory such that the internal information is once stored in the memory and then output to the external device via the interface.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: September 1, 2009
    Assignee: Panasonic Corporation
    Inventors: Naohiro Kimura, Harumitsu Miyashita, Takeshi Nakajima, Hiromichi Ishibashi, Yoshikazu Yamamoto, Kohei Nakata
  • Publication number: 20090180361
    Abstract: In an optical disc, a track on which data is recordable is divided into a plurality of blocks, and each block includes L pieces of sub blocks. On each sub block, M-bit first digital information specifying a block address of a block including the each sub block and N-bit second digital information capable of representing a numerical value equal to or larger than L are recorded.
    Type: Application
    Filed: November 18, 2008
    Publication date: July 16, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Kohei NAKATA, Naohiro KIMURA, Harumitsu MIYASHITA, Hiroshi UEDA, Yoshikazu YAMAMOTO
  • Publication number: 20090180365
    Abstract: According to the present invention, when an apparatus performs reproduction from an optical disc of a format not compatible to the apparatus, the apparatus is prevented from obtaining an incorrect address and thus causing a malfunction. A recording method according to the present invention performs first conversion of bit-inverting m number (1?m<n; m an integer) of symbols at prescribed positions of a code word coded using an error correction code by a Reed-Solomon code and including symbol C(i) [i=C=0, 1, 2, . . . n; n is an integer] to generate conversion information; and records the conversion information on a first recording medium.
    Type: Application
    Filed: December 8, 2008
    Publication date: July 16, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Naohiro KIMURA, Kohei NAKATA, Toyoji GUSHIMA, Hiroshi UEDA
  • Publication number: 20090175151
    Abstract: An address format for appropriately controlling the recording linear density and the number of information recording layers is provided in order to increase the recording capacity of an information recording medium such as an optical disc or the like in a range in which a necessary S/N ratio can be guaranteed. An optical disc includes an information recording layer having a concentric or spiral track, and has a format for describing a track address, which is pre-recorded on the track or is to be added to data that is to be recorded on the information recording layer. The format includes layer information regarding the information recording layer and address information regarding the track address.
    Type: Application
    Filed: November 20, 2008
    Publication date: July 9, 2009
    Applicant: Panasonic Corporation
    Inventors: Harumitsu Miyashita, Kohei Nakata, Naohiro Kimura
  • Publication number: 20090103412
    Abstract: A recording control apparatus includes a waveform rectification section for receiving a digital signal generated from an analog signal representing information reproduced from an information recording medium, and rectifying a waveform of the digital signal; a maximum likelihood decoding section for performing maximum likelihood decoding of the digital signal having the waveform thereof rectified, and generating a binary signal representing a result of the maximum likelihood decoding; a reliability calculation section for calculating a reliability of the result of the maximum likelihood decoding based on the digital signal having the waveform thereof rectified and the binary signal; and an adjusting section for adjusting a shape of a recording signal for recording the information on the information recording medium based on the calculated reliability.
    Type: Application
    Filed: October 13, 2008
    Publication date: April 23, 2009
    Inventors: Harumitsu MIYASHITA, Takeshi Nakajima, Naohiro Kimura
  • Patent number: 7453658
    Abstract: A recording control apparatus includes a waveform rectification section for receiving a digital signal generated from an analog signal representing information reproduced from an information recording medium, and rectifying a waveform of the digital signal; a maximum likelihood decoding section for performing maximum likelihood decoding of the digital signal having the waveform thereof rectified, and generating a binary signal representing a result of the maximum likelihood decoding; a reliability calculation section for calculating a reliability of the result of the maximum likelihood decoding based on the digital signal having the waveform thereof rectified and the binary signal; and an adjusting section for adjusting a shape of a recording signal for recording the information on the information recording medium based on the calculated reliability.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: November 18, 2008
    Assignee: Panasonic Corporation
    Inventors: Harumitsu Miyashita, Takeshi Nakajima, Naohiro Kimura
  • Patent number: 7417815
    Abstract: A recording control apparatus includes a waveform rectification section for receiving a digital signal generated from an analog signal representing information reproduced from an information recording medium, and rectifying a waveform of the digital signal; a maximum likelihood decoding section for performing maximum likelihood decoding of the digital signal having the waveform thereof rectified, and generating a binary signal representing a result of the maximum likelihood decoding; a reliability calculation section for calculating a reliability of the result of the maximum likelihood decoding based on the digital signal having the waveform thereof rectified and the binary signal; and an adjusting section for adjusting a shape of a recording signal for recording the information on the information recording medium based on the calculated reliability.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: August 26, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Harumitsu Miyashita, Takeshi Nakajima, Naohiro Kimura
  • Publication number: 20080165651
    Abstract: A recording control apparatus includes a waveform rectification section for receiving a digital signal generated from an analog signal representing information reproduced from an information recording medium, and rectifying a waveform of the digital signal; a maximum likelihood decoding section for performing maximum likelihood decoding of the digital signal having the waveform thereof rectified, and generating a binary signal representing a result of the maximum likelihood decoding; a reliability calculation section for calculating a reliability of the result of the maximum likelihood decoding based on the digital signal having the waveform thereof rectified and the binary signal; and an adjusting section for adjusting a shape of a recording signal for recording the information on the information recording medium based on the calculated reliability.
    Type: Application
    Filed: March 11, 2008
    Publication date: July 10, 2008
    Inventors: Harumitsu MIYASHITA, Takeshi Nakajima, Naohiro Kimura
  • Patent number: 7376056
    Abstract: A method for reading address information from an optical disc with a wobbled track groove includes the steps of: obtaining a sine wave address signal, a first address signal representing a first groove region with sine wave wobbled portions and an inverted phase portion, and a second address signal representing a second groove region with steep inward or outward displacements; multiplying a first reference signal, being phase-locked to, and having the same frequency as, the sine wave address signal, and the first address signal together to obtain a first multiplied signal; multiplying a second reference signal, being phase-locked to, and having a frequency twice as high as, the sine wave address signal, and the second address signal together to obtain a second multiplied signal; integrating the first, multiplied signal and the second multiplied signal separately to obtain a first integral and a second integral, respectively; and adding the first and second integrals together.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: May 20, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahito Nakao, Shigeru Furumiya, Hiromichi Ishibashi, Junichi Minamino, Naohiro Kimura
  • Patent number: 7178088
    Abstract: Data is read from a recording medium and the reproduced data is deinterleaved and stored to a first memory while input/output to/from the first memory is arbitrated. It is determined whether a predetermined number of data units is stored to the first memory. Based on the result data, it is determined whether transfer of the data stored in first memory to a second memory is permitted. If data transfer is permitted, the reproduced data is transferred from the first memory to the second memory, during which time input/output to/from the second memory is arbitrated. The reproduced data stored to the second memory is then error corrected, and user data contained in the error corrected reproduction data is externally output from the second memory.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: February 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuichi Hashimoto, Yuji Takagi, Makoto Usui, Naohiro Kimura, Yoshikazu Yamamoto
  • Patent number: 7120102
    Abstract: A jitter detection apparatus includes an A/D conversion section for converting an input analog signal into a plurality of discrete multiple value digital signals; a binarization section for performing binarization of the plurality of multiple value digital signals to generate a binary signal; a jitter calculation section for calculating a jitter amount based on an error between a value of a prescribed multiple value digital signal sampled at a time which is substantially the same as a time when the value of the binary signal is changed and a prescribed threshold value; a pattern detection section for detecting patterns of the binary signal before and after the time when the prescribed multiple value digital signal is sampled; and a correction section for correcting the jitter amount based on the detected pattern.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: October 10, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Naohiro Kimura, Harumitsu Miyashita, Takeshi Nakajima, Tetsuya Shihara
  • Publication number: 20060153041
    Abstract: A frequency and phase control apparatus includes an analog/digital conversion section for converting a reproduction signal into a multiple bit digital signal based on a clock signal; a maximum likelihood decoding section for converting the multiple bit digital signal into a binary signal; a pattern detection section for detecting a pattern of the binary signal; and a determination section for determining whether or not the multiple bit digital signal and the clock signal are in synchronization with each other based on the detection result. When the determination result of the determination section indicates that the multiple bit digital signal and the clock signal are in synchronization with each other, the maximum likelihood decoding section generates a binary signal based on a first state transition rule; otherwise, the maximum likelihood decoding section generates a binary signal based on a second state transition rule.
    Type: Application
    Filed: October 20, 2003
    Publication date: July 13, 2006
    Inventors: Harumitsu Miyashita, Takeshi Nakajima, Naohiro Kimura