Abstract: A method of machining a silicon wafer is capable of preventing the generation of cracks, which start from a tapered or bevel portion in the periphery of the thin silicon wafer, when the wafer of a single crystal body is machined into the thin wafer. A plurality of silicon wafers 1 having a bevel portion 2 in the periphery are laminated, the bevel portions 2 in the peripheries of the plurality of laminated silicon wafers are ground at the same time, and a face of each silicon wafer is ground so as to obtain a thin silicon wafer 10.

Abstract: Two semiconductor substrates are first bonded together by means of a metal bump, while respective one-side surfaces on which device patterns are formed are faced each other, and a resin is then filled into a gap between the respective one-side surfaces and thereafter each of the semiconductor substrates is polished and thinned to a prescribed thickness. Furthermore, a via hole and an insulating film are formed; part of a portion in contact with the metal bump, of the insulating film, is opened; the inside of the via hole is filled with a conductor; and an electrode pad is formed on the conductor, to thereby form structures. Finally, a required number of structures are electrically connected with each other through the electrode pad and stacked to thereby obtain a semiconductor device.

Abstract: It is a task to reduce the length of an antenna by improving material of a module structure composing an antenna 3. A ferroelectric layer (2) is formed on the silicon board (1) and the antenna (3), composed of a conductor film, is formed on the ferroelectric layer (2). Through-holes (9) are formed on the silicon board (1). Electronic elements such as a capacitor (7), a SAW filter (8) and an inductance (6) are incorporated onto the silicon board (1) so as to compose a module structure.

Abstract: A method of manufacturing a micro-semiconductor element comprising the following steps of: adhering a semiconductor wafer 10 having a circuit surface and a back surface to a support plate 20 via a protective film 22 so that the circuit surface faces to the protective film; reducing a thickness of the semiconductor wafer while the semiconductor wafer is supported by the support plate; dividing the semiconductor wafer into individual semiconductor elements 10a while the semiconductor wafer is adhered to the protective film; moving the semiconductor elements from the protective film to an adhesive peeling film 26 in such a manner that the back surfaces of the semiconductor elements are adhered to the peeling film; supporting a periphery of the peeling film by a support ring 28; and picking up the individual semiconductor element by a pickup device when the back surface of semiconductor element is pushed up, via the peeling film, by a pushup pin 30.

Abstract: In order that the yield can be enhanced, the method of manufacturing a semiconductor device comprises the steps of: forming first holes 101a not penetrating a support side silicon wafer 101; forming a ground insulating film 102; forming primary connection plugs 105a by charging copper into the first holes 101a; forming a semiconductor film 108 on one face side of the support side silicon wafer 101 through an intermediate insulating film 109; forming elements on the semiconductor film 108; exposing bottom faces of the primary connection plugs 105a by polishing the other face of the support side silicon wafer 101; forming second holes 111 extending from an element forming face of the semiconductor film 108 to the primary connection plugs 105; and forming auxiliary connection plugs 112a for electrically connecting the elements with the primary connection plugs 105a by charging copper into the second holes 111.

Abstract: In order that the yield can be enhanced, the method of manufacturing a semiconductor device comprises the steps of: forming first holes 101a not penetrating a support side silicon wafer 101; forming a ground insulating film 102; forming primary connection plugs 105a by charging copper into the first holes 101a; forming a semiconductor film 108 on one face side of the support side silicon wafer 101 through an intermediate insulating film 109; forming elements on the semiconductor film 108; exposing bottom faces of the primary connection plugs 105a by polishing the other face of the support side silicon wafer 101; forming second holes 111 extending from an element forming face of the semiconductor film 108 to the primary connection plugs 105; and forming auxiliary connection plugs 112a for electrically connecting the elements with the primary connection plugs 105a by charging copper into the second holes 111.

Abstract: An interposer adapted to be used between a mounting board and a semiconductor chip which is to be mounted on the mounting board. The interposer comprises: a heat-resistant insulator having first and second surfaces, the insulator being provided with a plurality of through-holes opened at the first and second surfaces; wiring patterns formed on the first and second surfaces of the insulator electrically connected to each other by means of a conductor provided on an inner wall of at least one of the through-holes; and a capacitor. The capacitor comprises: a first electrode formed on the insulator and having a connecting portion formed on an inner wall of at least one of the other through-holes; a dielectric layer formed on the first electrode; and a second electrode formed on the dielectric layer.

Abstract: A method of forming a through-hole or a recess in a silicon substrate, having a conductor pattern formed on one side thereof by irradiating a laser beam to the silicon substrate, comprising the steps of: forming a protective film for protecting the conductor pattern on the one side of the silicon substrate, forming, on the entire surface of the silicon substrate inclusive of the top of the protective film, a metal plating film adhered to the protective film, irradiating a laser beam onto a predetermined position of the silicon substrate covered with the protective film and with the metal plating film, to form a through-hole or a recess in the silicon substrate, peeling off the metal plating film and removing debris, on the metal plating film around the open periphery of the through-hole or the recess, which has been deposited thereon during the formation of the thorough-hole or the recess by the laser beam irradiation, and removing a deposit, on the inner wall of the thorough-hole or the recess, which has bee

Abstract: In the production of semiconductor devices, a surface of the portion corresponding to the chip packaging area of the glass substrate is treated with plasma in a vacuum, a silicon chip is bonded-through its surface opposed to an electrode-bearing surface of the same to the activated surface of the glass substrate, and a wiring pattern having a predetermined configuration is formed in such a manner that a conductor exposed from the glass substrate is connected with an electrode of the silicon chip.

Abstract: A multilayer wiring board comprises: a metal substrate as a core, a condenser dielectric layer formed to cover the metal layer, and a condenser electrode metal layer formed to cover the condenser dielectric layer, so that a condenser is defined by the metal substrate, the condenser dielectric layer and the condenser electrode metal layer. Integral with the structure of the wiring board is a discrete capacitor component with the metal substrate and the condenser electrode forming the two plates thereof with the dielectric layer there between. The condenser dielectric layer is provided with a first contact hole to communicate with the metal substrate and the condenser electrode metal layer is provided with a second contact hole to communicate with the first contact hole, the diameter of the second contact hole being larger than that of the first contact hole.

Abstract: An interposer adapted to be used between a mounting board and a semiconductor chip which is to be mounted on the mounting board. The interposer having a heat-resistant insulator having first and second surfaces, the insulator being provided with a plurality of through-holes opened at the first and second surfaces; wiring patterns formed on the first and second surfaces of the insulator electrically connected to each other by means of a conductor provided on an inner wall of at least one of the through-holes; and a capacitor. The capacitor has first electrode formed on the insulator and having a connecting portion formed on an inner wall of at least one of the other through-holes, a dielectric layer formed on the first electrode, and a second electrode formed on the dielectric layer.

Abstract: A semiconductor device, enabling reliable electrical connection of a main electrode pad with an interconnection pattern without separate provision of a via use electrode pad in addition to the existing main electrode pad, provided with a silicon substrate (semiconductor substrate), an electronic element formation layer formed on one surface of that silicon substrate, an electrode pad electrically connected to the electronic element formation layer, a through hole passing through the electrode pad and the silicon substrate, an SiO2 film (insulating film), a via hole provided in the SiO2 film on the electrode pad along the opening rim of the through hole, and an interconnection pattern electrically leading out the electrode pad to the other surface of the silicon substrate through the through hole and via hole.

Abstract: A semiconductor device, enabling reliable electrical connection of a main electrode pad with an interconnection pattern without separate provision of a via use electrode pad in addition to the existing main electrode pad, provided with a silicon substrate (semiconductor substrate), an electronic element formation layer formed on one surface of that silicon substrate, an electrode pad having an extension and electrically connected to the electronic element formation layer, a through hole passing through the electrode pad and the silicon substrate, an SiO2 film (insulating film), a via hole provided in the SiO2 film on the extension of the electrode pad, and an interconnection pattern electrically leading out the electrode pad to the other surface of the silicon substrate through the through hole and via hole, said through hole having a diameter larger at a portion passing through the electrode pad than a portion passing through the semiconductor substrate.

Abstract: A method of production of a circuit board able to prevent peeling of a conductive layer during polishing of the conductive layer including the steps of forming at least holes in one surface of a substrate; forming a plating power supply layer on the one surface of the substrate, the other surface, the sides, and inner surfaces of the holes; forming a metal layer formed on the one surface of the substrate, the other surface, and the sides and burying the holes by electroplating through the plating power supply layer; and polishing the metal layer to form interconnect patterns comprised of the metal layer buried in the holes.

Abstract: An assembly of semiconductor devices, wherein the device comprises a chip with electrodes on one side for electrical connection with an external circuit, and a flexible base comprising an insulation film having an inner opening and outer openings outside the inner opening, and the conductor pattern comprising a plurality of inner leads having an end extending to the inner opening of the film, and the outer leads being positioned to bridge the outer opening of the film; and the chip being mounted on the flexible base by bonding the lead-out electrodes thereof to the ends of inner leads, and wherein the devices are assembled to be connected with each other through the outer leads of semiconductor devices which are adjacent to each other, and the semiconductor chips, which face a substrate on which the assembly is to be mounted, have external connection electrodes, on which an external connection terminal for mounting is provided.

Abstract: In the production of semiconductor devices, a surface of the portion corresponding to the chip packaging area of the glass substrate is treated with plasma in a vacuum, a silicon chip is bonded through its surface opposed to an electrode-bearing surface of the same to the activated surface of the glass substrate, and a wiring pattern having a predetermined configuration is formed in such a manner that a conductor exposed from the glass substrate is connected with an electrode of the silicon chip.

Abstract: A novel assembly of semiconductor devices useful for miniaturization of electronic appliances, wherein the semiconductor device comprises a semiconductor chip and a flexible base, the semiconductor chip being provided with lead-out electrodes on one side thereof for electrical connection with an external circuit, and the flexible base comprising an insulation film and a conductor pattern, the insulation film having an inner opening and outer openings arranged outside the inner opening, and the conductor pattern being located on one side of the insulation film, and comprising a plurality of pairs of an inner lead and an outer lead, the inner and outer leads in each pair being connected with each other, the inner lead having an end extending to the inner opening of the insulation film and being exposed therein, and the outer leads being positioned so as to bridge the outer opening of the insulation film and being exposed therein; and the semiconductor chip being mounted on the flexible base by bonding the lead-

Abstract: An interposer adapted to be used between a mounting board and a semiconductor chip which is to be mounted on the mounting board. The interposer comprises: a heat-resistant insulator having first and second surfaces, the insulator being provided with a plurality of through-holes opened at the first and second surfaces; wiring patterns formed on the first and second surfaces of the insulator electrically connected to each other by means of a conductor provided on an inner wall of at least one of the through-holes; and a capacitor. The capacitor comprises first electrode formed on the insulator and having a connecting portion formed on an inner wall of at least one of the other through-holes, a dielectric layer formed on the first electrode, and a second electrode formed on the dielectric layer.

Abstract: A multilayer wiring board comprises: a metal substrate as a core, a condenser dielectric layer formed to cover the metal layer, and a condenser electrode metal layer formed to cover the condenser dielectric layer, so that a condenser is defined by the metal substrate, the condenser and the condenser electrode metal layer. The condenser dielectric layer is provided with a first contact hole to communicate with the metal substrate and the condenser electrode metal layer is provided with a second contact hole to communicate with the first contact hole, the diameter of the second contact hole being larger than that of the first contact hole. An insulating layer is formed on the condenser electrode metal layer and is provided with a via hole to communicate with the metal substrate through the second and first contact holes. A metal substrate contact metal layer formed on an inner wall of the via hole, so that the metal substrate contact metal layer comes into electrical contact with the metal substrate.

Abstract: In order to provide a liquid crystal display (LCD) device capable of improving the display quality by preventing light leakage in the end portion of a display window on the side adjacent a fluorescent tube, a liquid crystal display device has a LCD panel, a light guide placed under the LCD panel, a fluorescent tube placed close to and along at least one side of the light guide, a lamp reflector sheet for covering substantially the whole length of the fluorescent tube, a diffusion sheet placed on the light guide under the LCD panel, and a reflective sheet placed under the light guide, wherein the surface of the lamp reflector sheet, reflective sheet or the diffusion sheet on the one side of the light guide is printed in color.