Patents by Inventor Naoki Nagashima

Naoki Nagashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240138175
    Abstract: An organic light-emitting device includes a first light-emitting layer and a second light-emitting layer. The first light-emitting layer contains a first organic compound, a first light-emitting material, and a second light-emitting material. The second light-emitting layer contains a second organic compound and a third light-emitting material. Each of the light-emitting materials is a fluorescent material. The following relationships or inequalities (a) to (c) are satisfied, S1D2>S1D1 ??(a), S1D3?S1D2 ??(b), and S1D2?S1D1>S1D3?S1D2 ??(c) where S1D1 is a singlet energy of the first light-emitting material, S1D2 is a singlet energy of the second light-emitting material, and S1D3 is a singlet energy of the third light-emitting material.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 25, 2024
    Inventors: HIROKAZU MIYASHITA, HITOSHI NAGASHIMA, YOSUKE NISHIDE, NAOKI YAMADA
  • Patent number: 11961819
    Abstract: A wire bonding apparatus connecting a lead of a mounted member with an electrode of a semiconductor die through a wire comprises a capillary through which the wire is inserted, a shape acquisition part which acquires the shape of the lead to which the wire is connected, a calculating part which calculates an extending direction of a wire tail extending from the end of the capillary based on the shape of a lead to which the wire is connected next, and a cutting part which moves the capillary in the extending direction and cuts the wire to form the wire tail after the lead is connected with the electrode through the wire. Thus, in the wire bonding using wedge bonding, joining part tails (183a, 283a, 383a) formed in continuation to a first bonding point can be prevented from coming into contact with each other.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: April 16, 2024
    Assignee: SHINKAWA LTD.
    Inventors: Naoki Sekine, Yasuo Nagashima
  • Publication number: 20240112860
    Abstract: An electronic component includes: a first internal electrode which is provided inside an element body and is drawn on a first main surface corresponding to a mounting surface; a second internal electrode which is provided inside the element body, is provided at a position different from the first internal electrode when viewed from a third direction, and is drawn on the first main surface; a third internal electrode which is provided inside the element body, is provided at a position facing the first internal electrode and the second internal electrode in the third direction, and is drawn on the first main surface; wherein the first internal electrode and the third internal electrode face each other in the third direction to form a first capacitor portion, and wherein the second internal electrode and the third internal electrode face each other in the third direction to form a second capacitor portion.
    Type: Application
    Filed: September 12, 2023
    Publication date: April 4, 2024
    Applicant: TDK CORPORATION
    Inventors: Naoki HAYAKAWA, Yoshitaka NAGASHIMA, Yasuhiro OKUI, Shinya SAITO, Yasuo WATANABE
  • Patent number: 8766837
    Abstract: The disclosed device easily and precisely satisfies a requested output range, and is provided with: a ??-modulator (12) which converts a digital input signal to a pulse signal; an input comparison device (11) which compares an input value that corresponds to the digital input signal, and a pre-set threshold value; and a thinned output control unit (14) which, when the result of the comparison by the input comparison device (11) shows that the input value is less than the threshold value, reduces the output value corresponding to the input value in accordance with the size of the difference between the input value and the threshold value, and sets the output value to 0 when the input value is 0.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: July 1, 2014
    Assignee: Azbil Corporation
    Inventors: Tetsuya Kajita, Seita Nashimoto, Naoki Nagashima, Kouji Okuda
  • Patent number: 8418674
    Abstract: A control device of a diesel engine, including an acceleration detector including an acceleration sensor, the acceleration sensor being attached to an engine body that defines a combustion chamber, the acceleration detector configured to output a vibration acceleration, an integrator configured to integrate values corresponding to amplitudes of the vibration acceleration from a predetermined integration start timing that is at least before an ignition timing, a comparison unit configured to compare an integration value of the integrator with a predetermined ignition timing judgment level, and a real ignition timing judgment unit configured to judge a real ignition timing on the basis of a reach timing, at which the integration value has reached the ignition timing judgment level.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: April 16, 2013
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Kousuke Yasuhara, Yasutaka Ishibashi, Naoki Nagashima
  • Publication number: 20120286982
    Abstract: The disclosed device easily and precisely satisfies a requested output range, and is provided with: a ??-modulator (12) which converts a digital input signal to a pulse signal; an input comparison device (11) which compares an input value that corresponds to the digital input signal, and a pre-set threshold value; and a thinned output control unit (14) which, when the result of the comparison by the input comparison device (11) shows that the input value is less than the threshold value, reduces the output value corresponding to the input value in accordance with the size of the difference between the input value and the threshold value, and sets the output value to 0 when the input value is 0.
    Type: Application
    Filed: September 30, 2010
    Publication date: November 15, 2012
    Inventors: Tetsuya Kajita, Seita Nashimoto, Naoki Nagashima, Kouji Okuda
  • Publication number: 20120112727
    Abstract: A current measurement device has a rectification unit rectifying an alternating-current signal, an A/D conversion unit converting an analog signal corresponding to a signal obtained by the rectification into a digital signal, an addition unit for adding digital signals corresponding to alternating-current signals during a sampling period among the digital signals obtained by the conversion, and a current value conversion unit for converting an additional value obtained by the addition by the addition unit into a current value using a current value conversion function. The sampling period is a common multiple of the periods of alternating-current signals of 50 Hz and 60 Hz, the current values of which are to be measured.
    Type: Application
    Filed: June 9, 2010
    Publication date: May 10, 2012
    Applicant: YAMATAKE CORPORATION
    Inventors: Hayato Motohashi, Hirofumi Hirayama, Naoki Nagashima
  • Publication number: 20120066421
    Abstract: A connector unit includes a communication line connecting a receiving port of a physical layer unit of a node to one adjacent node, and a communication line connecting a transmitting port of the physical layer unit to the one adjacent node via a capacitor, and a connector unit includes a communication line for connecting a receiving port of a physical layer unit of the node to the other adjacent node, and a communication line for connecting a transmitting port of the physical layer unit to the other adjacent node via a capacitor, wherein the connector unit is connected to a connector unit of the one adjacent node, so that the communication line of the node is connected to the communication line of the one adjacent node, and the communication line of the node is connected to the communication line of the one adjacent node.
    Type: Application
    Filed: May 14, 2010
    Publication date: March 15, 2012
    Applicant: YAMATAKE CORPORATION
    Inventors: Atsushi Seita, Taro Inami, Osamu Ueda, Masaki Mitsui, Takanori Aoki, Naoki Nagashima
  • Publication number: 20100224168
    Abstract: A control device of a diesel engine, including an acceleration detector including an acceleration sensor, the acceleration sensor being attached to an engine body that defines a combustion chamber, the acceleration detector configured to output a vibration acceleration, an integrator configured to integrate values corresponding to amplitudes of the vibration acceleration from a predetermined integration start timing that is at least before an ignition timing, a comparison unit configured to compare an integration value of the integrator with a predetermined ignition timing judgment level, and a real ignition timing judgment unit configured to judge a real ignition timing on the basis of a reach timing, at which the integration value has reached the ignition timing judgment level.
    Type: Application
    Filed: March 3, 2010
    Publication date: September 9, 2010
    Applicant: NISSAN MOTOR CO., LTD.
    Inventors: Kousuke YASUHARA, Yasutaka Ishibashi, Naoki Nagashima
  • Patent number: 6756299
    Abstract: A process for fabricating a semiconductor device, which reduces the number of steps required for forming a via hole and a wiring trench in the insulating film comprised of a low dielectric-constant insulating material, resulting in a lower cost for fabrication and a shorter turn around time, is provided. A photosensitive silazane film is exposed and developed to form a hard mask on an interlayer dielectric. The hard mask defines a wiring pattern for a wiring layer and a position of a via hole. Then, a resist film is formed on the interlayer dielectric to form a resist mask having a via hole pattern, and part of a via hole is formed using the resist mask. The interlayer dielectric is subjected to anisotropic etching using the hard mask to form a wiring trench and to allow the via hole to reach the wiring layer, and the wiring layer is exposed.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: June 29, 2004
    Assignee: Sony Corporation
    Inventor: Naoki Nagashima
  • Patent number: 6716743
    Abstract: A method of forming wiring of a uniform film thickness using a damascene process is proposed. Tantalum nitride, copper, another copper, and another tantalum nitride, for example, all constituting conductive films of different polishing rates, are overlayed on the top layer of an insulating film in which one wiring groove and another wiring groove are formed. The film thickness of the tantalum nitride, the copper, the other copper, and the other tantalum nitride is set and formed so that the height of the surface of the tantalum nitride formed on a silicon oxide film excluding the one wiring groove matches the height of the surface of the other tantalum nitride formed on the top layer of the one wiring groove. Subsequently, polishing takes over to complete the forming process.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: April 6, 2004
    Assignee: Sony Corporation
    Inventor: Naoki Nagashima
  • Publication number: 20030124839
    Abstract: A process for fabricating a semiconductor device, which reduces the number of steps required for forming a via hole and a wiring trench in the insulating film comprised of a low dielectric-constant insulating material, resulting in a lower cost for fabrication and a shorter turn around time, is provided. A photosensitive silazane film is exposed and developed to form a hard mask on an interlayer dielectric. The hard mask defines a wiring pattern for a wiring layer and a position of a via hole. Then, a resist film is formed on the interlayer dielectric to form a resist mask having a via hole pattern, and part of a via hole is formed using the resist mask. The interlayer dielectric is subjected to anisotropic etching using the hard mask to form a wiring trench and to allow the via hole to reach the wiring layer, and the wiring layer is exposed.
    Type: Application
    Filed: November 1, 2002
    Publication date: July 3, 2003
    Inventor: Naoki Nagashima
  • Publication number: 20030022482
    Abstract: A method of forming wiring of a uniform film thickness using a damascene process is proposed. Nitride tantalum, copper, another copper, and another nitride tantalum, for example, all constituting conductive films of different polishing rates, are overlayed on the top layer of an insulating film in which one wiring groove and another wiring groove are formed, and, by setting and forming the film thickness of the nitride tantalum, the copper, the other copper, and the other nitride tantalum so that the height of the surface of the nitride tantalum formed on a silicon oxide film excluding the one wiring groove matches the height of the surface of the other nitride tantalum formed on the top layer of the one wiring groove. Subsequently, polishing takes over to complete the forming process.
    Type: Application
    Filed: May 29, 2002
    Publication date: January 30, 2003
    Inventor: Naoki Nagashima
  • Patent number: 6507698
    Abstract: An inactive gas is introduced into an organic material evaporation source to place a thin organic film material in the organic material evaporation source in an atmosphere having a relatively high pressure, and the temperature of the thin organic film material is increased up to a certain temperature. Then, the organic material evaporation source is evacuated to lower the pressure around the thin organic film material for thereby causing the thin organic film material to emit a vapor. Since no wasteful vapor is emitted from the thin organic film material, the thin organic film material is effectively utilized. Because the inactive gas acts as a heating medium, the temperature of the thin organic film material is increased at a high rate, and the thin organic film material is uniformly heated. When the temperature of the thin organic film material is lowered in an inactive gas atmosphere, it can be lowered at a high rate.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: January 14, 2003
    Assignee: Nihon Shinku Gijutsu Kabushiki Kaisha
    Inventors: Naoki Nagashima, Natsuki Takahashi, Toshio Negishi
  • Patent number: 6473564
    Abstract: An inactive gas is introduced into an organic material evaporation source to place a thin organic film material in the organic material evaporation source in an atmosphere having a relatively high pressure, and the temperature of the thin organic film material is increased up to a certain temperature. Then, the organic material evaporation source is evacuated to lower the pressure around the thin organic film material for thereby causing the thin organic film material to emit a vapor. Since no wasteful vapor is emitted from the thin organic film material, the thin organic film material is effectively utilized. Because the inactive gas acts as a heating medium, the temperature of the thin organic film material is increased at a high rate, and the thin organic film material is uniformly heated. When the temperature of the thin organic film material is lowered in an inactive gas atmosphere, it can be lowered at a high rate.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: October 29, 2002
    Assignee: Nihon Shinku Gijutsu Kabushiki Kaisha
    Inventors: Naoki Nagashima, Natsuki Takahashi, Toshio Negishi
  • Publication number: 20010017108
    Abstract: An inactive gas is introduced into an organic material evaporation source to place a thin organic film material in the organic material evaporation source in an atmosphere having a relatively high pressure, and the temperature of the thin organic film material is increased up to a certain temperature. Then, the organic material evaporation source is evacuated to lower the pressure around the thin organic film material for thereby causing the thin organic film material to emit a vapor. Since no wasteful vapor is emitted from the thin organic film material, the thin organic film material is effectively utilized. Because the inactive gas acts as a heating medium, the temperature of the thin organic film material is increased at a high rate, and the thin organic film material is uniformly heated. When the temperature of the thin organic film material is lowered in an inactive gas atmosphere, it can be lowered at a high rate.
    Type: Application
    Filed: February 28, 2001
    Publication date: August 30, 2001
    Applicant: NIHON SHINKU GIJUTSU KABUSHIKI KAISHA
    Inventors: Naoki Nagashima, Natsuki Takahashi, Toshio Negishi
  • Patent number: 6275649
    Abstract: An inactive gas is introduced into an organic material evaporation source to place a thin organic film material in the organic material evaporation source in an atmosphere having a relatively high pressure, and the temperature of the thin organic film material is increased up to a certain temperature. Then, the organic material evaporation source is evacuated to lower the pressure around the thin organic film material for thereby causing the thin organic film material to emit a vapor. Since no wasteful vapor is emitted from the thin organic film material, the thin organic film material is effectively utilized. Because the inactive gas acts as a heating medium, the temperature of the thin organic film material is increased at a high rate, and the thin organic film material is uniformly heated. When the temperature of the thin organic film material is lowered in an inactive gas atmosphere, it can be lowered at a high rate.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: August 14, 2001
    Assignee: Nihon Shinku Gijutsu Kabushiki Kaisha
    Inventors: Naoki Nagashima, Natsuki Takahashi, Toshio Negishi
  • Patent number: 6101316
    Abstract: An inactive gas is introduced into an organic material evaporation source to place a thin organic film material in the organic material evaporation source in an atmosphere having a relatively high pressure, and the temperature of the thin organic film material is increased up to a certain temperature. Then, the organic material evaporation source is evacuated to lower the pressure around the thin organic film material for thereby causing the thin organic film material to emit a vapor. Since no wasteful vapor is emitted from the thin organic film material, the thin organic film material is effectively utilized. Because the inactive gas acts as a heating medium, the temperature of the thin organic film material is increased at a high rate, and the thin organic film material is uniformly heated. When the temperature of the thin organic film material is lowered in an inactive gas atmosphere, it can be lowered at a high rate.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: August 8, 2000
    Assignee: Nihon Shinku Gijutsu Kabushiki Kaisha
    Inventors: Naoki Nagashima, Natsuki Takahashi, Toshio Negishi, Izumi Kashiwabara
  • Patent number: 6080648
    Abstract: Disclosed is a method of fabricating a semiconductor device, including the steps of: preparing a silicon substrate on which a gate insulating film and a gate electrode composed of a polycrystalline silicon film and an insulating film are sequentially formed; forming side walls from a material having an etching selectivity to the insulating film on both sides of the gate electrode; forming a resist film on the silicon substrate so as to cover the gate electrode, and etching-back the resist film until the resist film remains on the silicon substrate except for the gate electrode to expose an upper portion of the gate electrode; selectively removing the insulating film on the gate electrode using the resist film and the side walls as a mask, and removing the resist film; and forming a refractory metal film on the silicon substrate so as to cover the gate electrode, and forming metal silicide films on the gate electrode and the silicon substrate by silicidizing, through heat-treatment, the refractory metal film w
    Type: Grant
    Filed: June 25, 1998
    Date of Patent: June 27, 2000
    Assignee: Sony Corporation
    Inventor: Naoki Nagashima
  • Patent number: 6066563
    Abstract: A manufacturing method of a complementary MOS transistor capable of providing line width stability at the time of lithography of gate patterning and suppressing punch through of an impurity from the silicon gate electrode to the side of a substrate is proposed.
    Type: Grant
    Filed: January 21, 1998
    Date of Patent: May 23, 2000
    Assignee: Sony Corporation
    Inventor: Naoki Nagashima