Patents by Inventor Naoki Odate
Naoki Odate has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9800649Abstract: A data communication method includes registering as a group and by a first data processing device of plural data processing devices, at least one second data processing device capable of communicating with the first data processing device; transmitting by the first data processing device and to the data processing devices, a first reception request for data; transmitting by the first data processing device and to the at least one second data processing device, a second reception request for the data when there is no response to the first reception request from the first data processing devices; and transmitting the data to the second data processing device, by the first data processing device and based on a response from the second data processing device.Type: GrantFiled: December 3, 2013Date of Patent: October 24, 2017Assignee: FUJITSU LIMITEDInventors: Koji Kurihara, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Toshiya Otomo, Naoki Odate
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Publication number: 20170289251Abstract: A data processing method is executed by a processor, and includes detecting an addition request to add a first device to a first group that includes a plurality of devices; registering the first device into a main group in which devices of the first group are registered, the first device being registered when the first device does not belong to a second group that is different from the first group; registering the first device into a subgroup, when the first device belongs to the second group; and performing by the devices registered in the main group, distributed processing that includes a plurality of tasks.Type: ApplicationFiled: June 22, 2017Publication date: October 5, 2017Applicant: FUJITSU LIMITEDInventors: Koji KURIHARA, Koichiro YAMASHITA, Takahisa SUZUKI, Hiromasa YAMAUCHI, Toshiya OTOMO, Naoki ODATE
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Patent number: 9729626Abstract: A file sharing method executed by a first terminal, and including selecting from among multiple terminals including the first terminal and based on a remaining battery level of the terminals and a processing time of a shared process, a second terminal to execute the shared process for sharing multiple files among the terminals; and assigning the shared process to the second terminal.Type: GrantFiled: September 13, 2013Date of Patent: August 8, 2017Assignee: FUJITSU LIMITEDInventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Naoki Odate, Tetsuo Hiraki
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Patent number: 9690619Abstract: A thread processing method is executed by a specific apparatus included among a plurality of apparatuses, and includes assigning one thread among a plurality of threads to the apparatuses, respectively; acquiring first time information that indicates a time at which the specific apparatus receives an execution result of a corresponding thread from each of the apparatuses; and setting a priority level of an access right to access shared memory that is shared by the apparatuses and the specific apparatus, the setting being based on the first time information and second time information that indicates a time at which reception of execution results of the threads from the apparatuses ends.Type: GrantFiled: October 18, 2013Date of Patent: June 27, 2017Assignee: FUJITSU LIMITEDInventors: Hiromasa Yamauchi, Koichiro Yamashita, Takahisa Suzuki, Koji Kurihara, Toshiya Otomo, Naoki Odate
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Patent number: 9672076Abstract: A system includes a CPU; an accelerator; a comparing unit that compares a first value that is based on a first processing time period elapsing until the CPU completes a first process and a second processing time period elapsing until the accelerator completes the first process, and a second value that is based on a state of use of a battery driving the CPU and the accelerator; and a selecting unit that selects any one among the CPU and the accelerator, based on a result of comparison by the comparing unit.Type: GrantFiled: September 16, 2013Date of Patent: June 6, 2017Assignee: FUJITSU LIMITEDInventors: Takahisa Suzuki, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Fumihiko Hayakawa, Naoki Odate, Tetsuo Hiraki, Toshiya Otomo
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Patent number: 9654400Abstract: A data communication method includes determining by a first terminal apparatus that is included among plural terminal apparatuses capable of direct communication with one another, whether a communication volume of data received from a second terminal apparatus that is included among the terminal apparatuses exceeds a processable communication volume; and transmitting by the first terminal apparatus to the second terminal apparatus, a portion of the data of a given communication volume, when the communication volume of the data exceeds the processable communication volume.Type: GrantFiled: December 4, 2013Date of Patent: May 16, 2017Assignee: FUJITSU LIMITEDInventors: Toshiya Otomo, Koichiro Yamashita, Naoki Odate, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara
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Patent number: 9632842Abstract: An exclusive access control method is executed by a computer having an operating system that when an excluded thread accesses a shared resource, executes a first exclusive access control process of prohibiting the excluded thread from attempting to access the shared resource until exclusive access control is released, the exclusive access control process being executed according to a number of attempts, by the excluded thread, to access the shared resources. The exclusive access control method includes counting by at least one second thread, including the excluded thread and different from a first thread, the number of attempts to access the shared resource, when the first thread executes a second exclusive access control process of allowing the excluded thread to attempt to access the shared resource until the excluded thread is permitted access; and storing to a memory area by the second thread, the counted number of attempts.Type: GrantFiled: September 25, 2013Date of Patent: April 25, 2017Assignee: FUJITSU LIMITEDInventors: Takahisa Suzuki, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Toshiya Otomo, Naoki Odate
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Patent number: 9563465Abstract: A multi-task scheduling method includes assigning a first thread to a first processor; detecting a second thread that is executed after the first thread; calculating based on a load of a processor that is assigned a third thread that generates the second thread, a first time that lasts until a start of the second thread; calculating a second time that lasts until completion of execution of the first thread; and changing a first time slice of the first processor to a second time slice when the second time is greater than the first time.Type: GrantFiled: July 3, 2013Date of Patent: February 7, 2017Assignee: FUJITSU LIMITEDInventors: Hiromasa Yamauchi, Koichiro Yamashita, Takahisa Suzuki, Koji Kurihara, Fumihiko Hayakawa, Naoki Odate, Tetsuo Hiraki
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Patent number: 9553928Abstract: A data sharing method includes detecting by a first data processing apparatus that is among multiple data processing apparatuses that share data, any one among a shortage of available memory, a change in remaining battery power, a change in a relative positional distance of the first data processing apparatus to a second data processing apparatus that is among the data processing apparatuses, a change in a communication speed of communication with the second data processing apparatus, and an interruption of communication with the second data processing apparatus; and transmitting by the first data processing apparatus to a third data processing apparatus that is among the data processing apparatuses, a shared portion of the data saved in the first data processing apparatus.Type: GrantFiled: November 26, 2013Date of Patent: January 24, 2017Assignee: FUJITSU LIMITEDInventors: Koji Kurihara, Koichiro Yamashita, Hiromasa Yamauchi, Naoki Odate, Toshiya Otomo
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Patent number: 9549412Abstract: A scheduling method is executed by a first apparatus among a plurality of apparatuses. The scheduling method includes assigning a process to at least one apparatus among the apparatuses based on a first table that includes each communication strength of the apparatuses; receiving an execution result of the process and a communication strength from the at least one apparatus; and creating the first table based on the received communication strength.Type: GrantFiled: October 18, 2013Date of Patent: January 17, 2017Assignee: FUJITSU LIMITEDInventors: Hiromasa Yamauchi, Koichiro Yamashita, Takahisa Suzuki, Koji Kurihara, Toshiya Otomo, Naoki Odate
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Patent number: 9529549Abstract: A data processing method that is executed by a first data processing apparatus included among plural data processing apparatuses, includes producing a copy of data, and restoration information that includes a first address of memory to which the copy of the data is stored; transmitting any one among the data and the copy of the data to a second data processing apparatus that is included among the data processing apparatuses; and storing the restoration information to shared memory that is memory of at least one data processing apparatus among the data processing apparatuses, and shared among the data processing apparatuses.Type: GrantFiled: December 19, 2013Date of Patent: December 27, 2016Assignee: FUJITSU LIMITEDInventors: Toshiya Otomo, Koichiro Yamashita, Naoki Odate, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara
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Publication number: 20160357604Abstract: A data processing system includes an interrupt controller that counts, as an interrupt processing execution count, executions of interrupt processing by threads executed by data processing devices; and a processor that is configured to select one scheduling method from among a plurality of scheduling methods, based on the interrupt processing execution count.Type: ApplicationFiled: August 17, 2016Publication date: December 8, 2016Applicant: FUJITSU LIMITEDInventors: Koji KURIHARA, Koichiro YAMASHITA, Takahisa SUZUKI, Hiromasa YAMAUCHI, Toshiya OTOMO, Naoki ODATE
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Patent number: 9513965Abstract: A data processing system includes an interrupt controller that counts, as an interrupt processing execution count, executions of interrupt processing by threads executed by data processing devices; and a processor that is configured to select one scheduling method from among a plurality of scheduling methods, based on the interrupt processing execution count.Type: GrantFiled: August 17, 2016Date of Patent: December 6, 2016Assignee: FUJITSU LIMITEDInventors: Koji Kurihara, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Toshiya Otomo, Naoki Odate
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Patent number: 9507633Abstract: A scheduling method that is executed by a first central processing unit (CPU) includes determining whether a task belongs to a first task category; determining whether a first access area accessed by the task is located in a first memory or a second memory, when the task belongs to the first task category; and setting a memory accessed by the task to the first memory or the second memory, based on a result at the determining.Type: GrantFiled: December 19, 2013Date of Patent: November 29, 2016Assignee: FUJITSU LIMITEDInventors: Koji Kurihara, Koichiro Yamashita, Takahisa Suzuki, Naoki Odate, Toshiya Otomo
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Patent number: 9507635Abstract: A scheduling method is executed by a given CPU among multiple CPUs. The scheduling method includes subtracting for each of the CPUs, a number of processes assigned to the CPU from a maximum number of speculative processes that can be assigned to each of the CPUs; summing results yielded at the subtracting to yield a total number of speculative processes; and assigning to the CPUs, speculative processes of a number is less than or equal to the total number of speculative processes.Type: GrantFiled: July 12, 2013Date of Patent: November 29, 2016Assignee: FUJITSU LIMITEDInventors: Toshiya Otomo, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Naoki Odate
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Patent number: 9507645Abstract: A thread processing method that is executed by a multi-core processor, includes supplying a command to execute a first thread to a first processor; judging a dependence relationship between the first thread and a second thread to be executed by a second processor; comparing a first threshold and a frequency of access of any one among shared memory and shared cache memory by the first thread; and changing a phase of a first operation clock of the first processor when the access frequency is greater than the first threshold and upon judging that no dependence relationship exists.Type: GrantFiled: October 18, 2013Date of Patent: November 29, 2016Assignee: FUJITSU LIMITEDInventors: Hiromasa Yamauchi, Koichiro Yamashita, Takahisa Suzuki, Koji Kurihara, Toshiya Otomo, Naoki Odate
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Publication number: 20160334854Abstract: A scheduling method is executed by a processor, and includes detecting a transition from a first process to a second process; acquiring from memory, an operating frequency and a CPU count for executing the second process; suspending a CPU under operation or starting a suspended CPU, based on the CPU count; and assigning the operating frequency to a CPU that is to execute the second process.Type: ApplicationFiled: July 26, 2016Publication date: November 17, 2016Applicant: FUJITSU LIMITEDInventors: Takahisa SUZUKI, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Toshiya Otomo, Naoki ODATE, Tetsuo HIRAKI
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Patent number: 9483101Abstract: A multicore processor system includes multiple processors; a device; a memory that stores information of voltage and clock frequency for minimizing power consumption in connection with a number of the processors accessing to the device; and a power control unit that controls the voltage and the clock frequency of the processors on the basis of the information stored in the memory if the number of the processors accessing to the device changes.Type: GrantFiled: June 12, 2013Date of Patent: November 1, 2016Assignee: FUJITSU LIMITEDInventors: Takahisa Suzuki, Koichiro Yamashita, Hiromasa Yamauchi, Koji Kurihara, Fumihiko Hayakawa, Naoki Odate, Tetsuo Hiraki, Toshiya Otomo
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Patent number: 9471123Abstract: A power supply control method includes detecting that a result of a first function performed by a first device ceases to be displayed on a display screen; suspending power supply to the first device and supplying power to a second device, based on a detection of the result ceasing to be displayed; and causing the second device to output a response signal to a CPU in response to a control signal from the CPU.Type: GrantFiled: March 14, 2014Date of Patent: October 18, 2016Assignee: Fujitsu LimitedInventors: Tetsuo Hiraki, Hiromasa Yamauchi, Koichiro Yamashita, Fumihiko Hayakawa, Naoki Odate, Takahisa Suzuki, Koji Kurihara
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Patent number: 9448931Abstract: An endian conversion method is executed by a CPU, and includes executing a program that includes endian conversion setting; and performing, when accessing an address of a main memory indicated in the endian conversion setting, endian conversion of data specified by the address of the main memory.Type: GrantFiled: September 17, 2013Date of Patent: September 20, 2016Assignee: FUJITSU LIMITEDInventors: Akihito Kataoka, Koichiro Yamashita, Naoki Odate, Takahisa Suzuki, Hiromasa Yamauchi, Koji Kurihara, Toshiya Otomo