Patents by Inventor Naoki Sano
Naoki Sano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20020027414Abstract: An organic EL display that realizes low electric power consumption and display with high brightness by decreasing the resistance of the electrode on the scanning side is provided.Type: ApplicationFiled: September 16, 1999Publication date: March 7, 2002Inventors: MITSUNOBU SEKIYA, TAKASHI HIRANO, TETSUO NAKAYAMA, NAOKI SANO, TATSUYA SASAOKA
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Publication number: 20020006248Abstract: To provide a small and lightweight optical switching element with a simple structure capable of fast response, and an optical switching apparatus employing the optical switching element. Optical extraction unit contacts an upper substrate with electrostatic attraction generated between a transparent electrode of the optical extraction unit and a transparent electrode of the upper substrate. In the case that light enters one V-shaped trench of the upper substrate vertically, the light enters the optical extraction unit of the upper substrate and is emitted from a back of the optical extraction unit (a tapered unit). Subsequently, the incident light P1 passes through a lower substrate and is converted into transmission light. With electrostatic attraction generated between a transparent electrode of the lower substrate and a transparent electrode of the optical extraction unit, the optical extraction unit is attracted to a lower substrate side.Type: ApplicationFiled: April 17, 2001Publication date: January 17, 2002Inventors: Takuya Makino, Kazuhiro Hane, Kazuhito Hori, Masaki Hara, Naoki Sano, Hidenori Watanabe
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Publication number: 20010022387Abstract: A process for pattern forming during semiconductor manufacturing comprises the steps of forming a resist pattern on a substrate, then a metallic layer, of aluminum for example, is applied to the complete surface of the substrate and the resist pattern, by spattering or the like. Next a heating step is carried out. The heating step is accomplished by immersing the resist pattern in a solvent heated in the vicinity of a boiling point thereof, for effecting expansion of the resist pattern. Then the resist pattern is removed along with undesired remnants of the metallic layer which are adhered to the resist pattern.Type: ApplicationFiled: May 16, 2001Publication date: September 20, 2001Inventors: Naoki Sano, Toshiyuki Sameshima, Masaki Hara, Setsuo Usui
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Patent number: 6291366Abstract: A target semiconductor device can be obtained stably by reforming an insulating film and a semiconductor. In a process of manufacturing a semiconductor device, at least one of the semiconductor and the insulating film is reformed after an annealing process for annealing the semiconductor at a temperature ranging from 20 to 400° C. in the atmosphere containing a gas of water (H2O) with a partial pressure from 1 Torr to a saturated vapor pressure for an annealing time ranging from 15 seconds to 20 hours.Type: GrantFiled: August 14, 1995Date of Patent: September 18, 2001Assignee: Sony CorporationInventors: Naoki Sano, Masaki Hara, Mitsunobu Sekiya, Toshiyuki Sameshima
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Publication number: 20010019901Abstract: A target semiconductor device can be obtained stably by reforming an insulating film and a semiconductor. In a process of manufacturing a semiconductor device, at least one of the semiconductor and the insulating film is reformed after an annealing process for annealing the semiconductor at a temperature ranging from 20 to 400° C. in the atmosphere containing a gas of water (H2O) with a partial pressure from 1 Torr to a saturated vapor pressure for an annealing time ranging from 15 seconds to 20 hours.Type: ApplicationFiled: February 8, 2001Publication date: September 6, 2001Inventors: Naoki Sano, Masaki Hara, Mitsunobu Sekiya, Toshiyuki Sameshima
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Patent number: 6251561Abstract: A recording film is formed by a vacuum film formation process. The recording film contains a substance which is thermally decomposed when a recording laser beam is irradiated thereto. When the substance is thermally decomposed by irradiation of the recording laser beam, a substance generated by the thermal decomposition is precipitated within the recording film, and therefore a change in complex index of refraction is caused predominantly over the raising deformation in the recording film. As a result, information is recorded in the recording film while causing almost no raising deformation of the recording film.Type: GrantFiled: January 22, 1999Date of Patent: June 26, 2001Assignee: Denso CorporationInventors: Shoichi Kawai, Hironari Kuno, Naoki Sano, Ryoichi Sugawara
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Patent number: 6215250Abstract: To provide an optical element in which resistance of electrodes on a scanning side is reduced, a rate of effectively utilizing light generated at organic layers is promoted and shortcircuit between anodes and cathodes is prevented, there is provided an optical element including first electrodes formed on a substrate, organic layers at least including organic light emitting materials formed on the first electrodes and second electrodes formed on the organic layers, in which the first electrodes and the second electrodes are formed to be substantially orthogonal to each other and the organic layers are formed in an island-like shape at positions at which the first electrodes and the second electrodes intersect with each other.Type: GrantFiled: August 3, 1999Date of Patent: April 10, 2001Assignee: Sony CorporationInventors: Takashi Hirano, Tatsuya Sasaoka, Mitsunobu Sekiya, Naoki Sano, Tetsuo Nakayama
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Patent number: 6120338Abstract: The present invention provides a method of manufacturing an organic EL display capable of decreasing the resistance of scanning-side electrodes, and improving the efficiency of utilization of light emitted in organic layers. In the manufacturing method, stripe first electrodes made of a transparent conductive material are formed in parallel on a transparent substrate, and then an insulation layer is formed on the transparent substrate with the apertures formed above the first electrodes. An organic film 24 composed of a film of an organic luminescent material, a second electrode material film and a protecting film is laminated in this order on the transparent substrate to cover the insulation layer, and then independent island resist patterns are formed on the protecting film.Type: GrantFiled: October 8, 1999Date of Patent: September 19, 2000Assignee: Sony CorporationInventors: Takashi Hirano, Tatsuya Sasaoka, Mitsunobu Sekiya, Naoki Sano, Tetsuo Nakayama
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Patent number: 5991533Abstract: A verification support system having the following characteristics: (1) Before actually making a CPU mounted circuit, virtually make a CPU mounted circuit model and an ICE model and perform verification of the CPU mounted circuit mode with logic simulation, by using the ICE model; (2) When an error is found in the verification of a program using logic simulation, the execution and verification of the steps up to one step before the error point is omitted and execution and verification are performed immediately from the error point, for the purpose of error correction; (3) A waveform obtained as a result of logic simulation and a partially enlarged waveform thereof are displayed on different display regions; (4) A display region for displaying a waveform obtained as a result of logic simulation every hour and a display region for saving a displayed waveform obtained when logic simulation is stopped, are provided separately; (5) When there are a plurality of target logic models, waveforms of logic simulation reType: GrantFiled: October 10, 1997Date of Patent: November 23, 1999Assignee: Yokogawa Electric CorporationInventors: Naoki Sano, Takeshi Yamamoto, Manabu Noriyasu, Satoru Natsui, Yuji Amano, Atsushi Ogasawara, Yuko Mizuta, Yoko Takihana
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Patent number: 5910015Abstract: The present invention is directed to a thin film transistor (TFT) structure having a channel region formed of a crystallized SiGe and is to provide a thin film transistor having a large carrier mobility. In this case, a channel region (4) is formed of a crystallized SiGe thin film.Type: GrantFiled: February 18, 1998Date of Patent: June 8, 1999Assignee: Sony CorporationInventors: Toshiyuki Sameshima, Masaki Hara, Naoki Sano, Dharam Pal Gosain, Setsuo Usui
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Patent number: 5889292Abstract: The present invention is directed to a thin film transistor (TFT) structure having a channel region formed of a crystallized SiGe and is to provide a thin film transistor having a large carrier mobility. In this case, a channel region (4) is formed of a crystallized SiGe thin film.Type: GrantFiled: December 13, 1995Date of Patent: March 30, 1999Assignee: Sony CorporationInventors: Toshiyuki Sameshima, Masaki Hara, Naoki Sano, Dharam Pal Gosain, Setsuo Usui
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Patent number: 5758123Abstract: A verification support system wherein before a CPU mounted circuit is actually made such circuit model and an ICE model are made virtually and verification of such circuit model is performed using logic simulation on the ICE model; and when an error is found execution and verification up to the error point are omitted and are performed immediately after the error point to correct the error. A waveform, obtained by logic simulation, and a partially enlarged waveform thereof are displayed on different display regions for each time period and a display region is provided for saving a displayed waveform obtained when logic simulation is stopped. In another aspect of the invention, before an actual system is made by PLC, such PLC model is verified, and a test program is carried out to obtain verification when a process model is detached from the PLC model, and a sequence program is carried out by using a general purpose simulator with a debugging function.Type: GrantFiled: April 11, 1995Date of Patent: May 26, 1998Assignee: Yokogawa Electric CorporationInventors: Naoki Sano, Takeshi Yamamoto, Manabu Noriyasu, Satoru Natsui, Yuji Amano, Atsushi Ogasawara, Yuko Mizuta, Yoko Takihana
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Patent number: 5726487Abstract: The present invention is directed to a thin film transistor (TFT) structure having a channel region formed of a crystallized SiGe and is to provide a thin film transistor having a large carrier mobility. In this case, a channel region (4) is formed of a crystallized SiGe thin film.Type: GrantFiled: October 28, 1994Date of Patent: March 10, 1998Assignee: Sony CorporationInventors: Toshiyuki Sameshima, Masaki Hara, Naoki Sano, Dharam Pal Gosain, Setsuo Usui
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Patent number: 5648276Abstract: A method and an apparatus for fabricating a thin film semiconductor device are disclosed. An a-Si:H thin film produced on a wafer is melting-recrystallized by irradiating a laser beam to it in a laser annealing chamber to produce a polycrystalline Si thin film. The wafer is then transported to a CVD chamber without exposing it to the outside air. A gate insulating film is produced on a clean surface of the polycrystalline Si thin film in the CVD chamber. In another case, an a-Si:H thin film is melting-recrystallized in the laser annealing chamber to produce a polycrystalline Si thin film and then the wafer is transported to a hydrogenating chamber without exposing it to the outside air. Thereafter the polycrystalline Si thin film is plasma hydrogenated in the hydrogenating chamber.Type: GrantFiled: May 26, 1994Date of Patent: July 15, 1997Assignee: Sony CorporationInventors: Masaki Hara, Naoki Sano, Toshiyuki Sameshima, Atsushi Kohno, Mitsunobu Sekiya, Yasuhiro Kanaya, Michihisa Yano
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Patent number: 5591653Abstract: The present invention is directed to a thin film transistor (TFT) structure having a channel region formed of a crystallized SiGe and is to provide a thin film transistor having a large carrier mobility. In this case, a channel region (4) is formed of a crystallized SiGe thin film.Type: GrantFiled: May 15, 1995Date of Patent: January 7, 1997Assignee: Sony CorporationInventors: Toshiyuki Sameshima, Masaki Hara, Naoki Sano, Dharam Pal Gosain, Setsuo Usui
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Patent number: 5446304Abstract: An active layer of an insulated-gate type field effect transistor is formed by a thin film of an intrinsic polycrystalline semiconductor and a source electrode and a drain electrode are formed on the active layer. A source region and a drain region are not formed in the active layer. A main gate electrode is formed on a gate insulating film of a portion between the source electrode and the drain electrode. Subgate electrodes are formed on the gate insulating film in a portion between the source electrode and the main gate electrode and a portion between the drain electrode and the main gate electrode, respectively.Type: GrantFiled: September 29, 1994Date of Patent: August 29, 1995Assignee: Sony CorporationInventors: Toshiyuki Sameshima, Naoki Sano, Dharam P. Gosain, Setsuo Usui
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Patent number: 5431126Abstract: A thin semiconductor film having at least one an edge is formed on a base whose material is different from the material of the thin semiconductor film. A laser beam, for example, is applied to the semiconductor film thereby to melt the semiconductor film including the edge for thereby beading the edge upwardly. The melted semiconductor film including the edge is solidified and hence recrystallized into a semiconductor crystal. A plurality of spaced reflecting films may be formed on the thin semiconductor film before the laser beam is applied. Various semiconductor devices including a thin-film transistor, a solar cell, and a bipolar transistor may be fabricated of the semiconductor crystal.Type: GrantFiled: June 22, 1993Date of Patent: July 11, 1995Assignee: Sony CorporationInventors: Toshiyuki Sameshima, Masaki Hara, Naoki Sano, Gosain D. Pal, Atsushi Kono, Jonathan Westwater, Setsuo Usui
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Patent number: 5416549Abstract: A lens mount device for detachably mounting a lens cylinder having a cylindrical outer surface, on a video camera body which has an optical axis passing therethrough. The lens mount device includes a base plate formed with a circular opening having an axis aligned with the optical axis. A base ring is secured to the base plate and formed with a cylindrical opening coaxial with the circular opening of the base plate to receive the lens cylinder. A slide ring is axially movably disposed within the base ring and formed with an inner surface. The slide ring has a first position where its inner surface is engaged with the outer surface of the lens cylinder and a second position where its inner surface is disengaged from the outer surface of the lens cylinder, when the lens cylinder is mounted on the base ring. The slide ring has cam pins engageable with a cam groove of a cam ring connected with an actuator ring.Type: GrantFiled: March 1, 1994Date of Patent: May 16, 1995Assignee: Sony CorporationInventors: Tomoyasu Katsuyama, Naoki Sano
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Patent number: 5304250Abstract: A plasma system which eliminates damage derived from charged particles in the plasma and which is able to perform uniform plasma CVD and plasma etching on a large area substrate, wherein a mesh plate having a plurality of holes is placed at the interface of a plasma generation chamber and a substrate treatment chamber which holds a substrate, a high frequency electrical field being applied between an upper electrode in the plasma generation chamber and the mesh plate so as to disassociate the plasma forming gas by electrodischarge so as to cause the generation of plasma. By this, the plasma is isolated from the substrate. On the other hand, source gas supply ports are opened near the holes of the mesh plate, the source gas being introduced from there being brought into contact with the plasma through the holes, whereby the reaction product can be uniformly produced in a broad area.Type: GrantFiled: July 7, 1992Date of Patent: April 19, 1994Assignee: Sony CorporationInventors: Toshiyuki Sameshima, Masaki Hara, Naoki Sano, Setsuo Usui
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Patent number: 5145808Abstract: A method of crystallizing a semiconductor thin film moves a laser beam emitted by a pulse laser in a first direction to irradiate the semiconductor tin film with the laser beam for scanning. The laser beam is split into a plurality of secondary laser beams of a width smaller than the pitch of step feed, respectively having different energy densities forming a stepped energy density distribution decreasing from the middle toward the opposite ends thereof with respect to the direction of step feed. The energy density of the first secondary laser beam corresponding to the middle of the energy distribution is higher than a threshold energy density, i.e., the minimum energy density that will melt the semiconductor thin film to make the same amorphous, and lower than a roughening energy density, i.e.Type: GrantFiled: August 20, 1991Date of Patent: September 8, 1992Assignee: Sony CorporationInventors: Toshiyuki Sameshima, Masaki Hara, Naoki Sano, Setsuo Usui