Patents by Inventor Naoki Tanahashi

Naoki Tanahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170274632
    Abstract: A laminated glass may be obtained by integrally bonding glass sheets through an adhesive, the adhesive comprising a hydrogenated block copolymer obtained by introducing an alkoxysilyl group into a hydrogenated block copolymer that is obtained by hydrogenating unsaturated bonds of a block copolymer that comprises at least two polymer blocks and at least one polymer block, the polymer block comprising a repeating unit derived from an aromatic vinyl compound as a main component, the polymer block comprising a repeating unit derived from a linear conjugated diene compound as a main component, and a ratio (wA:wB) of a weight fraction wA of the polymer block in the block copolymer to a weight fraction wB of the polymer block in the block copolymer being 30:70 to 60:40. The laminated glass may employ a block copolymer hydrogenation product comprising an alkoxysilyl group and excellent light-fastness, heat resistance, moisture resistance and transparency.
    Type: Application
    Filed: June 14, 2017
    Publication date: September 28, 2017
    Applicant: ZEON CORPORATION
    Inventors: Teiji KOHARA, Naoki TANAHASHI
  • Publication number: 20150104654
    Abstract: A laminated glass may be obtained by integrally bonding glass sheets through an adhesive, the adhesive comprising a hydrogenated block copolymer obtained by introducing an alkoxysilyl group into a hydrogenated block copolymer that is obtained by hydrogenating unsaturated bonds of a block copolymer that comprises at least two polymer blocks and at least one polymer block, the polymer block comprising a repeating unit derived from an aromatic vinyl compound as a main component, the polymer block comprising a repeating unit derived from a linear conjugated diene compound as a main component, and a ratio (wA:wB) of a weight fraction wA of the polymer block in the block copolymer to a weight fraction wB of the polymer block in the block copolymer being 30:70 to 60:40. The laminated glass may employ a block copolymer hydrogenation product comprising an alkoxysilyl group and excellent light-fastness, heat resistance, moisture resistance and transparency.
    Type: Application
    Filed: May 24, 2013
    Publication date: April 16, 2015
    Inventors: Teiji Kohara, Naoki Tanahashi
  • Publication number: 20130008506
    Abstract: A resin composition comprising a hydrogenated block copolymer which is used for a resin composition for encapsulating a solar cell is provided. The hydrogenated block copolymer can be obtained by hydrogenating 90% or more of the total unsaturated bonds of block copolymers which comprise at least two polymer blocks [A] having an aromatic vinyl compound-origin repeating unit as the main component and at least one polymer block [B] comprising a chain-type conjugated diene compound-origin repeating unit as the main component and in which the ratio (wA:wB) of the weight fraction (wA) of the total polymer blocks [A], relative to the total block copolymer, to the weight fraction (wB) of the total polymer block [B] is 20:80 to 60:40. The resin composition has a tensile elasticity (at 23° C.) of 1.
    Type: Application
    Filed: February 1, 2011
    Publication date: January 10, 2013
    Applicant: ZEON CORPORATION
    Inventors: Naoki Tanahashi, Teiji Kohara
  • Patent number: 8311123
    Abstract: When data is an HDTV signal, a buffer memory is used as two banks and pipeline processing is performed. When data is an SDTV signal, on the other hand, the buffer memory is used as a bankless buffer memory, and the pipeline processing is not performed.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: November 13, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd
    Inventors: Tetsuo Kosuge, Kensuke Fujimura, Naoki Tanahashi
  • Patent number: 8283681
    Abstract: A lighting device including a metal substrate to prevent temperature rise of LED chip is offered. The lighting device includes the metal substrate, an anode or cathode electrode of the LED chip disposed on the metal substrate, brazing materials connecting the LED chip and the metal substrate, and a groove formed in the anode or cathode electrode. Forming the groove can prevent an occurrence of a crack in the brazing materials. Also, a lighting device includes the metal substrate, an anode and cathode electrode of the LED chip disposed on the metal substrate and brazing materials connecting the LED chip and the metal substrate. Further, a slit is formed in the metal substrate between the anode and cathode electrode. Forming the slit in the metal substrate can prevent an occurrence of a crack in the brazing materials.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: October 9, 2012
    Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Noriaki Sakamoto, Naoki Tanahashi, Tsuyoshi Hasegawa, Takaya Kusabe, Masahiko Mizutani, Hideki Mizuhara, Yoshinari Sakuma
  • Publication number: 20120237684
    Abstract: A plastic member, for example, a hydrocarbon-based transparent polymer molded product is subjected to fluorination processing in a fluorine gas within a reaction device 8 to fluorinate only a surface layer thereof. Thus, a refractive index can be lowered, a surface reflection can be lowered, and light transmittance of a base material can be improved.
    Type: Application
    Filed: May 7, 2012
    Publication date: September 20, 2012
    Inventors: Tadahiro OHMI, Naoki Tanahashi, Keiichi Nii
  • Publication number: 20110241025
    Abstract: A lighting device including a metal substrate to prevent temperature rise of LED chip is offered. The lighting device includes the metal substrate, an anode or cathode electrode of the LED chip disposed on the metal substrate, brazing materials connecting the LED chip and the metal substrate, and a groove formed in the anode or cathode electrode. Forming the groove can prevent an occurrence of a crack in the brazing materials. Also, a lighting device includes the metal substrate, an anode and cathode electrode of the LED chip disposed on the metal substrate and brazing materials connecting the LED chip and the metal substrate. Further, a slit is formed in the metal substrate between the anode and cathode electrode. Forming the slit in the metal substrate can prevent an occurrence of a crack in the brazing materials.
    Type: Application
    Filed: October 15, 2010
    Publication date: October 6, 2011
    Applicants: SANYO ELECTRIC CO., LTD., SANYO SEMICONDUCTOR CO., LTD.
    Inventors: Noriaki SAKAMOTO, Naoki Tanahashi, Tsuyoshi Hasegawa, Takaya Kusabe, Masahiko Mizutani, Hideki Mizuhara, Yoshinari Sakuma
  • Publication number: 20110198117
    Abstract: A laminate including a resin layer and a metal layer, the resin layer being obtained by modifying at least part of the surface of a resin film including a thermoplastic cyclic olefin resin by ionizing irradiation, and the metal layer being formed on the modified area of the surface of the resin film by plating, a method of producing the same, and an electronic circuit board including a circuit formed by etching the metal layer of the laminate by photolithography, are disclosed. The laminate ensures that the insulating resin layer (flat surface) exhibits high adhesion to the conductor layer.
    Type: Application
    Filed: August 20, 2009
    Publication date: August 18, 2011
    Applicants: Kanto Gakuin University Surface Engineering Research Institute, Kanto Kasei Co., Ltd., Zeon Corporation
    Inventors: Mitsuhiro Watanabe, Hideo Honma, Mitsushi Tada, Takashi Iga, Naoki Tanahashi
  • Publication number: 20110092042
    Abstract: A plurality of diffused resistors and a plurality of wirings (resistive elements) are alternately disposed along a virtual line, and those diffused resistors and wirings are connected in series by contact vias. In the same wiring layer as that of the wirings, a dummy pattern is formed so as to surround a formation region of the wirings and the diffused resistors. A space between the dummy pattern and the wirings is set in accordance with, for example, a minimum space between wirings in a chip formation portion.
    Type: Application
    Filed: December 21, 2010
    Publication date: April 21, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Sachie TONE, Hiroyuki UNO, Naoki TANAHASHI, Naoki NISHIDA
  • Publication number: 20110042371
    Abstract: A dezincing apparatus according to the present invention is provided with an inductive heating container 50, inductive heating coils 60, 61, and a hollow pipe 70. The inductive heating container 50 has a feeding port into for feeding a scrap steel plate 41, and is an outer container of the dezincing apparatus 2. The inductive heating coils 60, 61 are wound around the outer periphery of the inductive heating container 50, and are connected to a high-frequency power supply. The hollow pipe 70 is a hollow rod body erected at the center of the inductive heating container 50, and is made of alloy steel. A reducing atmosphere is established in the container by the feeding of a carbon-containing material 42, or the like. Slits 71, 72, 73 for discharging zinc vapor or the like to the outside are formed in the hollow pipe 70.
    Type: Application
    Filed: July 9, 2010
    Publication date: February 24, 2011
    Inventors: Shigeyuki Nakamura, Toshimitsu Fujiwara, Naoki Tanahashi, Takahiro Yamada
  • Patent number: 7883982
    Abstract: A plurality of diffused resistors and a plurality of wirings (resistive elements) are alternately disposed along a virtual line, and those diffused resistors and wirings are connected in series by contact vias. In the same wiring layer as that of the wirings, a dummy pattern is formed so as to surround a formation region of the wirings and the diffused resistors. A space between the dummy pattern and the wirings is set in accordance with, for example, a minimum space between wirings in a chip formation portion.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: February 8, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Sachie Tone, Hiroyuki Uno, Naoki Tanahashi, Naoki Nishida
  • Patent number: 7836323
    Abstract: There is disclosed a clock regeneration circuit having a PCR buffer including a register which buffers a PCR extracted from a transmission signal, a counter which counts a reception side reference clock CKr, an STC buffer including a register which buffers a counted value of the counter, and a CPU which generates a signal indicating a difference between a transmission side reference clock and the reception side reference clock CKr based on values held in the PCR buffer and the STC buffer. If, at this point, a new PCR is input before the values held in the PCR buffer and the STC buffer are read by the CPU, the PCR buffer and the STC buffer are not updated.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: November 16, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kensuke Fujimura, Naoki Tanahashi
  • Publication number: 20100221495
    Abstract: A plastic member, for example, a hydrocarbon-based transparent polymer molded product is subjected to fluorination processing in a fluorine gas within a reaction device 8 to fluorinate only a surface layer thereof. Thus, a refractive index can be lowered, a surface reflection can be lowered, and light transmittance of a base material can be improved.
    Type: Application
    Filed: September 12, 2005
    Publication date: September 2, 2010
    Inventors: Tadahiro Ohmi, Naoki Tanahashi, Keiichi Nii
  • Publication number: 20100027275
    Abstract: A light guide plate for liquid crystal display, made of a resin, which has a surface layer portion (preferably on the light incident surface side of the light guide plate) comprising a region containing fluorine atoms in an amount larger than that in the inner layer portion. The resin is preferably an alicyclic structure-containing resin. The light guide plate is produced by exposing a surface of a light guide plate substrate to an atmosphere containing fluorine gas. Preferably, prior to the exposure to a fluorine-gas containing atmosphere and after the exposure to a fluorine-gas containing atmosphere, the light guide plate substrate is maintained in an inert gas-containing atmosphere, or in the air under reduced pressure, for the production of the light guide plate.
    Type: Application
    Filed: March 31, 2005
    Publication date: February 4, 2010
    Applicants: Zeon Corporation
    Inventors: Tadahiro Ohmi, Naoki Tanahashi, Masahiko Hayashi
  • Publication number: 20090236133
    Abstract: In order to provide a method of manufacturing a polymer containing an extremely small amount of residual unreacted monomer component, and a material using the polymer, megasonic is directly radiated to a polymer containing a residual unreacted monomer under an atmosphere free of oxygen and moisture to thereby perfectly complete polymerization.
    Type: Application
    Filed: September 12, 2005
    Publication date: September 24, 2009
    Inventors: Tadahiro Ohmi, Naoki Tanahashi
  • Publication number: 20090176346
    Abstract: A plurality of diffused resistors and a plurality of wirings (resistive elements) are alternately disposed along a virtual line, and those diffused resistors and wirings are connected in series by contact vias. In the same wiring layer as that of the wirings, a dummy pattern is formed so as to surround a formation region of the wirings and the diffused resistors. A space between the dummy pattern and the wirings is set in accordance with, for example, a minimum space between wirings in a chip formation portion.
    Type: Application
    Filed: March 5, 2009
    Publication date: July 9, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Sachie Tone, Hiroyuki Uno, Naoki Tanahashi, Naoki Nishida
  • Publication number: 20080130743
    Abstract: When data is an HDTV signal, a buffer memory is used as two banks and pipeline processing is performed. When data is an SDTV signal, on the other hand, the buffer memory is used as a bankless buffer memory, and the pipeline processing is not performed.
    Type: Application
    Filed: November 28, 2007
    Publication date: June 5, 2008
    Applicants: SANYO ELECTRIC CO., LTD., SANYO SEMICONDUCTOR CO., LTD.
    Inventors: Tetsuo Kosuge, Kensuke Fujimura, Naoki Tanahashi
  • Patent number: 7378912
    Abstract: A cascode connection circuit includes a first field effect transistor (FET) which has a source terminal and a drain terminal, the source terminal being connected to ground; a second FET which has a source terminal and a gate terminal, the source terminal being connected to the drain terminal of the first FET; and a first resistor and a first capacitor connected in series between the source terminal of the first FET and the gate terminal of the second FET. The first FET and the second FET are cascode-connected to each other. The product of the resistance of the first resistor and the capacitance of the first capacitor does not exceed 0.1 times the period of an operating frequency of the circuit.
    Type: Grant
    Filed: May 22, 2006
    Date of Patent: May 27, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Naoki Tanahashi, Akira Inoue
  • Publication number: 20080100359
    Abstract: There is disclosed a clock regeneration circuit having a PCR buffer including a register which buffers a PCR extracted from a transmission signal, a counter which counts a reception side reference clock CKr, an STC buffer including a register which buffers a counted value of the counter, and a CPU which generates a signal indicating a difference between a transmission side reference clock and the reception side reference clock CKr based on values held in the PCR buffer and the STC buffer. If, at this point, a new PCR is input before the values held in the PCR buffer and the STC buffer are read by the CPU, the PCR buffer and the STC buffer are not updated.
    Type: Application
    Filed: October 26, 2007
    Publication date: May 1, 2008
    Applicants: SANYO ELECTRIC CO., LTD., SANYO SEMICONDUCTOR CO., LTD.
    Inventors: Kensuke Fujimura, Naoki Tanahashi
  • Patent number: 7334769
    Abstract: A member for a resin molding machine wherein it has a face contacting with a molten resin, and at least a part of the face is covered with a film of an oxide of a base material of the face or a component contained in the base material. The use of the member in the molding of a resin allows the prevention of the incorporation of a contaminant associated with the deterioration of a melt of the resin into a molded article from the resin.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: February 26, 2008
    Inventors: Tadahiro Ohmi, Masafumi Kitano, Naoki Tanahashi