Patents by Inventor Naoko Kodama
Naoko Kodama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200294931Abstract: A back alignment mark on a surface of a semiconductor substrate is detected and a resist mask patterned into a circuit pattern corresponding to a surface element structure is formed on a back of the semiconductor substrate. Detection of the back alignment mark is performed by using a detector opposing the back of the semiconductor substrate and measuring contrast based on the intensity of reflected infrared light irradiated from the back of the semiconductor substrate. The back alignment mark is configured by a step formed by the surface of the semiconductor substrate and bottoms of trenches formed from the surface of the semiconductor substrate. A polysilicon film is embedded in the trenches. The back alignment mark has, for example, a cross-shaped planar layout in which three or more trenches are disposed in a direction parallel to the surface of the semiconductor substrate.Type: ApplicationFiled: May 28, 2020Publication date: September 17, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventor: Naoko KODAMA
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Publication number: 20200258998Abstract: A method of manufacturing a semiconductor device that includes a semiconductor element. The method includes the steps of providing a semiconductor substrate of a first conductivity type, forming an element structure of the semiconductor element, at a first main surface of the semiconductor substrate, forming a first protective film at a second main surface of the semiconductor substrate, implanting ions in the semiconductor substrate from the second main surface having the first protective film formed thereon, and removing the first protective film.Type: ApplicationFiled: April 27, 2020Publication date: August 13, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventor: Naoko KODAMA
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Publication number: 20200194562Abstract: Provided is a semiconductor device including a semiconductor substrate; a hydrogen donor that is provide inside the semiconductor substrate in a depth direction, has a doping concentration that is higher than a doping concentration of a dopant of the semiconductor substrate, has a doping concentration distribution peak at a first position that is a predetermined distance in the depth direction of the semiconductor substrate away from one main surface of the semiconductor substrate, and has a tail of the doping concentration distribution where the doping concentration is lower than at the peak, farther on the one main surface side than where the first position is located; and a crystalline defect region having a crystalline defect density center peak at a position shallower than the first position, in the depth direction of the semiconductor substrate.Type: ApplicationFiled: February 24, 2020Publication date: June 18, 2020Inventors: Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Misaki MEGURO, Motoyoshi KUBOUCHI, Naoko KODAMA
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Patent number: 10629441Abstract: A photoresist is applied to a front surface of a semiconductor wafer rotating at a predetermined rotational speed and a photoresist film having a predetermined thickness is formed and dried. Next, a chemical is dripped while the semiconductor wafer is rotated at the predetermined rotational speed or less, whereby an edge part of the photoresist film is dissolved and removed by the chemical while the predetermined thickness of the photoresist film is maintained. A predetermined pattern is transferred to the photoresist film by exposure and development. After the development, without performing UV curing or post-bake, the photoresist film is used as a mask and helium irradiation having a range of 8 ?m or greater from the front surface of the semiconductor wafer is performed. Thus, a predetermined impurity may be implanted with good positioning accuracy in a predetermined region, using the photoresist film as a mask and cost may be reduced.Type: GrantFiled: November 27, 2018Date of Patent: April 21, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventor: Naoko Kodama
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Publication number: 20200058596Abstract: A back alignment mark on a surface of a semiconductor substrate is detected and a resist mask patterned into a circuit pattern corresponding to a surface element structure is formed on a back of the semiconductor substrate. Detection of the back alignment mark is performed by using a detector opposing the back of the semiconductor substrate and measuring contrast based on the intensity of reflected infrared light irradiated from the back of the semiconductor substrate. The back alignment mark is configured by a step formed by the surface of the semiconductor substrate and bottoms of trenches formed from the surface of the semiconductor substrate. A polysilicon film is embedded in the trenches. The back alignment mark has, for example, a cross-shaped planar layout in which three or more trenches are disposed in a direction parallel to the surface of the semiconductor substrate.Type: ApplicationFiled: October 24, 2019Publication date: February 20, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventor: Naoko KODAMA
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Patent number: 10553436Abstract: A method of manufacturing a semiconductor device, including providing a semiconductor wafer, forming a photoresist film on a main surface of the semiconductor wafer, forming a first mask pattern and a second mask pattern on the photoresist film, selectively removing portions of the photoresist film according to the first and second mask patterns, to respectively form a first opening and a second opening in the photoresist film, a position of the second opening differing from that of the first opening, and performing ion implantation of an impurity into the semiconductor wafer, using the photoresist film having the first and second openings formed therein as a mask.Type: GrantFiled: January 30, 2018Date of Patent: February 4, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventor: Naoko Kodama
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Patent number: 10490508Abstract: A back alignment mark on a surface of a semiconductor substrate is detected and a resist mask patterned into a circuit pattern corresponding to a surface element structure is formed on a back of the semiconductor substrate. Detection of the back alignment mark is performed by using a detector opposing the back of the semiconductor substrate and measuring contrast based on the intensity of reflected infrared light irradiated from the back of the semiconductor substrate. The back alignment mark is configured by a step formed by the surface of the semiconductor substrate and bottoms of trenches formed from the surface of the semiconductor substrate. A polysilicon film is embedded in the trenches. The back alignment mark has, for example, a cross-shaped planar layout in which three or more trenches are disposed in a direction parallel to the surface of the semiconductor substrate.Type: GrantFiled: October 22, 2018Date of Patent: November 26, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventor: Naoko Kodama
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Publication number: 20190348289Abstract: A photoresist is applied to a front surface of a semiconductor wafer rotating at a predetermined rotational speed and a photoresist film having a predetermined thickness is formed and dried. Next, a chemical is dripped while the semiconductor wafer is rotated at the predetermined rotational speed or less, whereby an edge part of the photoresist film is dissolved and removed by the chemical while the predetermined thickness of the photoresist film is maintained. A predetermined pattern is transferred to the photoresist film by exposure and development. After the development, without performing UV curing or post-bake, the photoresist film is used as a mask and helium irradiation having a range of 8 ?m or greater from the front surface of the semiconductor wafer is performed. Thus, a predetermined impurity may be implanted with good positioning accuracy in a predetermined region, using the photoresist film as a mask and cost may be reduced.Type: ApplicationFiled: July 26, 2019Publication date: November 14, 2019Applicant: FUJI ELECTRIC CO., LTD.Inventor: Naoko KODAMA
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Publication number: 20190206803Abstract: A back alignment mark on a surface of a semiconductor substrate is detected and a resist mask patterned into a circuit pattern corresponding to a surface element structure is formed on a back of the semiconductor substrate. Detection of the back alignment mark is performed by using a detector opposing the back of the semiconductor substrate and measuring contrast based on the intensity of reflected infrared light irradiated from the back of the semiconductor substrate. The back alignment mark is configured by a step formed by the surface of the semiconductor substrate and bottoms of trenches formed from the surface of the semiconductor substrate. A polysilicon film is embedded in the trenches. The back alignment mark has, for example, a cross-shaped planar layout in which three or more trenches are disposed in a direction parallel to the surface of the semiconductor substrate.Type: ApplicationFiled: October 22, 2018Publication date: July 4, 2019Applicant: FUJI ELECTRIC CO., LTD.Inventor: Naoko KODAMA
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Publication number: 20190139772Abstract: A photoresist is applied to a front surface of a semiconductor wafer rotating at a predetermined rotational speed and a photoresist film having a predetermined thickness is formed and dried. Next, a chemical is dripped while the semiconductor wafer is rotated at the predetermined rotational speed or less, whereby an edge part of the photoresist film is dissolved and removed by the chemical while the predetermined thickness of the photoresist film is maintained. A predetermined pattern is transferred to the photoresist film by exposure and development. After the development, without performing UV curing or post-bake, the photoresist film is used as a mask and helium irradiation having a range of 8 ?m or greater from the front surface of the semiconductor wafer is performed. Thus, a predetermined impurity may be implanted with good positioning accuracy in a predetermined region, using the photoresist film as a mask and cost may be reduced.Type: ApplicationFiled: November 27, 2018Publication date: May 9, 2019Applicant: JUJI ELECTRIC CO., LTD.Inventor: Naoko KODAMA
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Publication number: 20180269063Abstract: A method of manufacturing a semiconductor device, including providing a semiconductor wafer, forming a photoresist film on a main surface of the semiconductor wafer, forming a first mask pattern and a second mask pattern on the photoresist film, selectively removing portions of the photoresist film according to the first and second mask patterns, to respectively form a first opening and a second opening in the photoresist film, a position of the second opening differing from that of the first opening, and performing ion implantation of an impurity into the semiconductor wafer, using the photoresist film having the first and second openings formed therein as a mask.Type: ApplicationFiled: January 30, 2018Publication date: September 20, 2018Applicant: FUJI ELECTRIC CO., LTD.Inventor: Naoko KODAMA
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Patent number: 8435865Abstract: A method of manufacturing a super-junction semiconductor device facilitates suppressing the shape change caused in the alignment mark in the upper epitaxial layer transferred from the alignment mark in the lower epitaxial layer to be small enough to detect the transferred alignment mark with a few additional steps, even if the epitaxial layer growth rate is high. Alignment mark groups, each formed of trenches including parallel linear planar patterns and used in any of the multiple epitaxial layer growth cycles, are formed collectively on a scribe line between semiconductor chip sections; and the mesa region width between the trenches in each alignment mark group indicated by the distance between the single-headed arrows, facing opposite to each other and drawn in alignment mark groups is set to be one fourth of the designed total epitaxial layer thickness at the end of each epitaxial layer growth cycle or longer.Type: GrantFiled: May 18, 2011Date of Patent: May 7, 2013Assignee: Fuji Electric Co., Ltd.Inventor: Naoko Kodama
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Publication number: 20110287617Abstract: A method of manufacturing a super-junction semiconductor device facilitates suppressing the shape change caused in the alignment mark in the upper epitaxial layer transferred from the alignment mark in the lower epitaxial layer to be small enough to detect the transferred alignment mark with a few additional steps, even if the epitaxial layer growth rate is high. Alignment mark groups, each formed of trenches including parallel linear planar patterns and used in any of the multiple epitaxial layer growth cycles, are formed collectively on a scribe line between semiconductor chip sections; and the mesa region width between the trenches in each alignment mark group indicated by the distance between the single-headed arrows, facing opposite to each other and drawn in alignment mark groups is set to be one fourth of the designed total epitaxial layer thickness at the end of each epitaxial layer growth cycle or longer.Type: ApplicationFiled: May 18, 2011Publication date: November 24, 2011Applicant: FUJI ELECTRIC CO., LTD.Inventor: Naoko KODAMA
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Publication number: 20110171738Abstract: The present invention provides a method for estimating an amount of immobilized probes, including the successive steps of: providing a sample on a substrate to form one or more spots of the sample on the substrate, the sample containing particulate substances and probes in a predetermined ratio, the probes being reactive with a predetermined target; measuring the number of the particulate substances contained in at least one of the spots; and estimating the amount of the probes contained in the at least one of the spots from the thus measured number of the particulate substances.Type: ApplicationFiled: January 5, 2011Publication date: July 14, 2011Applicant: RIKENInventors: Hiroyoshi AOKI, Yutaka YAMAGATA, Naoko KODAMA
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Publication number: 20040103056Abstract: By using a client managing system, optimization of charge to be collected from a client and assortment of the client are carried out on the basis of information obtained by analyzing information on the payment of consideration paid by the client, and the information thus obtained is disclosed to investors, thereby providing a technique of advantageously securitizing assets to raise funds needed for the plant and equipment investment on enterprise equipment or communication equipment.Type: ApplicationFiled: March 8, 2001Publication date: May 27, 2004Inventors: Yuichi Ikeda, Yasuhiro Kobayashi, Masayuki Tani, Keisuke Ogawa, Hideo Nakazawa, Hiroshi Hanyu, Naoko Kodama
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Patent number: 5963379Abstract: A compact and inexpensive zoom lens having a variable power ratio of two or greater and reduced total length of the lens system. The compact zoom lens comprises a first lens group having a negative refractive power and a second lens group having a positive refractive power in this order from the object side. The first lens group includes a negative lens component L.sub.1 and a positive lens L.sub.2 in this order from the object side. The second lens group includes a positive lens component L.sub.3, a negative lens L.sub.4 and a positive lens L.sub.5 positioned in this order from the object side with an air gap between them. When the focal legth of the whole lens system is varied from its wide-angle end to the telephoto end, the second lens group is being moved toward the object side from the image side. This zoom lens satisfies the conditions0.7<f.sub.2 /F.sub.W <1.4-1.7<f.sub.1 /F.sub.W <-1.0where f.sub.1 is the focal length of the first lens group, f.sub.Type: GrantFiled: December 12, 1997Date of Patent: October 5, 1999Assignee: Nikon CorporationInventors: Susumo Sato, Naoko Kodama
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Patent number: 5847875Abstract: A large diameter zoom lens includes a large zooming ratio which is capable of faster auto focussing (AF). A zoom lens, having a zooming ratio of not less than 1.5, includes, in order from an object side to an image side, a first lens group having negative refractive power, a second lens group having positive refractive power, a third lens group having positive refractive power, a fourth lens group having negative refractive power and a fifth lens group having positive refractive power, wherein during zooming from a maximum wide-angle state to a maximum telephoto state, the lateral magnification of the second lens group is always positive and decreases monotonically, and predetermined conditional equations are satisfied.Type: GrantFiled: October 21, 1997Date of Patent: December 8, 1998Assignee: Nikon CorporationInventors: Naoko Kodama, Koichi Ohshita
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Patent number: 5835272Abstract: A zoom lens is provided such that it has a high image quality over its entire zooming range, an angle of view of 70.degree. or greater at a wide-angle end, a zooming ratio of 2.5 or greater, and an F-number of about 2.8 throughout the entire range. The zoom lens has a first lens group having a negative refractive power, a second lens group having a positive refractive power, a third lens group having a negative refractive power, and a fourth lens group having a positive refractive power. The first, second, third and fourth lens groups are arranged in order from the object side of the zoom lens. The zoom lens also has an aperture stop. The third lens group has at least one concave aspheric surface. During zooming, at least the first, second and fourth lens groups are moved along the optical axis. The zoom lens satisfies the condition 0.5<(A.sub.w /l.sub.w)/(A.sub.t /l.sub.t)<1 when A.sub.Type: GrantFiled: July 23, 1997Date of Patent: November 10, 1998Assignee: Nikon CorporationInventor: Naoko Kodama
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Patent number: 5774267Abstract: A large diameter zoom lens includes a large zooming ratio which is capable of faster auto focussing (AF). A zoom lens, having a zooming ratio of not less than 1.5, includes, in order from an object side to an image side, a first lens group having negative refractive power, a second lens group having positive refractive power, a third lens group having positive refractive power, a fourth lens group having negative refractive power and a fifth lens group having positive refractive power, wherein during zooming from a maximum wide-angle state to a maximum telephoto state, the lateral magnification of the second lens group is always positive and decreases monotonically, and predetermined conditional equations are satisfied.Type: GrantFiled: October 18, 1996Date of Patent: June 30, 1998Assignee: Nikon CorporationInventors: Naoko Kodama, Koichi Ohshita
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Patent number: 5764419Abstract: A telecentric zoom lens is disclosed that comprises, in order from the magnifying side to the reducing side on an optical axis: first, second, third, fourth, and fifth lens groups having a positive, negative, negative, positive, and positive focal length, respectively. An open aperture is axially disposed between the third and fourth lens groups at the magnifying-side focal position of the combined fourth and fifth lens groups. When zooming from the maximum wide-angle state to the maximum telephoto state, the first, fourth, and fifth lens groups are stationary, while the second lens group axially moves linearly toward the reducing side and the third lens group axially moves along a convex path toward the magnifying side.Type: GrantFiled: February 28, 1996Date of Patent: June 9, 1998Assignee: Nikon CorporationInventors: Naoko Kodama, Masayuki Aoki