Patents by Inventor Naoshi Adachi

Naoshi Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8568537
    Abstract: An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film formed on the gettering epitaxial film, in which the gettering epitaxial film has a given carbon atom concentration and carbon atoms are existent between its silicon lattices.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: October 29, 2013
    Assignee: Sumco Corporation
    Inventors: Naoshi Adachi, Tamio Motoyama
  • Patent number: 8105078
    Abstract: A heat treatment jig for semiconductor silicon substrates is configured such that a cristobalitized oxide film is formed in a region where the cristobalitized oxide film is in contact with a silicon substrate backside. When said heat treatment jig is used, generation of a slip can be prevented during heat treatment. In the case where the heat treatment jig is used in combination with a shielding plate, particles are further prevented from adhering to the silicon substrate surface to maintain quality characteristics of the semiconductor silicon substrate at a higher level, and device production yield can largely be improved. The heat treatment jig can easily be manufactured by introducing a cristobalitization promoting agent to a surface or in the vicinity of a surface of the heat treatment jig, performing the heat treatment at temperatures in the range of 1000 to 1380° C., and repeating the introduction of the cristobalitization promoting agent and the heat treatment.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: January 31, 2012
    Assignee: Sumco Corporation
    Inventor: Naoshi Adachi
  • Publication number: 20110298094
    Abstract: An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film formed on the gettering epitaxial film, in which the gettering epitaxial film has a given carbon atom concentration and carbon atoms are existent between its silicon lattices.
    Type: Application
    Filed: August 22, 2011
    Publication date: December 8, 2011
    Applicant: SUMCO CORPORATION
    Inventors: Naoshi ADACHI, Tamio MOTOYAMA
  • Patent number: 8030184
    Abstract: An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film formed on the gettering epitaxial film, in which the gettering epitaxial film has a given carbon atom concentration and carbon atoms are existent between its silicon lattices.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: October 4, 2011
    Assignee: Sumco Corporation
    Inventors: Naoshi Adachi, Tamio Motoyama
  • Publication number: 20100022066
    Abstract: A method for producing a high-resistance SIMOX wafer wherein oxygen diffused inside of a wafer by the heat treatment at a high temperature in an oxidizing atmosphere can be reduced to suppress the occurrence of thermal donor. In one embodiment, a heating-rapid cooling treatment is conducted after the heat treatment at a high temperature in an oxidizing atmosphere to implant vacancies from a surface of a wafer into an interior thereof to thereby easily precipitate oxygen diffused inside the wafer during the heat treatment.
    Type: Application
    Filed: July 16, 2009
    Publication date: January 28, 2010
    Applicant: SUMCO CORPORATION
    Inventors: Yoshiro Aoki, Naoshi Adachi
  • Publication number: 20090321874
    Abstract: A small amount of oxygen is ion-implanted in a wafer surface layer, and then heat treatment is performed so as to form an incomplete implanted oxide film in the surface layer. Thereby, wafer cost is reduced; a pit is prevented from forming in a surface of an epitaxial film; and a slip is prevented from forming in an external peripheral portion of a wafer.
    Type: Application
    Filed: June 12, 2009
    Publication date: December 31, 2009
    Applicant: SUMCO CORPORATION
    Inventors: Yoshiro AOKI, Naoshi ADACHI, Akihiko ENDO, Yoshihisa NONOGAKI
  • Patent number: 7560363
    Abstract: A manufacturing method for a SIMOX substrate for obtaining a SIMOX substrate by subjecting a silicon substrate having oxygen ions implanted thereinto by heat treatment at 1300 to 1350° C. in an atmosphere of a gas mixture of argon and oxygen, the method includes: performing a pre-heat-treatment to the silicon substrate for five minutes to four hours within the temperature range of 1000° C. to 1280° C. in an atmosphere of inert gas, reducing gas, or a gas mixture of inert gas and reducing gas, after the oxygen ions are implanted and before the heat treatment is performed.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: July 14, 2009
    Assignee: Sumco Corporation
    Inventors: Naoshi Adachi, Yukio Komatsu
  • Publication number: 20090152685
    Abstract: An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film formed on the gettering epitaxial film, in which the gettering epitaxial film has a given carbon atom concentration and carbon atoms are existent between its silicon lattices.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 18, 2009
    Applicant: SUMCO CORPORATION
    Inventors: Naoshi Adachi, Tamio Motoyama
  • Patent number: 7442038
    Abstract: This invention provides a heat treatment jig for semiconductor silicon substrates, which, in respective heat treatment of hydrogen annealing or argon annealing, can handle enlargement of the diameter of wafers to be treated and can also prevent slipping and dislocations that occur as a result of the stress caused by the weight of the wafer itself or the deflection of the heat treatment jig itself.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: October 28, 2008
    Assignee: Sumitomo Mitsubishi Silicaon Corporation
    Inventor: Naoshi Adachi
  • Publication number: 20080251879
    Abstract: Heavy metal contamination in a device process can be efficiently trapped in a substrate. The present invention comprises: a step of implanting oxygen ions into a wafer; a step of performing a first heat treatment to the wafer in a predetermined gas atmosphere at 1300 to 1390° C. to form a buried oxide layer and also form an SOI layer on a wafer front surface, the wafer before the oxygen ion implantation having an oxygen concentration of 8×1017 to 1.8×1018 atoms/cm3 (old ASTM), the buried oxide layer being formed over the entire wafer surface, the present invention being characterized by including: a step of performing a second heat treatment to the wafer subjected to the first heat treatment in a predetermined gas atmosphere at 400 to 900° C.
    Type: Application
    Filed: July 11, 2005
    Publication date: October 16, 2008
    Inventors: Naoshi Adachi, Yukio Komatsu
  • Publication number: 20080090384
    Abstract: A manufacturing method for a SIMOX substrate for obtaining a SIMOX substrate by subjecting a silicon substrate having oxygen ions implanted thereinto by heat treatment at 1300 to 1350° C. in an atmosphere of a gas mixture of argon and oxygen, the method includes: performing a pre-heat-treatment to the silicon substrate for five minutes to four hours within the temperature range of 1000° C. to 1280° C. in an atmosphere of inert gas, reducing gas, or a gas mixture of inert gas and reducing gas, after the oxygen ions are implanted and before the heat treatment is performed.
    Type: Application
    Filed: July 19, 2005
    Publication date: April 17, 2008
    Inventors: Naoshi Adachi, Yukio Komatsu
  • Publication number: 20080044669
    Abstract: It is possible to efficiently capture heavy metal contamination due to ion implantation or high-temperature heat treatment in a bulk layer. It is characterized that the present method comprises: a step of implanting oxygen ions into a wafer 11; a step of applying first heat treatment to a wafer under a predetermined gas atmosphere at 1,300 to 1,390° C. and forming a buried oxide layer 12 and an SOI layer 13 by applying first heat treatment to a wafer at 1,300 to 1390° C.; a second heat treatment step in which a wafer before oxygen ions are implanted has an oxygen concentration of 9×1017 to 1.8×1018 atoms/cm3 (old ASTM) and a buried oxide layer is formed entirely or locally in the wafer to form oxygen precipitate nuclei 14b formed in the wafer before the oxygen ion implantation step or between the oxygen ion implantation step and the first heat treatment step; and a third heat treatment step of growing oxygen precipitate nuclei 14b formed in the wafer so as to be oxygen precipitates 14c.
    Type: Application
    Filed: May 19, 2005
    Publication date: February 21, 2008
    Inventor: Naoshi Adachi
  • Patent number: 7331780
    Abstract: A heat treatment jig by the invention comprising: the diameter of a disk-type structure being 60% or more of that of loaded semiconductor wafers; the thickness being 1.0 mm or more but 10 mm or less; the surface roughness Ra of 0.1 ?m or more but 100 ?m or less at a contacting surface with the wafers; and the surface planarity being specifically controlled in the concentric direction as well as in the diametrical direction, otherwise in place of above planarity, comprising a controlled maximum height in such a way that the maximum height is obtained by the flatness measurement at the multiple positions and the difference between said maximum height and the hypothetical-average-height-plane thus set is 50 ?m or less, can reduce the slip generation due to the close adhesion of the wafers and the jig.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: February 19, 2008
    Assignee: Sumco Corporation
    Inventor: Naoshi Adachi
  • Patent number: 7329947
    Abstract: When a two-division structure heat treatment jig for semiconductor substrate that includes a silicon first jig that comes into direct contact with a semiconductor substrate that is heat treated and supports the semiconductor substrate, and a second jig (holder) that holds the first jig and is mounted on a heat treatment boat is adopted as a heat treatment boat of a vertical heat treatment furnace, the stress concentrated during the heat treatment on a particular portion of the semiconductor substrate can be reduced; in the case of a semiconductor substrate large in the tare stress and having an outer shape of 300 mm being heat treated, or even in the case of the heat treatment being carried out under very high temperature conditions, the slips can be suppressed from occurring. The present invention can be widely applied as a stable heat treatment method of semiconductor substrates.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: February 12, 2008
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Naoshi Adachi, Kazushi Yoshida, Yoshiro Aoki
  • Publication number: 20070184397
    Abstract: A heat treatment jig for semiconductor silicon substrates is configured such that a cristobalitized oxide film is formed in a region where the cristobalitized oxide film is in contact with a silicon substrate backside. When said heat treatment jig is used, generation of a slip can be prevented during heat treatment. In the case where the heat treatment jig is used in combination with a shielding plate, particles are further prevented from adhering to the silicon substrate surface to maintain quality characteristics of the semiconductor silicon substrate at a higher level, and device production yield can largely be improved. The heat treatment jig can easily be manufactured by introducing a cristobalitization promoting agent to a surface or in the vicinity of a surface of the heat treatment jig, performing the heat treatment at temperatures in the range of 1000 to 1380° C., and repeating the introduction of the cristobalitization promoting agent and the heat treatment.
    Type: Application
    Filed: February 6, 2007
    Publication date: August 9, 2007
    Inventor: Naoshi Adachi
  • Patent number: 7253082
    Abstract: A plurality of recessed portions having different depths is formed in a surface of the active layer wafer or in a bonding surface of the supporting substrate wafer. Those wafers are bonded to each other with an insulation film interposed therebetween. This allows a cavity of higher dimensional precision to be buried therein. A plurality of cavities may be formed simultaneously in a plurality of locations within the plane of the substrate, which allows the thickness of the SOI layer to be set arbitrarily. Accordingly, such a semiconductor device can be fabricated easily in which a MOS type element and a bipolar element are formed on the same chip in a mixed manner.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: August 7, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Naoshi Adachi, Masahiko Nakamae
  • Patent number: 7210925
    Abstract: A heat treatment jig for supporting silicon semiconductor substrates by contacting, being loaded onto a heat treatment boat in a vertical heat treatment furnace, comprises; the configuration of a ring or a disc structure with the wall thickness between 1.5 and 6.0 mm; the deflection displacement of 100 ?m or less at contact region in loaded condition; the outer diameter which is 65% or more of the diameter of said substrate; and the surface roughness (Ra) of between 1.0 and 100 ?m at the contact region. The use of said jig enables to effectively retard the slip generation and to avoid the growth hindrance of thermally oxidized film at the back surface of said substrate, diminishing the surface steps causing the defocus in photolithography step in device fabrication process, thereby enabling to maintain high quality of silicon semiconductor substrates and to substantially enhance the device yield.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: May 1, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventor: Naoshi Adachi
  • Publication number: 20070087299
    Abstract: This invention provides a heat treatment jig for semiconductor silicon substrates, which, in respective heat treatment of hydrogen annealing or argon annealing, can handle enlargement of the diameter of wafers to be treated and can also prevent slipping and dislocations that occur as a result of the stress caused by the weight of the wafer itself or the deflection of the heat treatment jig itself.
    Type: Application
    Filed: August 11, 2006
    Publication date: April 19, 2007
    Applicant: Sumitomo Mitsubishi Silicon Corporation
    Inventor: Naoshi Adachi
  • Patent number: 7163393
    Abstract: This invention provides a heat treatment jig for semiconductor silicon substrates, which, in respective heat treatment of hydrogen annealing or argon annealing, can handle enlargement of the diameter of wafers to be treated and can also prevent slipping and dislocations that occur as a result of the stress caused by the weight of the wafer itself or the deflection of the heat treatment jig itself.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: January 16, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventor: Naoshi Adachi
  • Publication number: 20060189169
    Abstract: A method is provided for the heat treatment of low oxygen concentration silicon wafers obtained from a silicon single crystal produced by the Czochralski process. The method comprises high-temperature oxidation heat treatment for the formation of a high oxygen concentration region under the wafer surface and the subsequent oxygen precipitation heat treatment. The high-temperature oxidation heat treatment can cause inward diffusion of oxygen from the wafer surface to form a region increased in oxygen concentration under the wafer surface, and the subsequent oxygen precipitation heat treatment can form a DZ layer on the wafer surface and stably form oxygen precipitates optimal in size within the wafer at a high density, so that excellent gettering effects can be produced.
    Type: Application
    Filed: February 17, 2006
    Publication date: August 24, 2006
    Inventors: Naoshi Adachi, Yukio Komatsu