Abstract: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.

Abstract: A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines and bit lines that meet at right angles with each other, thereby enabling the storage capacity portions to be arranged very densely and a sufficiently large capacity to be maintained with very small cell areas. Since the storage capacity portions are formed even on the bit lines, the bit lines are shielded, so that the capacity decreases between the bit lines and, hence, the memory array noise decreases. It is also possible to design the charge storage capacity portion so that a part of thereof has a form of a wall substantially vertical to the substrate in order to increase the capacity.

Abstract: In a complete CMOS SRAM having a memory cell composed of six MISFETs formed over a substrate, a capacitor element having a stack structure is formed of a lower electrode covering the memory cell, an upper electrode, and a capacitor insulating film (dielectric film) interposed between the lower electrode and the upper electrode. One electrode (the lower electrode) of the capacitor element is connected to one storage node of a flip-flop circuit, and the other electrode (the upper electrode) is connected to the other storage node. As a result, the storage node capacitance of the memory cell of the SRAM is increased to improve the soft error resistance.

Abstract: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.

Abstract: A halogen lamp of a 12V type including: a glass part, a portion of which is a light emitting portion having a space therein and the rest of which is a sealing portion, both portions being made of quartz glass; an infrared reflective coating formed to cover an outer surface of the glass part; a filament which, supported by the sealing portion, is provided in the inner space of the light emitting portion; a molybdenum foil which is embedded in the sealing portion and is electrically connected to the filament; and a power supply line, one end of which is connected to the molybdenum foil, the other end exposed to outside. The halogen lamp satisfies 450 mm2≦Sb<650 mm2 and Se≧−0.35Sb+520, where Sb and Se designate outer surface areas of the light emitting portion and the sealing portion, respectively.

Abstract: In a complete CMOS SRAM having a memory cell composed of six MISFETs formed over a substrate, a capacitor element having a stack structure is formed of a lower electrode covering the memory cell, an upper electrode, and a capacitor insulating film (dielectric film) interposed between the lower electrode and the upper electrode. One electrode (the lower electrode) of the capacitor element is connected to one storage node of a flip-flop circuit, and the other electrode (the upper electrode) is connected to the other storage node. As a result, the storage node capacitance of the memory cell of the SRAM is increased to improve the soft error resistance.

Abstract: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.

Abstract: In a complete CMOS SRAM having a memory cell composed of six MISFETs formed over a substrate, a capacitor element having a stack structure is formed of a lower electrode covering the memory cell, an upper electrode, and a capacitor insulating film (dielectric film) interposed between the lower electrode and the upper electrode. One electrode (the lower electrode) of the capacitor element is connected to one storage node of a flip-flop circuit, and the other electrode (the upper electrode) is connected to the other storage node. As a result, the storage node capacitance of the memory cell of the SRAM is increased to improve the soft error resistance.

Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.

Abstract: The present invention provides a method for forming thin films, wherein thin films with a uniform thickness can be formed on substrates as objects such as spheroids, even when the films are formed by conventional film-formation methods using an incident particle beam coming from a specific direction (e.g., evaporation and sputtering). In the method, thin films are formed on substrates such as spheroids with an incident particle beam coming from a particle source located in a specific direction by performing a spin motion together with a swing motion. The spin motion is a rotation of the substrate at a constant angular velocity about the spheroidal axis. The swing motion is a rotational oscillation of the same substrate for rotationally oscillating the axis at a constant cycle in one surface, where the center of the rotational oscillation is in the vicinity of the midpoint between two focal points on the axis of the spheroid.

Abstract: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.

Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.

Abstract: A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines and bit lines that meet at right angles with each other, thereby enabling the storage capacity portions to be arranged very densely and a sufficiently large capacity to be maintained with very small cell areas. Since the storage capacity portions are formed even on the bit lines, the bit lines are shielded, so that the capacity decreases between the bit lines and, hence, the memory array noise decreases. It is also possible to design the charge storage capacity portion so that a part of thereof has a form of a wall substantially vertical to the substrate in order to increase the capacity.

Abstract: The present invention provides a method for forming thin films, wherein thin films with a uniform thickness can be formed on substrates as objects such as spheroids, even when the films are formed by conventional film-formation methods using an incident particle beam coming from a specific direction (e.g., evaporation and sputtering). In the method, thin films are formed on substrates such as spheroids with an incident particle beam coming from a particle source located in a specific direction by performing a spin motion together with a swing motion. The spin motion is a rotation of the substrate at a constant angular velocity about the spheroidal axis. The swing motion is a rotational oscillation of the same substrate for rotationally oscillating the axis at a constant cycle in one surface, where the center of the rotational oscillation is in the vicinity of the midpoint between two focal points on the axis of the spheroid.

Abstract: When forming an optical thin film on a surface of a bulb of a light source such as an electric lamp or a discharge lamp, a thin film whose interface/surface is less rough is formed on a base having a spheroid shape. When forming a thin film on a base 2 with a spheroid shape, which is disposed in a vacuum chamber 4 of a film-forming device and spun on its rotation axis, an interface or a surface of the thin film is made less rough and the thickness distribution of the thin film is made smaller by setting a sputtering gas pressure to be in a range from 0.04 Pa to 5.

Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.

Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.

Abstract: In a complete CMOS SRAM having a memory cell composed of six MISFETs formed over a substrate, a capacitor element having a stack structure is formed of a lower electrode covering the memory cell, an upper electrode, and a capacitor insulating film (dielectric film) interposed between the lower electrode and the upper electrode. One electrode (the lower electrode) of the capacitor element is connected to one storage node of a flip-flop circuit, and the other electrode (the upper electrode) is connected to the other storage node. As a result, the storage node capacitance of the memory cell of the SRAM is increased to improve the soft error resistance.

Abstract: A static random access memory comprising memory cells each composed of transfer MISFETs controlled by word lines and of a flip-flop circuit made of driver MISFETs and load MISFETs. The top of the load MISFETs is covered with supply voltage lines so that capacitor elements of a stacked structure are formed between the gate electrodes of the load MISFETs and the supply voltage lines.

Abstract: The present invention provides a method for forming thin films, wherein thin films with a uniform thickness can be formed on substrates as objects such as spheroids, even when the films are formed by conventional film-formation methods using an incident particle beam coming from a specific direction (e.g., evaporation and sputtering). In the method, thin films are formed on substrates such as spheroids with an incident particle beam coming from a particle source located in a specific direction by performing a spin motion together with a swing motion. The spin motion is a rotation of the substrate at a constant angular velocity about the spheroidal axis. The swing motion is a rotational oscillation of the same substrate for rotationally oscillating the axis at a constant cycle in one surface, where the center of the rotational oscillation is in the vicinity of the midpoint between two focal points on the axis of the spheroid.