Patents by Inventor Naoto Kuratani

Naoto Kuratani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140367808
    Abstract: A bump-joining pad (61) is provided to the upper surface of a substrate (45), and a bump (70) of a circuit element (43) is connected to the bump-joining pad. The bump-joining pad (61) is connected to a substrate-side joining section (69) provided to a surface facing a cover by a pattern wiring (64). A microphone chip (42) is mounted on the lower surface of the cover (44). A first joining pad (a bonding pad (48), a cover-side joining section (49)) is provided to a surface of the cover (44) facing the substrate (45), and the microphone chip (42) is connected to the first joining pad by a bonding wire (50). The first joining pad of the cover (44) and the substrate-side joining section (69) of the substrate (45) are joined by a conductive material (65), and as a result, the microphone chip (42) and the circuit element (43) are electrically connected.
    Type: Application
    Filed: March 21, 2013
    Publication date: December 18, 2014
    Applicant: OMRON CORPORATION
    Inventors: Naoto Kuratani, Tomofumi Maekawa
  • Patent number: 8890265
    Abstract: A package is formed by vertically stacking a cover and a substrate. A microphone chip is mounted at the top surface of a concave portion provided to the cover, and a circuit element is mounted on the upper surface of the substrate. The microphone chip is connected to a pad on the lower surface of the cover by a bonding wire. The circuit element is connected to a pad on the upper surface of the substrate by a bonding wire. A cover-side joining portion in conduction with the pad on the lower surface of the cover, and a substrate-side joining portion in conduction with the pad on the upper surface of the substrate, are joined by a conductive material. A conductive layer for electromagnetic shielding is embedded inside the cover near the bonding pad and the cover-side joining portion.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: November 18, 2014
    Assignee: OMRON Corporation
    Inventor: Naoto Kuratani
  • Publication number: 20140183671
    Abstract: A package is formed by vertically stacking a cover and a substrate. A microphone chip is mounted at the top surface of a concave portion provided to the cover, and a circuit element is mounted on the upper surface of the substrate. The microphone chip is connected to a pad on the lower surface of the cover by a bonding wire. The circuit element is connected to a pad on the upper surface of the substrate by a bonding wire. A cover-side joining portion in conduction with the pad on the lower surface of the cover, and a substrate-side joining portion in conduction with the pad on the upper surface of the substrate, are joined by a conductive material. A conductive layer for electromagnetic shielding is embedded inside the cover near the bonding pad and the cover-side joining portion.
    Type: Application
    Filed: August 29, 2012
    Publication date: July 3, 2014
    Applicant: OMRON CORPORATION
    Inventor: Naoto Kuratani
  • Patent number: 8620014
    Abstract: A miniaturized microphone maintaining the properties of a microphone chip and achieving a smaller mounting area. The microphone includes a package which includes a first and second member. At least one of the first second members includes a recess. The microphone also includes a circuit element installed on an inner surface of the first member. Additionally, the microphone includes a microphone chip arranged on a surface on an opposite side of an installing surface of the circuit element.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: December 31, 2013
    Assignee: OMRON Corporation
    Inventors: Tomofumi Maekawa, Naoto Kuratani, Tsuyoshi Hamaguchi
  • Publication number: 20130130493
    Abstract: A connecting pad producing method has a first process of projecting an insulating member in a surface of a base material such that a region where a connecting pad is formed is surrounded, a second process of forming a conductive layer in the surface of the base material such that the insulating member is coated with the conductive layer, and a third process of removing the conductive layer with which the insulating member is coated, exposing the insulating member over a whole periphery from the conductive layer, and forming the connecting pad including the conductive layer in a region surrounded by the insulating member. The conductive layer with which the insulating member is coated is removed so as not to reach the conductive layer surface in a region adjacent to the insulating member in the third process.
    Type: Application
    Filed: January 18, 2013
    Publication date: May 23, 2013
    Inventors: Naoto Kuratani, Kazuyuki Ono, Tomofumi Maekawa
  • Patent number: 8338950
    Abstract: An electronic component has a substrate, a die bonding pad provided on an upper surface of the substrate, a semiconductor element bonded onto the die bonding pad by a die bonding resin, a conductive pattern disposed adjacent to the die bonding pad, and a coating member covering the conductive pattern. At least an outer peripheral portion of a surface of the die bonding pad is made of an inorganic material. The inorganic material of the outer peripheral portion is exposed. The die bonding pad and the conductive pattern are separated by an air gap such that the coating member does not come into contact with the die bonding pad.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: December 25, 2012
    Assignee: OMRON Corporation
    Inventors: Kazuyuki Ono, Yoshio Tanaka, Kiyoshi Nakajima, Naoto Kuratani, Tomofumi Maekawa
  • Patent number: 8314485
    Abstract: An electronic component has a board, a semiconductor element mounted on an upper surface of the board, a ground electrode formed in a region surrounding the semiconductor element on the upper surface of the board, a conductive cap that overlaps the board such that the semiconductor element is covered therewith, and a conductive joining member that joins a whole periphery of a lower surface of the conductive cap to the ground electrode. The conductive cap includes a pressing portion on the lower surface thereof The lower surface of the conductive cap and the ground electrode are joined by the conductive joining member on an outer peripheral side of the pressing portion.
    Type: Grant
    Filed: February 16, 2009
    Date of Patent: November 20, 2012
    Assignee: OMRON Corporation
    Inventors: Kazuyuki Ono, Yoshio Tanaka, Kiyoshi Nakajima, Naoto Kuratani, Tomofumi Maekawa
  • Patent number: 8295515
    Abstract: The semiconductor device has a simplified structure which includes a package structure in which a member for mounting a semiconductor element is separate from a member including a signal input/output unit. A microphone package is configured with a cover and a substrate. A microphone chip and a circuit element are adhered and fixed to a top surface of a recess formed in the cover. A plurality of bonding pads are arranged on the lower surface of the cover on the outer side of the recess. A bonding wire is connected to the circuit element and the bonding pad. The substrate includes a signal input/output terminal serving as the signal input/output unit, and a connection electrode, conducted with the signal input/output terminal, is arranged facing the bonding pad on the upper surface of the substrate. The substrate, cover, connection electrode, and bonding pad are joined with a conductive member.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: October 23, 2012
    Assignee: OMRON Corporation
    Inventors: Naoto Kuratani, Kazuyuki Ono, Tomofumi Maekawa
  • Patent number: 8274797
    Abstract: An electronic component has a printed substrate having a die bonding portion, a semiconductor element rigidly bonded to the die bonding portion of the printed substrate by a die bonding resin, and a wire bonding terminal formed by a conductor pattern on the printed substrate that is connected to the semiconductor element by a bonding wire. A groove portion located at a level lower than the conductor pattern of the printed substrate is formed in a region located on at least a die bonding portion side in a region surrounding the wire bonding terminal.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: September 25, 2012
    Assignee: OMRON Corporation
    Inventors: Kazuyuki Ono, Yoshio Tanaka, Kiyoshi Nakajima, Naoto Kuratani, Tomofumi Maekawa
  • Publication number: 20120139111
    Abstract: An electronic component has a substrate, a die bonding pad provided on an upper surface of the substrate, a semiconductor element bonded onto the die bonding pad by a die bonding resin, a conductive pattern disposed adjacent to the die bonding pad, and a coating member covering the conductive pattern. At least an outer peripheral portion of a surface of the die bonding pad is made of an inorganic material. The inorganic material of the outer peripheral portion is exposed. The die bonding pad and the conductive pattern are separated by an air gap such that the coating member does not come into contact with the die bonding pad.
    Type: Application
    Filed: February 17, 2009
    Publication date: June 7, 2012
    Applicant: OMRON CORPORATION
    Inventors: Kazuyuki Ono, Yoshio Tanaka, Kiyoshi Nakajima, Naoto Kuratani, Tomofumi Maekawa
  • Publication number: 20110293126
    Abstract: A miniaturized microphone maintaining the properties of a microphone chip and achieving a smaller mounting area. The microphone includes a package which includes a first and second member. At least one of the first second members includes a recess. The microphone also includes a circuit element installed on an inner surface of the first member. Additionally, the microphone includes a microphone chip arranged on a surface on an opposite side of an installing surface of the circuit element.
    Type: Application
    Filed: May 26, 2011
    Publication date: December 1, 2011
    Applicant: OMRON CORPORATION
    Inventors: Tomofumi Maekawa, Naoto Kuratani, Tsuyoshi Hamaguchi
  • Publication number: 20110293128
    Abstract: A semiconductor device including a package formed by overlapping a cover and a substrate one over the other. A microphone chip is mounted on a top surface of a recess of the cover, and a circuit element is mounted on an upper surface of a recess of the substrate, where the microphone chip is positioned perpendicularly on the upper side of the circuit element. The microphone chip is connected to a bonding pad arranged on the lower surface of the cover by a bonding wire, the circuit element is connected to a bonding pad arranged on the upper surface of the substrate by a bonding wire, and a cover side joining portion conducted to the bonding pad on the lower surface of the cover and a substrate side joining portion conducted t to the bonding pad on the upper surface of the substrate are joined by a conductive material.
    Type: Application
    Filed: May 25, 2011
    Publication date: December 1, 2011
    Applicant: OMRON CORPORATION
    Inventors: Naoto Kuratani, Tomofumi Maekawa
  • Publication number: 20110222717
    Abstract: The semiconductor device has a simplified structure which includes a package structure in which a member for mounting a semiconductor element is separate from a member including a signal input/output unit. A microphone package is configured with a cover and a substrate. A microphone chip and a circuit element are adhered and fixed to a top surface of a recess formed in the cover. A plurality of bonding pads are arranged on the lower surface of the cover on the outer side of the recess. A bonding wire is connected to the circuit element and the bonding pad. The substrate includes a signal input/output terminal serving as the signal input/output unit, and a connection electrode, conducted with the signal input/output terminal, is arranged facing the bonding pad on the upper surface of the substrate. The substrate, cover, connection electrode, and bonding pad are joined with a conductive member.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 15, 2011
    Applicant: OMRON CORPORATION
    Inventors: Naoto Kuratani, Kazuyuki Ono, Tomofumi Maekawa
  • Publication number: 20110217837
    Abstract: A connecting pad producing method has a first process of projecting an insulating member in a surface of a base material such that a region where a connecting pad is formed is surrounded, a second process of forming a conductive layer in the surface of the base material such that the insulating member is coated with the conductive layer, and a third process of removing the conductive layer with which the insulating member is coated, exposing the insulating member over a whole periphery from the conductive layer, and forming the connecting pad including the conductive layer in a region surrounded by the insulating member.
    Type: Application
    Filed: December 22, 2010
    Publication date: September 8, 2011
    Applicant: OMRON CORPORATION
    Inventors: Naoto Kuratani, Kazuyuki Ono, Tomofumi Maekawa
  • Publication number: 20110044017
    Abstract: An electronic component has a printed substrate having a die bonding portion, a semiconductor element rigidly bonded to the die bonding portion of the printed substrate by a die bonding resin, and a wire bonding terminal formed by a conductor pattern on the printed substrate that is connected to the semiconductor element by a bonding wire. A groove portion located at a level lower than the conductor pattern of the printed substrate is formed in a region located on at least a die bonding portion side in a region surrounding the wire bonding terminal.
    Type: Application
    Filed: February 18, 2009
    Publication date: February 24, 2011
    Applicant: OMRON CORPORATION
    Inventors: Kazuyuki Ono, Yoshio Tanaka, Kiyoshi Nakajima, Naoto Kuratani, Tomofumi Maekawa
  • Publication number: 20100200983
    Abstract: An electronic component has a board, a semiconductor element mounted on an upper surface of the board, a ground electrode formed in a region surrounding the semiconductor element on the upper surface of the board, a conductive cap that overlaps the board such that the semiconductor element is covered therewith, and a conductive joining member that joins a whole periphery of a lower surface of the conductive cap to the ground electrode. The conductive cap includes a pressing portion on the lower surface thereof The lower surface of the conductive cap and the ground electrode are joined by the conductive joining member on an outer peripheral side of the pressing portion.
    Type: Application
    Filed: February 16, 2009
    Publication date: August 12, 2010
    Applicant: OMRON CORPORATION
    Inventors: Kazuyuki Ono, Yoshio Tanaka, Kiyoshi Nakajima, Naoto Kuratani, Tomofumi Maekawa
  • Publication number: 20040076763
    Abstract: An apparatus for forming a thin film on an article, wherein a film-forming gas is supplied from a gas supplying device to a vacuum container which can be evacuated by an exhausting device to reduce gas pressure in the container, an electric power is applied from a power applying device to the film-forming gas to produce plasma from the gas in which the thin film is formed on the article disposed in the vacuum container. The gas supplying device includes a gas supply member having a gas supply surface portion opposed to a film-forming surface of the article in the vacuum container. The gas supply member has a plurality of gas supply holes dispersedly formed at the gas supply surface portion. The power applying device includes a power applying electrode in the vacuum container, the electrode being disposed as surface portion opposed to the article.
    Type: Application
    Filed: September 17, 2003
    Publication date: April 22, 2004
    Inventors: Hiroya Kirimura, Kiyoshi Kubota, Masatoshi Onoda, Naoto Kuratani
  • Patent number: 6620247
    Abstract: A method of forming a thin polycrystalline silicon film and a thin film forming apparatus allowing inexpensive formation of a thin polycrystalline silicon film at a relatively low temperature with high productivity. More specifically, a method of forming a thin polycrystalline silicon film and a thin film forming apparatus in which a state of plasma is controlled to achieve an emission intensity ratio of hydrogen atom radicals (H&bgr;) of one or more to the emission intensity of SiH* radicals in the plasma.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: September 16, 2003
    Assignee: Nissin Electric Co., Ltd.
    Inventors: Akinori Ebe, Naoto Kuratani, Eiji Takahashi
  • Publication number: 20020192394
    Abstract: A method of forming a thin polycrystalline silicon film and a thin film forming apparatus allowing inexpensive formation of a thin polycrystalline silicon film at a relatively low temperature with high productivity. More specifically, a method of forming a thin polycrystalline silicon film and a thin film forming apparatus in which a state of plasma is controlled to achieve an emission intensity ratio of hydrogen atom radicals (H&bgr;) of one or more to the emission intensity of SiH* radicals in the plasma.
    Type: Application
    Filed: July 22, 2002
    Publication date: December 19, 2002
    Applicant: Nissin Electric Co., Ltd.
    Inventors: Akinori Ebe, Naoto Kuratani, Eiji Takahashi
  • Patent number: 6447850
    Abstract: A method of forming a thin polycrystalline silicon film and a thin film forming apparatus allowing inexpensive formation of a thin polycrystalline silicon film at a relatively low temperature with high productivity. More specifically, a method of forming a thin polycrystalline silicon film and a thin film forming apparatus in which a state of plasma is controlled to achieve an emission intensity ratio of hydrogen atom radicals (H&bgr;) of one or more to the emission intensity of SiH* radicals in the plasma.
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: September 10, 2002
    Assignee: Nissin Electric Co., Ltd.
    Inventors: Akinori Ebe, Naoto Kuratani, Eiji Takahashi