Patents by Inventor Naoya Sotani

Naoya Sotani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040053452
    Abstract: A method of fabricating a semiconductor device capable of inhibiting a silicon layer from agglomerating in a molten state without patterning the silicon layer is provided. This method of fabricating a semiconductor device comprises steps of forming a silicon layer to be in contact with at least either the upper surface or the lower surface of a first film having a contact angle of not more than about 45° with respect to molten silicon and crystallizing the silicon layer after melting the silicon layer by heating the silicon layer with a continuously oscillated electromagnetic wave.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 18, 2004
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Isao Hasegawa, Naoya Sotani
  • Publication number: 20040053476
    Abstract: A method of fabricating a semiconductor device capable of obtaining a high-density laser beam necessary for crystallizing a semiconductor layer or activating an impurity while miniaturizing a lens group provided on the outlet of an optical fiber member is provided. This method of fabricating a semiconductor device comprises steps of connecting a laser oscillator oscillating a near infrared laser beam and an irradiation optical system with each other through an optical fiber member having a single core part and heating a semiconductor layer by irradiating the near infrared laser beam from the irradiation optical system.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 18, 2004
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Naoya Sotani, Isao Hasegawa
  • Publication number: 20030168968
    Abstract: A layered structure of wire(s) comprising a wiring layer made of a low resistance metal containing aluminum, copper or silver; and an alloy layer made of an intermediate phase containing the low resistance metal and a refractory metal. The refractory metal is molybdenum. There is also formed a layered structure of wire(s) made of an aluminum alloy containing a lanthanoid, wherein a number average crystal grain size is 16.9 nm or more. Crystal grain size may be larger than a mean free path of electrons to provide a layered structure of wire(s) with a reduced resistance.
    Type: Application
    Filed: March 7, 2003
    Publication date: September 11, 2003
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Naoya Sotani, Koji Suzuki, Yoshio Miyai
  • Patent number: 6559034
    Abstract: A method of fabricating a semiconductor device capable of improving productivity by efficiently polycrystallizing an amorphous silicon film is obtained. This method of fabricating a semiconductor device comprises steps of forming an amorphous film on a substrate, forming a conductor film on the substrate, arranging the substrate so that the surface of the conductor film is substantially parallel to an electric field in a waveguide and irradiating the conductor film with an electromagnetic wave thereby making the conductor film generate heat and crystallizing the amorphous film with the heat. Thus, the substrate is arranged to be substantially parallel to the electric field in the waveguide, whereby the absorptivity of the conductor film for the electromagnetic wave is improved and hence the conductor film can be efficiently heated. Thus, crystallization is performed in a short time, thereby improving productivity.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: May 6, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Naoya Sotani
  • Patent number: 6537864
    Abstract: A method of fabricating a semiconductor device capable of fabricating a semiconductor device including a polycrystalline semiconductor film having excellent characteristics with a high yield is provided. A first amorphous semiconductor film is formed on a substrate. A conductive film is formed on the first amorphous semiconductor film. The conductive film is irradiated with an electromagnetic wave such as a high-frequency wave or a YAG laser beam thereby making the conductive film generate heat and converting the first amorphous semiconductor film to a first polycrystalline semiconductor film through the heat. Thus, polycrystallization is homogeneously performed without dispersion through the heat from the conductive film irradiated with the electromagnetic wave. Consequently, an excellent first polycrystalline silicon film can be formed with an excellent yield.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: March 25, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yoichiro Aya, Yukihiro Noguchi, Daisuke Ide, Naoya Sotani
  • Patent number: 6500704
    Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: December 31, 2002
    Assignee: Sanyo Electric Co., Ltd
    Inventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda
  • Publication number: 20020164864
    Abstract: A method of fabricating a semiconductor device capable of improving productivity by efficiently polycrystallizing an amorphous silicon film is obtained. This method of fabricating a semiconductor device comprises steps of forming an amorphous film on a substrate, forming a conductor film on the substrate, arranging the substrate so that the surface of the conductor film is substantially parallel to an electric field in a waveguide and irradiating the conductor film with an electromagnetic wave thereby making the conductor film generate heat and crystallizing the amorphous film with the heat. Thus, the substrate is arranged to be substantially parallel to the electric field in the waveguide, whereby the absorptivity of the conductor film for the electromagnetic wave is improved and hence the conductor film can be efficiently heated. Thus, crystallization is performed in a short time, thereby improving productivity.
    Type: Application
    Filed: March 7, 2002
    Publication date: November 7, 2002
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Naoya Sotani
  • Publication number: 20020059903
    Abstract: A deposition mask capable of relaxing nonuniformity of the thickness of a deposit formed on a substrate and reducing the width of a non-opening part of a mask layer by reducing the thickness of the mask layer is obtained. This deposition mask comprises a mask layer formed by a single silicon thin film and a mask pattern, formed on the mask layer, including a mask opening having an opening width increased toward a deposition source. The mask layer formed by a silicon thin film can be reduced in thickness due to small deflection caused by its own weight. Thus, the width of the non-opening part of the mask layer can be reduced, whereby the width of a part formed with no deposit can be reduced.
    Type: Application
    Filed: September 18, 2001
    Publication date: May 23, 2002
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Isao Hasegawa, Yoshio Miyai, Naoya Sotani
  • Publication number: 20010020702
    Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.
    Type: Application
    Filed: March 22, 2001
    Publication date: September 13, 2001
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda
  • Patent number: 6281057
    Abstract: A method is obtained of manufacturing a semiconductor device including a semiconductor layer with high field-effect mobility. According to the semiconductor device manufacturing method, a semiconductor layer is formed on a substrate and then the semiconductor layer is irradiated with high energy beam. Then, a heat treatment is provided under a temperature condition capable of reducing the surface roughness of the semiconductor layer. The radiation of high energy beam toward the semiconductor layer improves the crystalinity of the semiconductor layer and the subsequent heat treatment reduces the surface roughness of the semiconductor layer to enhance the field-effect mobility of the semiconductor layer.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: August 28, 2001
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yoichiro Aya, Tomoyuki Nouda, Yasuo Nakahara, Naoya Sotani, Hisashi Abe, Hiroki Hamada
  • Publication number: 20010003659
    Abstract: A method is obtained of manufacturing a semiconductor device including a semiconductor layer with high field-effect mobility. According to the semiconductor device manufacturing method, a semiconductor layer is formed on a substrate and then the semiconductor layer is irradiated with high energy beam. Then, a heat treatment is provided under a temperature condition capable of reducing the surface roughness of the semiconductor layer. The radiation of high energy beam toward the semiconductor layer improves the crystalinity of the semiconductor layer and the subsequent heat treatment reduces the surface roughness of the semiconductor layer to enhance the field-effect mobility of the semiconductor layer.
    Type: Application
    Filed: January 9, 1998
    Publication date: June 14, 2001
    Inventors: YOICHIRO AYA, TOMOYUKI NOUDA, YOSUO NAKAHARA, NAOYA SOTANI, HISASHI ABE, HIROKI HAMADA
  • Patent number: 5771110
    Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.
    Type: Grant
    Filed: July 2, 1996
    Date of Patent: June 23, 1998
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda