Abstract: According to the present invention, a flavoring-loaded component for a tobacco product includes a component for a tobacco product and a flavoring composition that is loaded on the component and includes a flavoring and an emulsifier that has an HLB of 1-7.

Abstract: A waveform equalizer includes a filter unit, an error estimation unit, a tap coefficient storage unit, and an update amount calculation unit which includes an intermediate calculation unit and an update amount setting unit. Coefficient update amount ?Ci(n) for an ith tap is calculated according to an equation ?Ci(n)=?i(n)×?×e(n)×x*(n?i) with the multiplication by ?i(n) being performed by the update amount setting unit. Here, 0<?i(n)?1, and ?i(n) is a function f(Ci(n?1)) which monotonically increases with Ci(n?1).

Abstract: A synchronization error occurs when a DTV signal is distorted on a transmission path and this deteriorates demodulation capability. The digital demodulation device and the synchronization detecting method of the invention can correct the synchronization position when determining that a synchronization error has occurred. A controller receives a center tap coefficient, for example, from a waveform equalizer and compares the coefficient with a given center tap coefficient threshold. If the coefficient is smaller than the threshold, the controller determines that a synchronization detector has made a synchronization error and outputs a control signal. The synchronization detector receiving the control signal re-detects a sync signal included in a received signal, to detect a new correct sync signal and thus correct the synchronization error.

Abstract: In a digital broadcast receiving apparatus for amplifying a received modulated digital signal wave with automatically adjusted gain and demodulating the modulated signal wave to a digital signal, a tuner frequency-converts the modulated digital signal wave to generate a first modulated signal. A first automatic gain control amplification unit controls gain of the tuner to make a level of the first modulated signal at a first predetermined level. An A/D converter converts the first modulated signal into a second modulated signal. A demodulator demodulates the second modulated signal to generate a first demodulated digital signal. A second automatic gain control amplifier generates a second demodulated digital signal where frequency fluctuations included in the digital modulated wave are eliminated.

Abstract: In a tap 1 in a shift register of a waveform equalizer, data of an input signal is stored in a data storing FF 111. A tap coefficient computing unit 114 calculates a tap coefficient, which is stored in a tap coefficient storing FF 112 and output to an absolute value computing unit 115. The unit 115 obtains the absolute value of the tap coefficient. A comparator 116 compares the absolute value to a threshold value. A masking unit 117 masks and outputs the data from the data storing FF 111 to a multiplier 113 if the absolute value is smaller than the threshold value, while outputting the data from the data storing FF 111 without change if the absolute value is no less than the threshold value. The multiplier 113 multiplies the data of the input signal by the tap coefficient and outputs a signal to an adder 108.

Abstract: An input signal DT contains a segment synchronization signal compliant with the ATSC standard. A clock multiplication section 111 multiplies a clock CK. A switchable sampling section 112 selects a sample point from among a plurality of timing points that are defined by the multiplied clock, and samples the input signal DT at the selected sample point. Moreover, the switchable sampling section 112 switches sample points from one to another in a synchronization-unestablished state. Once the segment synchronization is established, a synchronization detection device may maintain a synchronization-established state until the field synchronization detection fails, or the synchronization detection device may output a synchronization detection signal after shifting it in the time direction based on a bit error rate RT of the input signal.

Abstract: A digital demodulation apparatus automatically controls gain based on a state of receiving a digital modulated signal. The digital demodulation apparatus amplifies a digital modulated signal wave received through the air with the gain automatically controlled so as to have a predetermined amplitude. In the digital demodulation apparatus, a receive level variation detector detects receive level variation, an amount of noise components of the received digital signal wave. A gain controller 15 controls the gain with a receive level variation adaptive control signal based on the detected receive level variation, the amount of noise components.

Abstract: A waveform equalizer includes a filter unit, an error estimation unit, a tap coefficient storage unit, and an update amount calculation unit which includes an intermediate calculation unit and an update amount setting unit. Coefficient update amount ?Ci(n) for an ith tap is calculated according to an equation ?Ci(n)=?i(n)×?×e(n)×x*(n?i) with the multiplication by ?i(n) being performed by the update amount setting unit. Here, 0<?i(n)?1, and ?i(n) is a function f(Ci(n?1)) which monotonically increases with Ci(n?1).

Abstract: In an automatic gain control amplifier, an RF automatic gain controller controls the gain of a radio frequency signal. A frequency converter frequency-converts the radio frequency signal into an intermediate frequency signal. An IF automatic gain controller controls the gain of the intermediate frequency. A level detector detects a signal level of the gain-controlled intermediate frequency signal, and generates a level signal. An automatic gain control signal generator separately controls, based the level signal, the RF automatic gain controller and the IF automatic gain controller.

Abstract: A waveform equalization controller which combines a follow-up property when the distortion is varied and there is a higher convergence speed at the initial operation, and a higher stability at a low C/N time, and which realizes a high performance and a low cost in a waveform equalizer. The waveform equalization controller controls the updating of a tap coefficient, and comprises a waveform equalizer for reducing a transmission line distortion of an input signal based on a LMS algorithm, an error estimation unit for estimating an error signal from an output signal of the waveform equalizer and outputting the error signal, a step size decision unit for generating a step size having an arbitrary size and outputting the step size, and a coefficient updating amount calculation unit for calculating a tap coefficient updating amount based on the error signal, the step size and a tap coefficient updating data.

Abstract: A waveform equalization apparatus is provided with plural TF (transversal filter) units and plural selectors, and the TF units are connected such that the construction of the whole filter becomes a real component filter when an input signal is a VSB signal while it becomes a complex filter when the input signal is a QAM signal, by switching the inputs of each selector. The waveform equalization apparatus so constructed can waveform-equalize both the VSB signal and the QAM signal, and the circuit scale of the apparatus is reduced.

Abstract: A memory interface device of the present invention includes: an input buffer including a plurality of input areas; an output buffer including a plurality of output areas; and a control section for controlling the input buffer, the output buffer and a single port memory. The control section controls the input buffer and the single port memory so as to transfer a signal stored in one of the input areas of the input buffer to the single port memory while storing an input signal in another one of the input areas of the input buffer. The control section controls the output buffer and the single port memory so as to output as an output signal a signal stored in one of the output areas of the output buffer while transferring a signal stored in the single port memory to another one of the output areas of the output buffer.

Abstract: In a tap 1 in a shift resistor of a waveform equalizer, data of an input signal is stored in a data storing FF 111. A tap coefficient computing unit 114 calculates a tap coefficient, which is stored in a tap coefficient storing FF 112 and output to an absolute value computing unit 115. The unit 115 obtains the absolute value of the tap coefficient. A comparator 116 compares the absolute value to a threshold value. A masking unit 117 masks and outputs the data from the data storing FF 111 to a multiplier 113 if the absolute value is smaller than the threshold value, while outputting the data from the data storing FF 111 without change if the absolute value is no less than the threshold value. The multiplier 113 multiplies the data of the input signal by the tap coefficient and outputs a signal to an adder 108.

Abstract: An input signal DT contains a segment synchronization signal compliant with the ATSC standard. A clock multiplication section 111 multiplies a clock CK. A switchable sampling section 112 selects a sample point from among a plurality of timing points that are defined by the multiplied clock, and samples the input signal DT at the selected sample point. Moreover, the switchable sampling section 112 switches sample points from one to another in a synchronization-unestablished state. Once the segment synchronization is established, a synchronization detection device may maintain a synchronization-established state until the field synchronization detection fails, or the synchronization detection device may output a synchronization detection signal after shifting it in the time direction based on a bit error rate RT of the input signal.

Abstract: A synchronization error occurs when a DTV signal is distorted on a transmission path and this deteriorates demodulation capability. The digital demodulation device and the synchronization detecting method of the invention can correct the synchronization position when determining that a synchronization error has occurred. A controller receives a center tap coefficient, for example, from a waveform equalizer and compares the coefficient with a given center tap coefficient threshold. If the coefficient is smaller than the threshold, the controller determines that a synchronization detector has made a synchronization error and outputs a control signal. The synchronization detector receiving the control signal re-detects a sync signal included in a received signal, to detect a new correct sync signal and thus correct the synchronization error.

Abstract: A memory interface device of the present invention includes: an input buffer including a plurality of input areas; an output buffer including a plurality of output areas; and a control section for controlling the input buffer, the output buffer and a single port memory. The control section controls the input buffer and the single port memory so as to transfer a signal stored in one of the input areas of the input buffer to the single port memory while storing an input signal in another one of the input areas of the input buffer. The control section controls the output buffer and the single port memory so as to output as an output signal a signal stored in one of the output areas of the output buffer while transferring a signal stored in the single port memory to another one of the output areas of the output buffer.

Abstract: A memory interface device of the present invention includes: an input buffer including a plurality of input areas; an output buffer including 8 plurality of output areas; and a control section for controlling the input buffer, the output buffer and a single port memory. The control section controls the input buffer and the single port memory so as to transfer a signal stored in one of the input areas of the input buffer to the single port memory while storing an input signal in another one of the input areas of the input buffer. The control section controls the output buffer and the single port memory so as to output as an output signal a signal stored in one of the output areas of the output buffer while transferring a signal stored in the single port memory to another one of the output areas of the output buffer.

Abstract: A waveform equalization apparatus is provided with plural TF (transversal filter) units and plural selectors, and the TF units are connected such that the construction of the whole filter becomes a real component filter when an input signal is a VSB signal while it becomes a complex filter when the input signal is a QAM signal, by switching the inputs of each selector. The waveform equalization apparatus so constructed can waveform-equalize both the VSB signal and the QAM signal, and the circuit scale of the apparatus is reduced.

Abstract: The decrypting device of this invention includes: a decrypting key generation circuit for generating a decrypting key based on first decrypting key information and second decrypting key information; and a decrypting circuit for decrypting encrypted information using the decrypting key, wherein the first decrypting key information is input from outside the decrypting device, and the second decrypting key information is stored inside the decrypting device.

Abstract: The television receiver including a display device capable of displaying a video signal having a predetermined display former of this invention includes; a plurality of video signal sources; a selection circuit for selecting one of a plurality of video signals output from the plurality of video signal sources; and an image processor for converting a format of the video signal selected by the selection circuit into the predetermined display format, wherein a video signal output from the processor is supplied to the display device.