Patents by Inventor Naoyuki Nakamura

Naoyuki Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8761269
    Abstract: A receiving unit converts a pulse received from a transmission unit into a digital output signal and send back the received pulse to the transmission unit via an isolated communication unit, when it receives the pulse transmitted from the transmission unit; the transmission unit includes: an edge pulse generating circuit for generating a pulse corresponding to a transition of the digital input signal between a first level and a second level; and a verification circuit configured to receive the pulse sent back from the receiving unit, determine whether or not the pulse has been sent back from the receiving unit, and generate an additional pulse when the verification circuit determines that the pulse has not been sent back from the receiving unit and is configured to transmit the pulses generated in the edge pulse generating circuit and in the verification circuit, to the receiving unit, via the isolated communication unit.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: June 24, 2014
    Assignee: Panasonic Corporation
    Inventors: Takao Hashimoto, Naoyuki Nakamura
  • Patent number: 8681393
    Abstract: An image reader includes a reading unit that is configured to read an image on a document sheet to generate read data, a counting unit that is configured to count a number of pixels of the read data having more than a predetermined gray level, a determining unit that determines that the document sheet is blank when the number of pixels counted by the counting unit is not exceeding a threshold value, a display unit that is configured to display the number of pixels counted by the counting unit and the threshold value when the document sheet has been determined to be blank, in a manner that the number of pixels can be compared with the threshold value, and a changing unit that changes the threshold value.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: March 25, 2014
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Naoyuki Nakamura, Takashi Maeda
  • Patent number: 8410826
    Abstract: A load drive circuit with a current bidirectional detecting function includes: a current bidirectional switch connected between a first wire and a second wire and through which a first forward current flows in a direction from the first wire to the second wire and a first backward current flows in a direction from the second wire to the first wire; a forward current detecting switch connected to the first wire and into which a second forward current correlated to the first forward current flowing through the current bidirectional switch flows; a backward current detecting switch connected to the second wire and into which a second backward current correlated to the first backward current flowing through the current bidirectional switch flows.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: April 2, 2013
    Assignee: Panasonic Corporation
    Inventors: Masaaki Koto, Naoyuki Nakamura, Hiroyuki Miyachi
  • Patent number: 8397003
    Abstract: There are provided a CPU connection circuit and a method by two CPUs by alternately conducting a changeover between two buffers disposed there between to prevent an event that data processing cannot be fully executed by the CPU on the receiving side. There is included a memory controller which monitors whether or not an amount of data stored by a CCPU 1 in either one of buffers 301 and 302 reaches a predetermined threshold value; when the amount of data stored by the CCPU 1 in the buffer 301, 302 reaches the threshold value, the memory controller requests an ACPU 2 to acquire the data stored in the buffer and changes the storage destination of data from the CCPU to the other one of the buffers; the threshold value is a value more than a unit quantity of data which the CCPU 1 sends to the buffer 301, 302.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: March 12, 2013
    Assignee: NEC Corporation
    Inventors: Takao Nakagawa, Takashi Tachikawa, Naoyuki Nakamura, Tadashi Tsukamoto, Toshikatsu Hosoi, Hiroshi Kurakane
  • Patent number: 8355326
    Abstract: There are provided a CPU connection circuit and a method wherein the CPU connection circuit is a circuit to be employed by two CPUs by alternately conducting a changeover between two buffers disposed therebetween to prevent an event that data processing cannot be fully executed by the CPU on the receiving side. There is included a memory controller 303 which monitors whether or not an amount of data stored by a CCPU 1 in either one of buffers 301 and 302 reaches a predetermined threshold value; when the amount of data stored by the CCPU 1 in the buffer 301, 302 reaches the threshold value, the memory controller 303 requests an ACPU 2 to acquire the data stored in the buffer and changes the storage destination of data from the CCPU to the other one of the buffers; the threshold value is a value more than a unit quantity of data which the CCPU 1 sends to the buffer 301, 302.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: January 15, 2013
    Assignee: NEC Corporation
    Inventors: Takao Nakagawa, Takashi Tachikawa, Naoyuki Nakamura, Tadashi Tsukamoto, Toshikatsu Hosoi, Hiroshi Kurakane
  • Publication number: 20120331190
    Abstract: There are provided a CPU connection circuit and a method by two CPUs by alternately conducting a changeover between two buffers disposed there between to prevent an event that data processing cannot be fully executed by the CPU on the receiving side. There is included a memory controller which monitors whether or not an amount of data stored by a CCPU 1 in either one of buffers 301 and 302 reaches a predetermined threshold value; when the amount of data stored by the CCPU 1 in the buffer 301, 302 reaches the threshold value, the memory controller requests an ACPU 2 to acquire the data stored in the buffer and changes the storage destination of data from the CCPU to the other one of the buffers; the threshold value is a value more than a unit quantity of data which the CCPU 1 sends to the buffer 301, 302.
    Type: Application
    Filed: July 2, 2012
    Publication date: December 27, 2012
    Applicant: NEC CORPORATION
    Inventors: Takao NAKAGAWA, Takashi TACHIKAWA, Naoyuki NAKAMURA, Tadashi TSUKAMOTO, Toshikatsu HOSOI, Hiroshi KURAKANE
  • Publication number: 20120081761
    Abstract: An image reader includes a reading unit that is configured to read an image on a document sheet to generate read data, a counting unit that is configured to count a number of pixels of the read data having more than a predetermined gray level, a determining unit that determines that the document sheet is blank when the number of pixels counted by the counting unit is not exceeding a threshold value, a display unit that is configured to display the number of pixels counted by the counting unit and the threshold value when the document sheet has been determined to be blank, in a manner that the number of pixels can be compared with the threshold value, and a changing unit that changes the threshold value.
    Type: Application
    Filed: March 28, 2011
    Publication date: April 5, 2012
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Naoyuki NAKAMURA, Takashi MAEDA
  • Publication number: 20110304360
    Abstract: The present invention introduces a diode circuit which achieves ideal diode characteristics which observe an enough reverse breakdown voltage, and whose forward voltage is nearly 0 V. An active diode has an anode terminal and a cathode terminal. The active diode includes a transistor which has a gate terminal, a drain terminal connected to one of the anode terminal and the cathode terminal, and a source terminal connected to the other one of the anode terminal or the cathode terminal; and a gate voltage generating circuit which delivers a gate voltage to the gate terminal, the gate voltage being adjusted to be equal to a threshold voltage of the transistor.
    Type: Application
    Filed: June 13, 2011
    Publication date: December 15, 2011
    Inventors: Naoyuki NAKAMURA, Hiroyuki Miyachi
  • Publication number: 20110280323
    Abstract: A receiving unit converts a pulse received from a transmission unit into a digital output signal and send back the received pulse to the transmission unit via an isolated communication unit, when it receives the pulse transmitted from the transmission unit; the transmission unit includes: an edge pulse generating circuit for generating a pulse corresponding to a transition of the digital input signal between a first level and a second level; and a verification circuit configured to receive the pulse sent back from the receiving unit, determine whether or not the pulse has been sent back from the receiving unit, and generate an additional pulse when the verification circuit determines that the pulse has not been sent back from the receiving unit and is configured to transmit the pulses generated in the edge pulse generating circuit and in the verification circuit, to the receiving unit, via the isolated communication unit.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 17, 2011
    Inventors: Takao HASHIMOTO, Naoyuki NAKAMURA
  • Publication number: 20110249560
    Abstract: There are provided a CPU connection circuit and a method wherein the CPU connection circuit is a circuit to be employed by two CPUs by alternately conducting a changeover between two buffers disposed therebetween to prevent an event that data processing cannot be fully executed by the CPU on the receiving side. There is included a memory controller 303 which monitors whether or not an amount of data stored by a CCPU 1 in either one of buffers 301 and 302 reaches a predetermined threshold value; when the amount of data stored by the CCPU 1 in the buffer 301, 302 reaches the threshold value, the memory controller 303 requests an ACPU 2 to acquire the data stored in the buffer and changes the storage destination of data from the CCPU to the other one of the buffers; the threshold value is a value more than a unit quantity of data which the CCPU 1 sends to the buffer 301, 302.
    Type: Application
    Filed: July 25, 2007
    Publication date: October 13, 2011
    Inventors: Takao Nakagawa, Takashi Tachikawa, Naoyuki Nakamura, Tadashi Tsukamoto, Toshikatsu Hosoi, Hiroshi Kurakane
  • Publication number: 20110248748
    Abstract: A load drive circuit with a current bidirectional detecting function includes: a current bidirectional switch connected between a first wire and a second wire and through which a first forward current flows in a direction from the first wire to the second wire and a first backward current flows in a direction from the second wire to the first wire; a forward current detecting switch connected to the first wire and into which a second forward current correlated to the first forward current flowing through the current bidirectional switch flows; a backward current detecting switch connected to the second wire and into which a second backward current correlated to the first backward current flowing through the current bidirectional switch flows.
    Type: Application
    Filed: March 29, 2011
    Publication date: October 13, 2011
    Inventors: Masaaki Koto, Naoyuki Nakamura, Hiroyuki Miyachi
  • Publication number: 20110234185
    Abstract: It is an object of the present invention to provide a driving circuit which is adapted, for a semiconductor device which exhibits a diode characteristic of flowing an abrupt current if the gate-source voltage therein exceeds a predetermined voltage, to have the functions of reducing electric-power consumption in high-load state, reducing the loss in the driving circuit in low-load states, preventing excessive voltages, excessive currents and excessive electric-power consumption, and reducing the loss in the semiconductor device.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 29, 2011
    Inventors: Hisanori NAGASE, Naoyuki Nakamura, Shuji Tamaoka
  • Patent number: 7782030
    Abstract: The step-down converter includes: a switch; an inductor; a rectifier; a smoothing unit; and a current bypass circuit, wherein when the current flowing toward the inductor exceeds a predetermined value, the current bypass circuit forms a path through which the current flows from the input terminal to the output terminal while bypassing the inductor.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: August 24, 2010
    Assignee: Panasonic Corporation
    Inventors: Takashi Ryu, Takuya Ishii, Naoyuki Nakamura, Hirohisa Tanabe
  • Patent number: 7764113
    Abstract: A reference voltage is applied from a reference voltage generating circuit to the non-inverting input terminal of an amplifier for supplying a drive voltage to the gate terminal of an NMOS transistor, and the output voltage appearing at the source terminal of the NMOS transistor is divided by a resistor pair and applied to the inverting input terminal of the amplifier. The voltage obtained by adding a voltage equal to or higher than the voltage for sufficiently driving the NMOS transistor to the output voltage appearing at the source terminal of the NMOS transistor is generated by a charge pump circuit and supplied to the amplifier as a power supply voltage. With this configuration, the drive voltage for the NMOS transistor is suppressed to the required minimum voltage while the drive voltage is obtained securely. The power consumption in the amplifier can thus be suppressed.
    Type: Grant
    Filed: July 8, 2008
    Date of Patent: July 27, 2010
    Assignee: Panasonic Corporation
    Inventors: Takashi Ryu, Takuya Ishii, Naoyuki Nakamura, Hirohisa Tanabe
  • Publication number: 20100006756
    Abstract: When the surface of a semiconductor wafer, a photomask or the like sample is charged by irradiation with a charged particle beam, the charging is liable to hamper image observation, inspection and handling. Therefore, the sample and the surface or vicinity of the sample being charged by an electron beam or the like is held in an atmosphere or a reduced pressure atmosphere or in a predetermined gaseous atmosphere within a preliminary evacuation chamber, a sample chamber or the like, containing a soft X-ray generator which irradiates the sample or the vicinity thereof with soft X-rays which are controlled to generate positive ions and negative ions and remove charges on the surface of the sample.
    Type: Application
    Filed: June 15, 2006
    Publication date: January 14, 2010
    Inventors: Norimichi Anazawa, Jun Nitta, Michio Ohshima, Tatenori Jinriki, Naoyuki Nakamura, Akira Yonezawa, Ken-ichi Kobayashi, Hao Zhang
  • Publication number: 20090015299
    Abstract: A reference voltage is applied from a reference voltage generating circuit to the non-inverting input terminal of an amplifier for supplying a drive voltage to the gate terminal of an NMOS transistor, and the output voltage appearing at the source terminal of the NMOS transistor is divided by a resistor pair and applied to the inverting input terminal of the amplifier. The voltage obtained by adding a voltage equal to or higher than the voltage for sufficiently driving the NMOS transistor to the output voltage appearing at the source terminal of the NMOS transistor is generated by a charge pump circuit and supplied to the amplifier as a power supply voltage. With this configuration, the drive voltage for the NMOS transistor is suppressed to the required minimum voltage while the drive voltage is obtained securely. The power consumption in the amplifier can thus be suppressed.
    Type: Application
    Filed: July 8, 2008
    Publication date: January 15, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takashi RYU, Takuya Ishii, Naoyuki Nakamura, Hiroshisa Tanabe
  • Publication number: 20070241725
    Abstract: The step-down converter includes: a switch to which an input voltage is supplied via an input terminal; an inductor which is connected to the switch; rectifier means which allows a current to flow through the inductor in the OFF state of the switch; smoothing means which smoothes the current of the inductor to produce an output voltage to an output terminal; and a current bypass circuit, wherein when the current flowing toward the inductor exceeds a predetermined value, the current bypass circuit forms a path through which the current flows from the input terminal to the output terminal while bypassing the inductor.
    Type: Application
    Filed: April 11, 2007
    Publication date: October 18, 2007
    Inventors: Takashi Ryu, Takuya Ishii, Naoyuki Nakamura, Hirohisa Tanabe
  • Patent number: D528469
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: September 19, 2006
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Tadayuki Yakushi, Daisuke Iguchi, Atsushi Hirose, Naoyuki Nakamura, Yuji Fujiwara, Takashi Hagino, Sotiris Kovos
  • Patent number: D622644
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: August 31, 2010
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Hideo Koyama, Naoyuki Nakamura
  • Patent number: D626034
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: October 26, 2010
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Naoyuki Nakamura, Hideo Koyama, Saburou Hazumi