Patents by Inventor Naoyuki Ueda

Naoyuki Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190245090
    Abstract: A field-effect transistor including: a gate electrode, which is configured to apply gate voltage; a source electrode and a drain electrode, which are configured to take electric current out; an active layer, which is disposed between the source electrode and the drain electrode and is formed of an oxide semiconductor; and a gate insulating layer, which is disposed between the gate electrode and the active layer, the source electrode and the drain electrode each including a metal region formed of a metal and an oxide region formed of one or more metal oxides, and a part of the oxide region in each of the source electrode and the drain electrode being in contact with the active layer, and rest of the oxide region being in contact with one or more components other than the active layer.
    Type: Application
    Filed: July 14, 2017
    Publication date: August 8, 2019
    Inventors: Minehide KUSAYANAGI, Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Shinji MATSUMOTO, Yuji SONE, Ryoichi SAOTOME, Sadanori ARAE
  • Publication number: 20190172914
    Abstract: A p-type oxide which is amorphous and is represented by the following compositional formula: xAO.yCu2O where x denotes a proportion by mole of AO and y denotes a proportion by mole of Cu2O and x and y satisfy the following expressions: 0?x<100 and x+y=100, and A is any one of Mg, Ca, Sr and Ba, or a mixture containing at least one selected from the group consisting of Mg, Ca, Sr and Ba.
    Type: Application
    Filed: January 28, 2019
    Publication date: June 6, 2019
    Applicant: RICOH COMPANY, LTD.
    Inventors: Yukiko ABE, Naoyuki UEDA, Yuki NAKAMURA, Shinji MATSUMOTO, Yuji SONE, Mikiko TAKADA, Ryoichi SAOTOME
  • Publication number: 20190172390
    Abstract: A field-effect transistor including: a gate electrode, which is configured to apply gate voltage; a source electrode and a drain electrode, which are configured to take electric current out; a semiconductor layer, which is disposed to be adjacent to the source electrode and the drain electrode; and a gate insulating layer, which is disposed between the gate electrode and the semiconductor layer, wherein the gate insulating layer includes a first gate insulating layer containing a first oxide containing Si and an alkaline earth metal and a second gate insulating layer disposed to be in contact with the first gate insulating layer and containing a paraelectric amorphous oxide containing a Group A element which is an alkaline earth metal and a Group B element which is at least one selected from the group consisting of Ga, Sc, Y, and lanthanoid.
    Type: Application
    Filed: January 25, 2019
    Publication date: June 6, 2019
    Applicant: RICOH COMPANY, LTD.
    Inventors: Ryoichi SAOTOME, Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Shinji MATSUMOTO, Yuji Sone, Sadanori ARAE, Minehide KUSAYANAGI
  • Patent number: 10312373
    Abstract: A field-effect transistor includes a gate electrode, a source electrode and a drain electrode to take out electric current according to an application of a voltage to the gate electrode, a semiconductor layer disposed adjacent to the source electrode and the drain electrode, the semiconductor layer forming a channel between the source electrode and the drain electrode, a first insulating layer as gate insulating film disposed between the semiconductor layer and the gate electrode, and a second insulating layer covering at least a part of a surface of the semiconductor layer, the second insulating layer including an oxide including silicon and alkaline earth metal.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: June 4, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventors: Sadanori Arae, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Ryoichi Saotome, Minehide Kusayanagi
  • Publication number: 20190164480
    Abstract: A field-effect transistor includes a gate electrode to apply a gate voltage, a source electrode and a drain electrode to take electric current out, a semiconductor layer disposed adjacent to the source electrode and the drain electrode, and a gate insulating layer disposed between the gate electrode and the semiconductor layer, wherein the gate insulating layer includes an oxide including silicon and one or two or more alkaline earth metal elements.
    Type: Application
    Filed: January 10, 2019
    Publication date: May 30, 2019
    Applicant: RICOH COMPANY, LTD.
    Inventors: Ryoichi SAOTOME, Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Shinji MATSUMOTO, Yuji SONE, Sadanori ARAE, Minehide KUSAYANAGI
  • Publication number: 20190157313
    Abstract: A gas barrier laminate includes a substrate and a barrier layer formed on at least one of faces of the substrate. The barrier layer includes composite oxide including silicon and alkaline-earth metal.
    Type: Application
    Filed: January 23, 2019
    Publication date: May 23, 2019
    Applicant: Ricoh Company, Ltd.
    Inventors: Sadanori Arae, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Ryoichi Saotome, Minehide Kusayanagi
  • Publication number: 20190148168
    Abstract: A method for manufacturing a field-effect transistor includes forming an active layer of an oxide semiconductor, forming a conducting film to cover the active layer, patterning the conducting film through an etching process using an etchant to form a source electrode and a drain electrode, and performing, at least before the patterning the conducting film, a treatment on the active layer so that an etching rate of the active layer is less than an etching rate of the conducting film.
    Type: Application
    Filed: December 26, 2018
    Publication date: May 16, 2019
    Applicant: RICOH COMPANY, LTD.
    Inventors: Minehide KUSAYANAGI, Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Shinji MATSUMOTO, Yuji SONE, Ryoichi SAOTOME, Sadanori ARAE
  • Patent number: 10269293
    Abstract: A field-effect transistor includes a gate electrode to apply a gate voltage, a source electrode and a drain electrode to take electric current out, a semiconductor layer disposed adjacent to the source electrode and the drain electrode, and a gate insulating layer disposed between the gate electrode and the semiconductor layer, wherein the gate insulating layer includes an oxide including silicon and one or two or more alkaline earth metal elements.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: April 23, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventors: Ryoichi Saotome, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Sadanori Arae, Minehide Kusayanagi
  • Publication number: 20190088796
    Abstract: A semiconductor device includes a base; a gate electrode to which a gate voltage is applied; a source electrode and a drain electrode through which an electric current is generated according to the gate voltage being applied to the gate electrode; a semiconductor layer made of an oxide semiconductor; and a gate insulating layer inserted between the gate electrode and the semiconductor layer. The semiconductor layer includes a channel-forming region and a non-channel-forming region; the channel-forming region is in contact with the source electrode and the drain electrode, and the non-channel-forming region is in contact with the source electrode and the drain electrode.
    Type: Application
    Filed: November 7, 2018
    Publication date: March 21, 2019
    Applicant: RICOH COMPANY, LTD.
    Inventors: Shinji MATSUMOTO, Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Yuji SONE, Ryoichi SAOTOME, Sadanori ARAE, Minehide KUSAYANAGI
  • Patent number: 10235930
    Abstract: A field-effect transistor including: a gate electrode, which is configured to apply gate voltage; a source electrode and a drain electrode, which are configured to take electric current out; a semiconductor layer, which is disposed to be adjacent to the source electrode and the drain electrode; and a gate insulating layer, which is disposed between the gate electrode and the semiconductor layer, wherein the gate insulating layer includes a first gate insulating layer containing a first oxide containing Si and an alkaline earth metal and a second gate insulating layer disposed to be in contact with the first gate insulating layer and containing a paraelectric amorphous oxide containing a Group A element which is an alkaline earth metal and a Group B element which is at least one selected from the group consisting of Ga, Sc, Y, and lanthanoid.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: March 19, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventors: Ryoichi Saotome, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Sadanori Arae, Minehide Kusayanagi
  • Patent number: 10236349
    Abstract: A p-type oxide which is amorphous and is represented by the following compositional formula: xAO.yCu2O where x denotes a proportion by mole of AO and y denotes a proportion by mole of Cu2O and x and y satisfy the following expressions: 0?x<100 and x+y=100, and A is any one of Mg, Ca, Sr and Ba, or a mixture containing at least one selected from the group consisting of Mg, Ca, Sr and Ba.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: March 19, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventors: Yukiko Abe, Naoyuki Ueda, Yuki Nakamura, Shinji Matsumoto, Yuji Sone, Mikiko Takada, Ryoichi Saotome
  • Patent number: 10236304
    Abstract: A gas barrier laminate includes a substrate and a barrier layer formed on at least one of faces of the substrate. The barrier layer includes composite oxide including silicon and alkaline-earth metal.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: March 19, 2019
    Assignee: Ricoh Company, Ltd.
    Inventors: Sadanori Arae, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Ryoichi Saotome, Minehide Kusayanagi
  • Publication number: 20190051752
    Abstract: A coating liquid for forming an n-type oxide semiconductor film, the coating liquid including: a Group A element, which is at least one selected from the group consisting of Sc, Y, Ln, B, Al, and Ga; a Group B element, which is at least one of In and Tl; a Group C element, which is at least one selected from the group consisting of Group 4 elements, Group 5 elements, Group 6 elements, Group 7 elements, Group 8 elements, Group 9 elements, Group 10 elements, Group 14 elements, Group 15 elements, and Group 16 elements; and a solvent.
    Type: Application
    Filed: September 9, 2016
    Publication date: February 14, 2019
    Applicant: Ricoh Comoany, Ltd.
    Inventors: Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Shinji MATSUMOTO, Yuji SONE, Ryoichi SAOTOME, Sadanori ARAE, Minehide KUSAYANAGI
  • Patent number: 10204799
    Abstract: A method for manufacturing a field-effect transistor includes forming an active layer of an oxide semiconductor, forming a conducting film to cover the active layer, patterning the conducting film through an etching process using an etchant to form a source electrode and a drain electrode, and performing, at least before the patterning the conducting film, a treatment on the active layer so that an etching rate of the active layer is less than an etching rate of the conducting film.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: February 12, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventors: Minehide Kusayanagi, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Ryoichi Saotome, Sadanori Arae
  • Publication number: 20190027508
    Abstract: A field-effect transistor including: a gate electrode, which is configured to apply gate voltage; a source electrode and a drain electrode, which are configured to transfer an electrical signal; an active layer, which is formed between the source electrode and the drain electrode; and a gate insulating layer, which is formed between the gate electrode and the active layer, the active layer including at least two kinds of oxide layers including layer A and layer B, and the active layer satisfying at least one of condition (1) and condition (2) below: condition (1): the active layer includes 3 or more oxide layers including 2 or more of the layer A; and condition (2): a band-gap of the layer A is lower than a band-gap of the layer B and an oxygen affinity of the layer A is equal to or higher than an oxygen affinity of the layer B.
    Type: Application
    Filed: September 14, 2018
    Publication date: January 24, 2019
    Inventors: Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Shinji MATSUMOTO, Yuji SONE, Ryoichi SAOTOME, Sadanori ARAE, Minehide KUSAYANAGI
  • Publication number: 20190027608
    Abstract: A method for producing a field-effect transistor including first-oxide-layer and second-oxide-layer and forming front-channel or back-channel in region where the first-oxide-layer and the second-oxide-layer are adjacent to each other, the method including: forming second-precursor-layer, which is precursor of the second-oxide-layer, so as to be in contact with first-precursor-layer, which is precursor of the first-oxide-layer, and then converting the first-precursor-layer and the second-precursor-layer to the first-oxide-layer and the second-oxide-layer, respectively, the forming includes at least one of treatments (I) and (II) below: (I) treatment of: coating first-oxide-precursor-forming coating liquid that can form precursor of first oxide and contains solvent; and then removing the solvent to form the first-precursor-layer which is the precursor of the first-oxide-layer; and (II) treatment of: coating second-oxide-precursor-forming coating liquid that can form precursor of second oxide and contains solven
    Type: Application
    Filed: September 14, 2018
    Publication date: January 24, 2019
    Inventors: Shinji MATSUMOTO, Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Yuji SONE, Ryoichi SAOTOME, Sadanori ARAE, Minehide KUSAYANAGI
  • Patent number: 10170635
    Abstract: A semiconductor device includes a base; a gate electrode to which a gate voltage is applied; a source electrode and a drain electrode through which an electric current is generated according to the gate voltage being applied to the gate electrode; a semiconductor layer made of an oxide semiconductor; and a gate insulating layer inserted between the gate electrode and the semiconductor layer. The semiconductor layer includes a channel-forming region and a non-channel-forming region; the channel-forming region is in contact with the source electrode and the drain electrode, and the non-channel-forming region is in contact with the source electrode and the drain electrode.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: January 1, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventors: Shinji Matsumoto, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Yuji Sone, Ryoichi Saotome, Sadanori Arae, Minehide Kusayanagi
  • Publication number: 20180358236
    Abstract: A method is provided for manufacturing a field effect transistor that includes a gate insulating layer and an electrode including a first conductive film and a second conductive film successively laminated on a predetermined surface of the gate insulating layer. The method includes forming an oxide film including element A, which is an alkaline earth metal, and element B, which is at least one of Ga, Sc, Y and a lanthanide, as the gate insulating layer; forming a first conductive film that dissolves in an organic alkaline solution on the oxide film; forming a second conductive film on the first conductive film; etching the second conductive film with an etching solution having a higher etch rate for the second conductive film as compared with that for the first conductive film; and etching the first conductive film with the organic alkaline solution using the second conductive film as a mask.
    Type: Application
    Filed: July 27, 2018
    Publication date: December 13, 2018
    Applicant: Ricoh Company, Ltd.
    Inventors: Sadanori ARAE, Naoyuki UEDA, Yuki NAKAMURA, Yukiko ABE, Shinji MATSUMOTO, Yuji SONE, Ryoichi SAOTOME, Minehide KUSAYANAGI
  • Patent number: 10141185
    Abstract: An oxide semiconductor includes an oxide having a layered structure expressed by an expression of a product of [(AO)(ZO)mi(BO)(ZO)ni]i from i=1 to L. In the product, an atom A is a positive monovalent element, an atom Z is a positive divalent element, an atom B is a positive trivalent element, L is a positive integer, and mi and ni are independent integers greater than or equal to zero. A sum from i=1 to L of (mi+ni) is not zero.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: November 27, 2018
    Assignee: RICOH COMPANY, LTD.
    Inventors: Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Ryoichi Saotome, Sadanori Arae, Minehide Kusayanagi
  • Publication number: 20180331196
    Abstract: A field-effect transistor includes a substrate; a source electrode, a drain electrode, and a gate electrode that are formed on the substrate; a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and a gate insulating layer provided between the gate electrode and the semiconductor layer. The gate insulating layer is formed of an amorphous composite metal oxide insulating film including one or two or more alkaline-earth metal elements and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce.
    Type: Application
    Filed: July 6, 2018
    Publication date: November 15, 2018
    Inventors: Yuji Sone, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe