Patents by Inventor Nathan Jack

Nathan Jack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200194421
    Abstract: A guard ring grid is disclosed. The guard ring grid includes a substrate and an injector array coupled to the substrate. The injector array includes a plurality of injectors. The guard ring grid also includes a plurality of guard rings that surround the plurality of injectors.
    Type: Application
    Filed: December 17, 2018
    Publication date: June 18, 2020
    Inventors: Nathan JACK, Krzysztof DOMANSKI
  • Patent number: 10359461
    Abstract: A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: July 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Shunhua Chang, James Paul Di Sarro, Robert J. Gauthier, Jr., Nathan Jack, Souvick Mitra
  • Publication number: 20180100884
    Abstract: A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.
    Type: Application
    Filed: December 7, 2017
    Publication date: April 12, 2018
    Inventors: SHUNHUA CHANG, JAMES PAUL DI SARRO, ROBERT J. GAUTHIER, JR., NATHAN JACK, SOUVICK MITRA
  • Publication number: 20180100883
    Abstract: A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.
    Type: Application
    Filed: December 7, 2017
    Publication date: April 12, 2018
    Inventors: SHUNHUA CHANG, JAMES PAUL DI SARRO, ROBERT J. GAUTHIER, JR., NATHAN JACK, SOUVICK MITRA
  • Patent number: 9869708
    Abstract: A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: January 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Shunhua Chang, James Paul Di Sarro, Robert J. Gauthier, Jr., Nathan Jack, Souvick Mitra
  • Patent number: 9435841
    Abstract: A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: September 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Shunhua Chang, James Paul Di Sarro, Robert J. Gauthier, Jr., Nathan Jack, Souvick Mitra
  • Publication number: 20160033564
    Abstract: A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.
    Type: Application
    Filed: October 14, 2015
    Publication date: February 4, 2016
    Inventors: SHUNHUA CHANG, JAMES PAUL DI SARRO, ROBERT J. GAUTHIER, JR., NATHAN JACK, SOUVICK MITRA
  • Publication number: 20130271883
    Abstract: A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 17, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shunhua Chang, James Paul Di Sarro, Robert J. Gauthier, JR., Nathan Jack, Souvick Mitra
  • Patent number: 7831205
    Abstract: Disclosed are embodiments of methods and systems for wireless data transmission by magnetic induction. In one embodiment, a network of magnetic induction units is provided. The units may be configured to transmit a data signal by modulation of a time-varying magnetic field. One or more units may also be configured to receive a data signal received from another magnetic induction unit. In one specific implementation, a network of underground magnetic induction units is provided, each having a sensor connected thereto. Each of the units, or a subset of the units, may be configured to transmit its sensed data to an adjacent or nearby unit, which, in turn, may retransmit the original data, along with additional appended data, to another adjacent unit. The network data may thereby be relayed in a multi-hop fashion until it reaches a desired destination.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: November 9, 2010
    Assignee: Utah State University
    Inventors: Nathan Jack, Krishna Shenai
  • Publication number: 20090222921
    Abstract: A system and method are disclosed for utilizing resources of a network. A constructive proof that a subset of resources is sufficient to satisfy the objective of a system can be generated. The constructive proof can comprise instructions for using the subset of resources. A set of computer-executable instructions can be created from the constructive proof and executed on a host device. The computer-executable instructions can control a data output device according to the instructions of the constructive proof.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 3, 2009
    Applicant: Utah State University
    Inventors: Supratik Mukhopadhyay, Krishna Shenai, Rabindra K. Roy, Nathan Jack
  • Publication number: 20080171512
    Abstract: Disclosed are embodiments of methods and systems for wireless data transmission by magnetic induction. In one embodiment, a network of magnetic induction units is provided. The units may be configured to transmit a data signal by modulation of a time-varying magnetic field. One or more units may also be configured to receive a data signal received from another magnetic induction unit. In one specific implementation, a network of underground magnetic induction units is provided, each having a sensor connected thereto. Each of the units, or a subset of the units, may be configured to transmit its sensed data to an adjacent or nearby unit, which, in turn, may retransmit the original data, along with additional appended data, to another adjacent unit. The network data may thereby be relayed in a multi-hop fashion until it reaches a desired destination.
    Type: Application
    Filed: June 15, 2007
    Publication date: July 17, 2008
    Applicant: UTAH STATE UNIVERSITY
    Inventors: Nathan Jack, Krishna Shenai