Abstract: Exemplary techniques for performing impedance matching are described. In an exemplary embodiment, the apparatus may include an amplifier (e.g., a power amplifier) coupled to first and second matching circuits. The first matching circuit may include multiple stages coupled to a first node and may provide input impedance matching for the amplifier. The second matching circuit may include multiple stages coupled to a second node and may provide output impedance matching for the amplifier. At least one switch may be coupled between the first and second nodes and may bypass or select the amplifier. The first and second nodes may have a common impedance. The apparatus may further include a second amplifier coupled in parallel with the amplifier and further to the matching circuits. The second matching circuit may include a first input stage coupled to the amplifier, a second input stage coupled to the second amplifier, and a second stage coupled to the two input stages via switches.

Abstract: An amplifier module with multiple operating modes is described. In an exemplary design, the amplifier module includes an amplifier (e.g., a power amplifier), a switch, and an output circuit. The amplifier receives and amplifies an input signal and provides an amplified signal in a first mode. The switch is coupled to the output of the amplifier and bypasses the amplifier and provides a bypass signal in a second mode. The output circuit is coupled to the amplifier and the switch. The output circuit performs output impedance matching for the amplifier in the first mode. The output circuit also (i) receives the amplified signal and provides an output signal in the first mode and (ii) receives the bypass signal and provides the output signal in the second mode. The amplifier is enabled in the first mode and disabled in the second mode.

Abstract: A compact integrated power amplifier is described herein. In an exemplary design, an apparatus includes (i) an integrated circuit (IC) die having at least one transistor for a power amplifier and (ii) an IC package having a load inductor for the power amplifier. The IC die is mounted on the IC package with the transistor(s) located over the load inductor. In an exemplary design, the IC die includes a transistor manifold that is placed over the load inductor on the IC package. The transistor(s) are fabricated in the transistor manifold, have a drain connection in the center of the transistor manifold, and have source connections on two sides of the transistor manifold. The IC die and the IC package may include one or more additional power amplifiers. The transistor(s) for each power amplifier may be located over the load inductor for that power amplifier.