Abstract: An apparatus includes: a substrate; a lid disposed over the substrate, and comprising posts disposed around a perimeter of the substrate, the posts enclosing a cavity between the lid and the substrate; an electronic device disposed over an upper surface of the substrate, and in the cavity; an electrical contact pad; and an electrically insulating layer disposed between the electrical contact pad and an upper surface of the lid.

Abstract: A method of accessing computer networks and data sources simultaneously is disclose. The method includes the steps of (a) selecting at least one of a target source to be accessed; and (b) running target parsing tool of said at least one of a target source if parsing is required. Also, there is disclosed a user interface for accessing multiple target sources simultaneously. The user interface includes a text entry field, a scroll-down menu for selecting one or more target sources, and an infobar for displaying information.

Abstract: An apparatus includes a multilayer package substrate having a plurality of layers. The apparatus also includes a first heat sink disposed over the package substrate. The first heat sink is configured to connect to a semiconductor device and to provide an electrical ground for the semiconductor device. The apparatus includes a second heat sink disposed in the package substrate. The first heat sink overlaps substantially all of the first electrically conductive layer and no dielectric material exists in the multilayer package substrate in a region of contact of the first heat sink and the first electrically conductive layer.

Abstract: A thermally conductive and electrically insulating layer is provided over a semiconductor structure.

Abstract: A semiconductor structure includes a semiconductor substrate having a recess disposed beneath a semiconductor device. The semiconductor structure also includes a thermally conductive core disposed in the recess, and a package substrate including a heat sink. The heat sink is in thermal contact with the thermally conductive core.

Abstract: A semiconductor structure includes a semiconductor substrate having a recess disposed beneath a semiconductor device. The semiconductor structure also includes a thermally conductive core disposed in the recess, and a package substrate including a heat sink. The heat sink is in thermal contact with the thermally conductive core.

Abstract: A semiconductor structure includes a semiconductor substrate having a recess disposed beneath a semiconductor device. The semiconductor structure also includes a thermally conductive core disposed in the recess, and a package substrate including a heat sink. The heat sink is in thermal contact with the thermally conductive core.

Abstract: A thermally conductive and electrically insulating layer is provided over a semiconductor structure.

Abstract: A semiconductor structure includes a semiconductor substrate having a recess disposed beneath a semiconductor device. The semiconductor structure also includes a thermally conductive core disposed in the recess, and a package substrate including a heat sink. The heat sink is in thermal contact with the thermally conductive core.

Abstract: An apparatus includes a multilayer package substrate having a plurality of layers. The apparatus also includes a first heat sink disposed over the package substrate. The first heat sink is configured to connect to a semiconductor device and to provide an electrical ground for the semiconductor device. The apparatus includes a second heat sink disposed in the package substrate. The first heat sink overlaps substantially all of the first electrically conductive layer and no dielectric material exists in the multilayer package substrate in a region of contact of the first heat sink and the first electrically conductive layer.

Abstract: A semiconductor device that includes a Group III-V semiconductor substrate, circuit elements in and on the substrate, a first metal layer over the substrate, and an interlayer dielectric (ILD) layer. The ILD layer defines a via that extends through it to the first metal layer. Over the ILD layer is thick second metal layer and a passivation layer. The second metal layer includes an interconnect that extends through the via into contact with the first metal layer. The second metal layer is patterned to define at least one conductor. The passivation layer covers the second metal layer and the interlayer dielectric layer, and includes stacked regions of dielectric material. Ones of the regions under tensile stress alternate with ones of the regions under compressive stress, such that the passivation layer is subject to net compressive stress.

Abstract: A semiconductor device that includes a Group III-V semiconductor substrate, circuit elements in and on the substrate, a first metal layer over the substrate, and an interlayer dielectric (ILD) layer. The ILD layer defines a via that extends through it to the first metal layer. Over the ILD layer is thick second metal layer and a passivation layer. The second metal layer includes an interconnect that extends through the via into contact with the first metal layer. The second metal layer is patterned to define at least one conductor. The passivation layer covers the second metal layer and the interlayer dielectric layer, and includes stacked regions of dielectric material. Ones of the regions under tensile stress alternate with ones of the regions under compressive stress, such that the passivation layer is subject to net compressive stress.

Abstract: A pseudomorphic high electron mobility transistor (PHEMT) comprises a substrate comprising a Group III-V semiconductor material, a buffer layer disposed over the substrate, wherein the buffer layer comprises microprecipitates of a Group V semiconductor element and is doped with an N-type dopant, and a channel layer disposed over the buffer layer.

Abstract: A pseudomorphic high electron mobility transistor (PHEMT) comprises a substrate comprising a Group III-V semiconductor material, a buffer layer disposed over the substrate, wherein the buffer layer comprises microprecipitates of a Group V semiconductor element and is doped with an N-type dopant, and a channel layer disposed over the buffer layer.

Abstract: Conversion of a vehicle sound system from an installed to a portable sound source. A wireless personal area network receiver may be substituted for the radio and/or media player that is normally found within the vehicle.