Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the apparatus can include a membrane formed from a compressible, flexible material, such as neoprene or silicone, and having a first portion with a thickness greater than that of a second portion. The membrane can be aligned with the microelectronic substrate to bias the microelectronic substrate against a planarizing medium such that the first portion of the membrane biases the microelectronic substrate with a greater downward force than does the second portion of the membrane. Accordingly, the membrane can compensate for effects, such as varying linear velocities across the face of the substrate that would otherwise cause the substrate to planarize in a non-uniform fashion or, alternatively, the membrane can be used to selectively planarize portions of the microelectronic substrate at varying rates.

Abstract: A chemical mechanical polishing (CMP) tool holds a conditioning disk that is used to remove impurities from a polishing disk used to planarize surfaces, such as a semiconductor surface. The tool uses an elastic disk that is positioned between a clamp and a gimbal hub that pivotally overlies a gimbal plate. The elastic disk is a polymer material, such as for example polytetrafluoroethylene (PTFE). The elastic disk has a central opening and is radially solid around the central opening. Alignment holes and drive mechanism holes pierce the elastic disk which functions to rotate the tool with minimal friction and provides a liquid seal from CMP fluids. Access holes in the gimbal plate permit easy installation and removal of the individual components. The PTFE disk is strong and durable enough to withstand high torque and provide lengthy operation without maintenance.

Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the apparatus can include a membrane formed from a compressible, flexible material, such as neoprene or silicone, and having a first portion with a thickness greater than that of a second portion. The membrane can be aligned with the microelectronic substrate to bias the microelectronic substrate against a planarizing medium such that the first portion of the membrane biases the microelectronic substrate with a greater downward force than does the second portion of the membrane. Accordingly, the membrane can compensate for effects, such as varying linear velocities across the face of the substrate that would otherwise cause the substrate to planarize in a non-uniform fashion or, alternatively, the membrane can be used to selectively planarize portions of the microelectronic substrate at varying rates.

Abstract: An apparatus for applying different amounts of pressure to different locations of a backside of a semiconductor device structure during polishing thereof. The apparatus is configured to be associated with a wafer carrier of a polishing apparatus and includes pressurization structures configured to be biased against the backside of the semiconductor device structure during polishing thereof. The pressurization structures are independently movable with respect to one another. The amount of force or pressure applied by each pressurization structure to the backside of the semiconductor device structure is controlled by at least one corresponding actuator. The actuator may magnetically facilitate movement of the corresponding pressurization structure toward or away from the backside of the semiconductor device structure. The actuator may alternatively comprise a positive or negative pressure source.

Abstract: An apparatus for applying different amounts of pressure to different locations of a backside of a semiconductor device structure during polishing thereof. The apparatus is configured to be associated with a wafer carrier of a polishing apparatus and includes pressurization structures configured to be biased against the backside of the semiconductor device structure during polishing thereof. The pressurization structures are independently movable with respect to one another. The amount of force or pressure applied by each pressurization structure to the backside of the semiconductor device structure is controlled by at least one corresponding actuator. The actuator may magnetically facilitate movement of the corresponding pressurization structure toward or away from the backside of the semiconductor device structure. The actuator may alternatively comprise a positive or negative pressure source.

Abstract: An apparatus for applying different amounts of pressure to different locations of a backside of a semiconductor device structure during polishing thereof. The apparatus is configured to be associated with a wafer carrier of a polishing apparatus and includes pressurization structures configured to be biased against the backside of the semiconductor device structure during polishing thereof. The pressurization structures are independently movable with respect to one another. The amount of force or pressure applied by each pressurization structure to the backside of the semiconductor device structure is controlled by at least one corresponding actuator. The actuator may magnetically facilitate movement of the corresponding pressurization structure toward or away from the backside of the semiconductor device structure. The actuator may alternatively comprise a positive or negative pressure source.

Abstract: An apparatus for planarizing a microelectronic substrate. In one embodiment, the apparatus can include a membrane formed from a compressible, flexible material, such as neoprene or silicone, and having a first portion with a thickness greater than that of a second portion. The membrane can be aligned with the microelectronic substrate to bias the microelectronic substrate against a planarizing medium such that the first portion of the membrane biases the microelectronic substrate with a greater downward force than does the second portion of the membrane. Accordingly, the membrane can compensate for effects, such as varying linear velocities across the face of the substrate that would otherwise cause the substrate to planarize in a non-uniform fashion or, alternatively, the membrane can be used to selectively planarize portions of the microelectronic substrate at varying rates.

Abstract: An apparatus for applying different amounts of pressure to different locations of a backside of a semiconductor device structure during polishing thereof. The apparatus is configured to be associated with a wafer carrier of a polishing apparatus and includes pressurization structures configured to be biased against the backside of the semiconductor device structure during polishing thereof. The pressurization structures are independently movable with respect to one another. The amount of force or pressure applied by each pressurization structure to the backside of the semiconductor device structure is controlled by at least one corresponding actuator. The actuator may magnetically facilitate movement of the corresponding pressurization structure toward or away from the backside of the semiconductor device structure. The actuator may alternatively comprise a positive or negative pressure source.

Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the apparatus can include a membrane formed from a compressible, flexible material, such as neoprene or silicone, and having a first portion with a thickness greater than that of a second portion. The membrane can be aligned with the microelectronic substrate to bias the microelectronic substrate against a planarizing medium such that the first portion of the membrane biases the microelectronic substrate with a greater downward force than does the second portion of the membrane. Accordingly, the membrane can compensate for effects, such as varying linear velocities across the face of the substrate that would otherwise cause the substrate to planarize in a non-uniform fashion or, alternatively, the membrane can be used to selectively planarize portions of the microelectronic substrate at varying rates.

Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the apparatus can include a membrane formed from a compressible, flexible material, such as neoprene or silicone, and having a first portion with a thickness greater than that of a second portion. The membrane can be aligned with the microelectronic substrate to bias the microelectronic substrate against a planarizing medium such that the first portion of the membrane biases the microelectronic substrate with a greater downward force than does the second portion of the membrane. Accordingly, the membrane can compensate for effects, such as varying linear velocities across the face of the substrate that would otherwise cause the substrate to planarize in a non-uniform fashion or, alternatively, the membrane can be used to selectively planarize portions of the microelectronic substrate at varying rates.

Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the apparatus can include a membrane formed from a compressible, flexible material, such as neoprene or silicone, and having a first portion with a thickness greater than that of a second portion. The membrane can be aligned with the microelectronic substrate to bias the microelectronic substrate against a planarizing medium such that the first portion of the membrane biases the microelectronic substrate with a greater downward force than does the second portion of the membrane. Accordingly, the membrane can compensate for effects, such as varying linear velocities across the face of the substrate that would otherwise cause the substrate to planarize in a non-uniform fashion or, alternatively, the membrane can be used to selectively planarize portions of the microelectronic substrate at varying rates.

Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the apparatus can include a membrane formed from a compressible, flexible material, such as neoprene or silicone, and having a first portion with a thickness greater than that of a second portion. The membrane can be aligned with the microelectronic substrate to bias the microelectronic substrate against a planarizing medium such that the first portion of the membrane biases the microelectronic substrate with a greater downward force than does the second portion of the membrane. Accordingly, the membrane can compensate for effects, such as varying linear velocities across the face of the substrate that would otherwise cause the substrate to planarize in a non-uniform fashion or, alternatively, the membrane can be used to selectively planarize portions of the microelectronic substrate at varying rates.